Patents by Inventor Lin Lee

Lin Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11954271
    Abstract: An active stylus and a method performed by the active stylus are provided. The active stylus includes a touch sensor inside. The touch sensor is arranged corresponding to a preset pen-holding region on an outer surface. The touch sensor is insulated from the pen body, when an external operating subject touches the preset pen-holding region and touches a touch panel, an uplink signal transmitted by the touch panel is coupled to the pen body via the external operating subject, as an uplink interference signal. The signal processing unit is for: generating a compensation signal; obtaining a compensated interference signal generated based on the compensation signal and the uplink interference signal; generating an uplink signal to be processed based on the received uplink signal and the compensated interference signal; and obtaining uplink information based on the uplink signal to be processed.
    Type: Grant
    Filed: March 3, 2023
    Date of Patent: April 9, 2024
    Assignee: NOVATEK MICROELECTRONICS CORP.
    Inventors: Weijen Chang, Chin-Lin Lee
  • Patent number: 11947180
    Abstract: An optical system is provided. The optical system includes a first movable portion, a fixed portion, a first driving assembly, and a first sensing assembly. The first movable portion is used for connecting to an optical assembly having a main axis. The first movable portion is movable relative to the fixed portion. The first driving assembly is used for driving the first movable portion to move relative to the fixed portion. The first sensing assembly is used for sensing the movement of the first movable portion relative to the fixed portion.
    Type: Grant
    Filed: December 24, 2020
    Date of Patent: April 2, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chen-Hsien Fan, Yueh-Lin Lee, Yu-Chiao Lo
  • Patent number: 11947212
    Abstract: An electronic device which is capable of being bent in a first direction and includes a plurality of light-emitting units and a plurality of conductive patterns overlapping with at least a portion of the plurality of light-emitting units and extending in a second direction. The first direction and the second direction have an angle ? of not greater than 30 degrees.
    Type: Grant
    Filed: January 21, 2021
    Date of Patent: April 2, 2024
    Assignee: InnoLux Corporation
    Inventors: Yuan-Lin Wu, Yu-Chia Huang, Yu-Ting Huang, Kuan-Feng Lee, Chia-Hung Hsieh
  • Patent number: 11947395
    Abstract: A foldable display device is provided by the present disclosure. The foldable display device includes a foldable display panel and a foldable cover. The foldable cover is adhered to the foldable display panel. The foldable cover includes an inner substrate, an outer substrate and a first adhesive. The first adhesive is disposed between the inner substrate and the outer substrate. A thickness of the first adhesive is ranged from 1 micrometer to 40 micrometers, and a ratio of the sum of the thickness of the first adhesive and a thickness of the inner substrate to a thickness of the foldable cover is greater than or equal to 0.5 and less than 1. In addition, the foldable display device further includes a second adhesive disposed between the foldable display panel and the foldable cover.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: April 2, 2024
    Assignee: InnoLux Corporation
    Inventors: Yuan-Lin Wu, Yu-Chia Huang, Kuan-Feng Lee
  • Publication number: 20240106482
    Abstract: Certain aspects of the present disclosure provide techniques for operating a wireless device pursuant to radio frequency (RF) exposure compliance. A method that may be performed by a wireless device includes switching sensing circuitry to a first mode in response to one or more first criteria being satisfied; switching the sensing circuitry to a second mode in response to one or more second criteria being satisfied; and transmitting a signal at a transmit power determined based at least in part on a radio frequency (RF) exposure limit, and if the sensing circuitry is operating in the second mode, on one or more measurements associated with the sensing circuitry.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 28, 2024
    Inventors: John FORRESTER, Udara FERNANDO, Farhad MESHKATI, Lin LU, Jagadish NADAKUDUTI, Scott HOOVER, Roberto RIMINI, Justin MCGLOIN, Arvind Vardarajan SANTHANAM, Michael Lee MCCLOUD
  • Patent number: 11939494
    Abstract: A technical problem to be achieved by the present disclosure is to provide an adhesive resin composition for a conductor, which contains inorganic fillers having different average particle diameters and has enhanced thermal conductivity as a result of controlling the content of the inorganic fillers, and an adhesive film for a semiconductor produced using the same.
    Type: Grant
    Filed: August 17, 2021
    Date of Patent: March 26, 2024
    Assignee: LG CHEM, LTD.
    Inventors: Jong Min Jang, Byoung Ju Choi, Kwang Joo Lee, Yu Lin Sun
  • Publication number: 20240097034
    Abstract: A field effect transistor includes a substrate comprising a fin structure. The field effect transistor further includes an isolation structure in the substrate. The field effect transistor further includes a source/drain (S/D) recess cavity below a top surface of the substrate. The S/D recess cavity is between the fin structure and the isolation structure. The field effect transistor further includes a strained structure in the S/D recess cavity. The strain structure includes a lower portion. The lower portion includes a first strained layer, wherein the first strained layer is in direct contact with the isolation structure, and a dielectric layer, wherein the dielectric layer is in direct contact with the substrate, and the first strained layer is in direct contact with the dielectric layer. The strained structure further includes an upper portion comprising a second strained layer overlying the first strained layer.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Tsung-Lin Lee, Chih-Hao Chang, Chih-Hsin Ko, Feng Yuan, Jeff J. Xu
  • Publication number: 20240097033
    Abstract: The present disclosure provides one embodiment of a method making semiconductor structure. The method includes forming a composite stress layer on a semiconductor substrate, wherein the forming of the composite stress layer includes forming a first stress layer of a dielectric material with a first compressive stress and forming a second stress layer of the dielectric material with a second compressive stress on the first stress layer, the second compressive stress being greater than the first compressive stress; and patterning the semiconductor substrate to form fin active regions using the composite stress layer as an etch mask.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Wei-Jen LAI, Yen-Ming CHEN, Tsung-Lin LEE
  • Publication number: 20240099089
    Abstract: A display panel and manufacturing method thereof are provided. The display panel includes a substrate, a first electrode, a hole injection layer, a hole transport layer, an electron blocking layer, an organic electroluminescent layer, a hole blocking layer, an electron transport layer, an electron injection layer, and a second electrode arranged sequentially. The electron blocking layer corresponding to a green sub-pixel region of the organic electroluminescent layer is made of a p-type green light host material. Accordingly, the present invention effectively simplifies a manufacturing process, adjusts and balances charge carriers, and improves device performance.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Applicant: Wuhan China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Lin YANG, Munjae LEE, Xianjie LI, Jiajia LUO, Xu WANG
  • Publication number: 20240093351
    Abstract: A variable hardness nanocomposite coating and method for its production. The variable hardness nanocomposite coating can be applied as a single layer on metallic engine components that require a break-in to achieve physical mating of interacting surfaces thereby reducing friction and optimizing engine performance. The single layer nanocomposite coating has a relatively higher carbon content and lower hardness at the surface region and a relatively lower carbon content and relatively higher hardness region as one proceeds towards a surface of the metal component being coated.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 21, 2024
    Inventors: Jianliang LIN, Peter Mark LEE, Lake SPEED, JR.
  • Publication number: 20240096993
    Abstract: A method for tuning a threshold voltage of a transistor is disclosed. A channel layer is formed over a substrate. An interfacial layer is formed over and surrounds the channel layer. A gate dielectric layer is formed over and surrounds the interfacial layer. A dipole layer is formed over and wraps around the gate dielectric layer by performing a cyclic deposition etch process, and the dipole layer includes dipole metal elements and has a substantially uniform thickness. A thermal drive-in process is performed to drive the dipole metal elements in the dipole layer into the gate dielectric layer to form an interfacial dipole surface, and then the dipole layer is removed.
    Type: Application
    Filed: January 9, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shen-Yang Lee, Hsiang-Pi Chang, Huang-Lin Chao
  • Patent number: 11934213
    Abstract: A liquid-cooling device includes multiple water blocks and at least one connection tube. Each of the water blocks has a water incoming end, a water outgoing end and a water-receiving space in communication with the water incoming end and the water outgoing end. The connection tube is disposed between each two water blocks. Two ends of the connection tube are respectively connected with the water incoming end of one of the two water blocks and the water outgoing end of the other water block, whereby the water-receiving spaces of the two water blocks communicate with each other via the connection tube. The connection tube has at least one bellows section between two ends of the connection tube. The liquid-cooling device solves the problems of the conventional liquid-cooling device that when the water block is welded, thermal deformation is produced to cause tolerance and the manufacturing cost is higher.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: March 19, 2024
    Assignee: ASIA VITAL COMPONENTS (CHINA) CO., LTD.
    Inventors: Pai-Ling Kao, Sung-Wei Lee, Kuan-Lin Huang, Ming-Tsung Yang
  • Patent number: 11935487
    Abstract: A substrate assembly includes a substrate having a first surface and a second surface opposite to the first surface. The substrate assembly includes a first conductive portion disposed on the first surface, and a second conductive portion disposed on the second surface. The substrate assembly includes a connective portion that is at least partially disposed in the substrate and penetrates from the first surface to the second surface. The first conductive portion is electrically connected to the second conductive portion through the connective portion. The substrate assembly includes a processing unit disposed on the first surface, and an electronic element disposed on the second surface. The first conductive portion, the second conductive portion and the connective portion are overlapped with either of the processing unit or the electronic element, and the other of the processing unit or the electronic element is electrically connected to the first conductive portion.
    Type: Grant
    Filed: January 17, 2023
    Date of Patent: March 19, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Kuan-Feng Lee, Yuan-Lin Wu
  • Patent number: 11934034
    Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion, a fixed portion, a driving assembly, and an assist assembly. The movable portion is used for connecting to an optical element having a main axis. The movable portion is movable relative to the fixed portion. The driving assembly drives the movable portion to move relative to the fixed portion. The assist assembly limits the movement of the movable portion relative to the fixed portion.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: March 19, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chen-Hsien Fan, Yueh-Lin Lee, Yu-Chiao Lo, Sung-Mao Tsai, Shang-Hung Chen
  • Patent number: 11935439
    Abstract: A stretchable electronic device includes a first electronic unit including a first light emitting element, a second electronic unit including a second light emitting element and disposed adjacent to the first electronic unit, and an elasticity layer having a connecting region connecting the first display unit and the second display unit. In a top view of the stretchable electronic device, a size difference between the connecting region before stretching and the connecting region after stretching is greater than a size difference between the first electronic unit before stretching and the first electronic unit after stretching.
    Type: Grant
    Filed: March 17, 2023
    Date of Patent: March 19, 2024
    Assignee: InnoLux Corporation
    Inventors: Yu-Chia Huang, Yuan-Lin Wu, Kuan-Feng Lee
  • Patent number: 11935795
    Abstract: Disclosed is a method for forming a crystalline protective polysilicon layer which does not create defective voids during subsequent processes so as to provide effective protection to devices underneath. In one embodiment, a method for forming a semiconductor device, includes: depositing a protective coating on a first polysilicon layer; forming an epitaxial layer on the protective coating; and depositing a second polysilicon layer over the epitaxial layer, wherein the protective coating comprises a third polysilicon layer, wherein the third polysilicon layer is deposited at a first temperature in a range of 600-700 degree Celsius, and wherein the third polysilicon layer in the protect coating is configured to protect the first polysilicon layer when the second polysilicon layer is etched.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Cheng-Hung Wang, Tsung-Lin Lee, Wen-Chih Chiang, Kuan-Jung Chen
  • Patent number: 11935758
    Abstract: A method for atomic layer etching a metal containing layer is provided. At least a region of a surface of the metal containing layer is modified to form a modified metal containing region by exposing a surface of the metal containing layer to a modification gas, wherein adjacent to the modified metal containing region remains an unmodified metal containing region. The modified metal containing region is selectively removed with respect to the unmodified metal containing region by exposing the surface of the metal containing layer to an inert bombardment plasma generated from an inert gas.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: March 19, 2024
    Assignee: Lam Research Corporation
    Inventors: Wenbing Yang, Mohand Brouri, Samantha SiamHwa Tan, Shih-Ked Lee, Yiwen Fan, Wook Choi, Tamal Mukherjee, Ran Lin, Yang Pan
  • Patent number: 11935783
    Abstract: Examples of an integrated circuit with an interconnect structure and a method for forming the integrated circuit are provided herein. In some examples, the method includes receiving a workpiece that includes a substrate and an interconnect structure. The interconnect structure includes a first conductive feature disposed within a first inter-level dielectric layer. A blocking layer is selectively formed on the first conductive feature without forming the blocking layer on the first inter-level dielectric layer. An alignment feature is selectively formed on the first inter-level dielectric layer without forming the alignment feature on the blocking layer. The blocking layer is removed from the first conductive feature, and a second inter-level dielectric layer is formed on the alignment feature and on the first conductive feature. The second inter-level dielectric layer is patterned to define a recess for a second conductive feature, and the second conductive feature is formed within the recess.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: March 19, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Hsin-Yen Huang, Shao-Kuan Lee, Cheng-Chin Lee, Hai-Ching Chen, Shau-Lin Shue
  • Publication number: 20240085958
    Abstract: An electronic device includes a supporting film, a flexible substrate, an integrated circuit unit, and a sensing structure. A least a portion of the flexible substrate and the integrated circuit unit respectively correspond to opposite sides of the supporting film. The sensing structure is electrically connected to the integrated circuit unit.
    Type: Application
    Filed: November 22, 2023
    Publication date: March 14, 2024
    Applicant: InnoLux Corporation
    Inventors: Yuan-Lin Wu, Kuan-Feng Lee
  • Publication number: 20240088091
    Abstract: A method for manufacturing a package structure includes: providing a first electrical element and a second electrical element on a surface of a first carrier, wherein the second electrical element is shifted with respect to the first electrical element; and moving the first electrical element along at least one direction substantially parallel with the surface of the first carrier until a first surface of the first electrical element is substantially aligned with a first surface of the second electrical element from a top view.
    Type: Application
    Filed: September 8, 2022
    Publication date: March 14, 2024
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yu-Lin SHIH, Chih-Cheng LEE