Patents by Inventor Lin Yang

Lin Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145600
    Abstract: A semiconductor device includes a gate electrode, a gate insulating layer, an active layer, a source electrode and a drain electrode. The gate insulating layer is disposed between the gate electrode and the active layer, the source electrode and the drain electrode are arranged on one side of the gate insulating layer, wherein the gate insulating layer includes multilayer oxide films stacked on each other and at least one interface layer between the multilayer oxide films, and the material of the at least one interface layer is different from the material of the oxide films.
    Type: Application
    Filed: January 20, 2023
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Chih WEN, Yi-Lin YANG, Hai-Ching CHEN
  • Patent number: 11973422
    Abstract: The present invention discloses a high step-down modular DC power supply, belonging to the field of power electronics technology, and the high step-down modular DC power supply includes an upper modular cascade circuit string, a lower modular cascade circuit string, a load, and an input source, where the upper modular cascade circuit string includes i upper sub-module circuits, and the lower modular cascade circuit string includes j lower sub-module circuits. A combination manner of module circuits includes: upper module string cascading, lower module string cascading, and hybrid cascading of the upper module string and the lower module string. The power supply is formed to be a high voltage step-down ratio power supply with high voltage direct current input and low voltage direct current output through modular cascading.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: April 30, 2024
    Assignee: ZHEJIANG UNIVERSITY
    Inventors: Wuhua Li, Chushan Li, Lin Zhu, Huan Yang, Shengdao Ren, Huiqiang Yan, Jing Sheng, Xiangning He
  • Publication number: 20240136213
    Abstract: In an embodiment, a system, includes: a first pressurized load port interfaced with a workstation body; a second pressurized load port interfaced with the workstation body; the workstation body maintained at a set pressure level, wherein the workstation body comprises an internal material handling system configured to move a semiconductor workpiece within the workstation body between the first and second pressurized load ports at the set pressure level; a first modular tool interfaced with the first pressurized load port, wherein the first modular tool is configured to process the semiconductor workpiece; and a second modular tool interfaced with the second pressurized load port, wherein the second modular tool is configured to inspect the semiconductor workpiece processed by the first modular tool.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Chun-Jung HUANG, Yung-Lin HSU, Kuang Huan HSU, Jeff CHEN, Steven HUANG, Yueh-Lun YANG
  • Publication number: 20240133949
    Abstract: An outlier IC detection method includes acquiring first measured data of a first IC set, training the first measured data for establishing a training model, acquiring second measured data of a second IC set, generating predicted data of the second IC set by using the training model according to the second measured data, generating a bivariate dataset distribution of the second IC set according to the predicted data and the second measured data, acquiring a predetermined Mahalanobis distance on the bivariate dataset distribution of the second IC set, and identifying at least one outlier IC from the second IC set when at least one position of the at least one outlier IC on the bivariate dataset distribution is outside a range of the predetermined Mahalanobis distance.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 25, 2024
    Applicant: MEDIATEK INC.
    Inventors: Yu-Lin Yang, Chin-Wei Lin, Po-Chao Tsao, Tung-Hsing Lee, Chia-Jung Ni, Chi-Ming Lee, Yi-Ju Ting
  • Publication number: 20240133674
    Abstract: A high-resolution handheld OCT imaging system related to the optical imaging field solves the issues of handheld OCT systems with low resolution and the inability to measure the skin's stratum corneum thickness accurately. Through adopting the visible wavelength band of supercontinuum laser as the light source, mainly applying reflectors instead of lenses in the OCT system, and replacing fiber propagation with optical propagation in free space in the interference optical paths, to significantly reduce dispersion loss in the axial resolution and improve the axial resolution of OCT systems. The filter, attenuator, grating, camera, and other components are separated from the handheld module through modular design to reduce the handheld terminal's size and weight and realize the system construction. The invention improves the axial resolution, obtains the thickness information of whole-body skin's stratum corneum, and provides technical approaches for skin diagnosis and related medicine development.
    Type: Application
    Filed: January 3, 2023
    Publication date: April 25, 2024
    Inventors: Shuixing Zhang, Wei Li, Jie Tian, Lin Yin, Zhiyun Yang
  • Publication number: 20240134114
    Abstract: A dispersion-compensation microstructure fiber uses pure silica glass as the background material. It includes the core, the first-type defects, the second-type defects and the cladding. The air holes in the fiber cross section are arranged in the equilateral triangle lattice with the same adjacent air-hole to air-hole spacing. The core is formed by omitting 1 air hole. The first-type defects are formed by the 6 air holes locating at the vertices of hexagonal third-layer porous structure surrounding the core and their surrounding background material. The second-type defects are formed by the air holes in the first air-hole layer surrounding each first-type defect and their surrounding background material. The second-type defects act as the porous structure to surround the first-type defects and the fundamental defect modes, and can also combine with the first-type defects to act as the core of the second-order defect modes.
    Type: Application
    Filed: December 22, 2023
    Publication date: April 25, 2024
    Applicant: YANSHAN UNIVERSITY
    Inventors: Wei WANG, Chang ZHAO, Xiaochen KANG, Hongda YANG, Wenchao LI, Zheng LI, Lin SHI
  • Publication number: 20240135353
    Abstract: Disclosed herein relates to a self-checkout anti-theft vehicle system, comprising: a self-checkout vehicle having a plurality of sensors and components implemented thereon, the self-checkout vehicle being used by shoppers for storing selected merchandises in a retail environment; and a centralized computing device. The centralized computing device is configured to: obtain information related to each merchandise selected and placed into the self-checkout vehicle by a shopper by exchanging data with the plurality of sensors and components via a first communication network, identify each merchandise via a second, different communication network based at least upon the information obtained from the plurality of sensors and components, and process payment information of each merchandise.
    Type: Application
    Filed: January 3, 2024
    Publication date: April 25, 2024
    Inventors: Lin Gao, Yilin Huang, Shiyuan Yang, Ahmed Beshry
  • Publication number: 20240135497
    Abstract: Embodiments of the present application provide an image enhancement method, a chip, and an image acquisition device. The method comprises: storing, by a main processor, a preset number of Raw image frames to be processed currently acquired from a sensor in a first off-chip memory, into the on-chip memory; performing, by a first neural network processor, image fusion on a preset number of Raw image frames to be fused currently obtained based on the preset number of Raw image frames to be processed currently in the on-chip memory based on a preset image fusion network, to obtain a fused Raw image frame, and storing it into the on-chip memory; sending, by the main processor to an ISP chip, a target Raw image frame to be sent currently obtained based on the fused Raw image frame in the on-chip memory.
    Type: Application
    Filed: August 29, 2023
    Publication date: April 25, 2024
    Inventors: Zaichu YANG, Caizhi ZHU, Shengning XIANG, Lin WANG
  • Publication number: 20240134293
    Abstract: A semiconductor processing method includes: selecting a target state of a reticle based on a given data set, wherein the given data set comprises temperature profiles of the reticle correlated to a target overlay performance, and the target state is a state in which a deformation of the reticle is substantially unchanged; regulating the reticle to reach the target state; and performing an exposure process on a target workpiece by using the reticle.
    Type: Application
    Filed: January 2, 2024
    Publication date: April 25, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yueh-Lin Yang, Chi-Hung Liao
  • Patent number: 11964229
    Abstract: A staggered and crossed heat storage adsorption bed and a seawater desalination waste heat storage system are provided, which relate to the field of seawater desalination and the technical field of thermochemical adsorption heat storage. The adsorption bed includes a bed body, wherein an adsorption cavity is arranged in the bed body; two sides of the adsorption cavity are respectively communicated with an inlet cavity and an outlet cavity; the adsorption cavity includes a vacuum heat insulation layer arranged at an outermost side; the vacuum heat insulation layer is embedded with an adsorption box fixing layer; a corner end adsorption box, a central adsorption box and a side adsorption box are staggered and crossed arranged in an inner cavity of the vacuum heat insulation layer through the adsorption box fixing layer.
    Type: Grant
    Filed: June 2, 2023
    Date of Patent: April 23, 2024
    Assignee: ENERGY RESEARCH INSTITUTE OF SHANDONG ACADEMY OF SCIENCES
    Inventors: Lin Guo, Cong Wang, Zhigang Liu, Guihua Tang, Yawei Yang, Chongliang Huang, Zhuoliang Li, Yalong Kong
  • Patent number: 11968817
    Abstract: A semiconductor device includes a fin structure. A source/drain region is formed on the fin structure. A first gate structure is disposed over the fin structure. A source/drain contact is disposed over the source/drain region. The source/drain contact has a protruding segment that protrudes at least partially over the first gate structure. The source/drain contact electrically couples together the source/drain region and the first gate structure.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jui-Lin Chen, Chao-Yuan Chang, Ping-Wei Wang, Fu-Kai Yang, Ting Fang, I-Wen Wu, Shih-Hao Lin
  • Patent number: 11965821
    Abstract: An optical fiber sensing system for temperature and salinity synchronous measurement is provided, which includes a broad-spectrum light source, an optical fiber circulator, a coupler, a first interferometer, a second interferometer, a third interferometer and a spectrometer; the first interferometer is insensitive to temperature and salinity; the second interferometer is sensitive to both temperature and salinity, and the third interferometer is only sensitive to temperature; light emitted by the broad-spectrum light source passes through the optical fiber circulator and enters the first interferometer; reflected light of the first interferometer passes through the optical fiber circulator and the coupler sequentially, and then enters the second and the third interferometers respectively; the reflected light of the second and the third interferometers enters the spectrometer after passing through the coupler; the temperature and the salinity to be measured are simultaneously obtained by performing spectral an
    Type: Grant
    Filed: August 26, 2023
    Date of Patent: April 23, 2024
    Assignee: Guangdong Ocean University
    Inventors: Xiaoguang Mu, Lin Sun, Yuying Zhang, Yuting Li, Kun Song, Jiale Gao, Yuqiang Yang
  • Publication number: 20240129167
    Abstract: A communication receiver includes a first signal processing circuit and a second signal processing circuit. The first signal processing circuit includes a first feedforward equalizer and a decision circuit. The first feedforward equalizer processes a received signal to generate a first equalized signal. The decision circuit performs hard decision upon the first equalized signal to generate a first symbol decision signal. The second signal processing circuit includes a second feedforward equalizer, a decision feedforward equalizer, and a first decision feedback equalizer. The second feedforward equalizer processes the first equalized signal to generate a second equalized signal. The decision feedforward equalizer processes the first symbol decision signal to generate a third equalized signal. The first decision feedback equalizer generates a second symbol decision signal according to the second equalized signal and the third equalized signal.
    Type: Application
    Filed: September 18, 2023
    Publication date: April 18, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chung-Hsien Tsai, Che-Yu Chiang, Yu-Ting Liu, Tsung-Lin Lee, Chia-Sheng Peng, Ting-Ming Yang
  • Publication number: 20240128216
    Abstract: A bonding structure that may be used to form 3D-IC devices is formed using first oblong bonding pads on a first substrate and second oblong bonding pads one a second substrate. The first and second oblong bonding pads are laid crosswise, and the bond is formed. Viewed in a first cross-section, the first bonding pad is wider than the second bonding pad. Viewed in a second cross-section at a right angle to the first, the second bonding pad is wider than the first bonding pad. Making the bonding pads oblong and angling them relative to one another reduces variations in bonding area due to shifts in alignment between the first substrate and the second substrate. The oblong shape in a suitable orientation may also be used to reduce capacitive coupling between one of the bonding pads and nearby wires.
    Type: Application
    Filed: January 4, 2023
    Publication date: April 18, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Ching-Chun Wang, Hsiao-Hui Tseng, Chen-Jong Wang, Dun-Nian Yaung
  • Publication number: 20240130040
    Abstract: Disclosed are a conductive film and a test component. A conductive film includes a supporting layer, a circuit layer and a protective layer. The supporting layer has a first surface and a second surface opposite to the first surface. The supporting layer supports the circuit layer. The circuit layer includes a first protruding part, a second protruding part and a connecting part. The first protruding part is disposed on the first surface. The second protruding part is disposed on the second surface. The connecting part is disposed between the first protruding part and the second protruding part. The first protruding part is connected to the second protruding part through the connecting part. The protective layer covers the first protruding part. The conductive film and the test component of the disclosed embodiments may have a buffering effect or increase the service life.
    Type: Application
    Filed: September 7, 2023
    Publication date: April 18, 2024
    Applicant: Innolux Corporation
    Inventors: Ker-Yih Kao, Kuang-Ming Fan, Chia-Lin Yang, Jui-Jen Yueh, Ju-Li Wang
  • Publication number: 20240130156
    Abstract: A light-emitting element includes a pair of electrodes, a first light-emitting unit, a second light-emitting unit, and a charge generation layer. The first light-emitting unit, between the pair of electrodes, and the first light-emitting unit, includes a first light-emitting layer. The second light-emitting unit, between the pair of electrodes, includes a second light-emitting layer. A first luminescent layer includes a first main body material, a second main body material, a first guest material, and a first auxiliary material, and the first main body material forms a first excimer complex with the second main body material. A first excited triplet state energy level of the first auxiliary material is lower than a first excited triplet state energy level of the first excimer complex, and the first excited triplet state energy level of the first auxiliary material is higher than that of the first guest material.
    Type: Application
    Filed: September 26, 2023
    Publication date: April 18, 2024
    Applicant: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventors: Yu ZHANG, Li YUAN, Munjae LEE, Wenxu XIANYU, Jie YANG, Huizhen PIAO, Mugyeom KIM, Xianjie LI, Jing HUANG, Fang WANG, Kailong WU, Lin YANG, Yu GU, Mingzhou WU, Jingyao SONG, Danhua SHEN, Guo CHENG
  • Publication number: 20240129010
    Abstract: The present disclosure provides a method and a device used in a User Equipment (UE) and a base station for wireless communications. The UE receives a first signaling; and transmits a first radio signal; wherein the first signaling comprises scheduling information of the first radio signal; the first signaling is used to determine a first index, and the first index is used to determine a transmitting antenna port of the first radio signal; transmit power of the first radio signal is first power, and a linear value of the first power is equal to a product of a linear value of second power and a first coefficient; the first coefficient is one of K candidate coefficients. The above method optimizes Uplink transmit power according to the UE's own capabilities.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Applicant: SHANGHAI LANGBO COMMUNICATION TECHNOLOGY COMPANY LIMITED
    Inventors: Keying WU, Xiaobo ZHANG, Lin YANG
  • Patent number: 11962117
    Abstract: The present disclosure provides a fiber laser light coherent combination system, comprising: a modulator module configured to perform a phase modulation on sub-beams according to pseudo-random sequences orthogonally independent from each other, and perform a frequency shift on a reference beam according to a set frequency; a fiber laser light amplifier module configured to perform a power amplification on the modulated sub-beams; a laser light collimation emission module configured to collimate and output the sub-beams and the reference beam; a combination sampling module configured to perform a combination of the sub-beams and the reference beam which are collimated and outputted, and convert them into an electrical signal; a digital phase modulation and demodulation module configured to perform a demodulation on the electrical signal according to the shifted frequency and each of the pseudo-random sequences, and obtain a phase difference between each of the sub-beams and the reference beam.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: April 16, 2024
    Assignee: China South Industry Academy
    Inventors: Zhen Yang, Junfeng Shi, Ye Li, Xinpeng Sun, Lin Xu, Chaoyang Li, Qingsong Li
  • Patent number: 11961912
    Abstract: The present application provides a semiconductor device and the method of making the same. The method includes recessing a fin extending from a substrate, forming a base epitaxial feature on the recessed fin, forming a bar-like epitaxial feature on the base epitaxial feature, and forming a conformal epitaxial feature on the bar-like epitaxial feature. The forming of the bar-like epitaxial feature includes in-situ doping the bar-like epitaxial feature with an n-type dopant at a first doping concentration. The forming of the conformal epitaxial feature includes in-situ doping the conformal epitaxial feature with a second doping concentration greater than the first doping concentration.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-An Lin, Wei-Yuan Lu, Feng-Cheng Yang, Tzu-Ching Lin, Li-Li Su
  • Publication number: 20240120313
    Abstract: A chip package structure is provided. The chip package structure includes a chip. The chip package structure includes a conductive ring-like structure over and electrically insulated from the chip. The conductive ring-like structure surrounds a central region of the chip. The chip package structure includes a first solder structure over the conductive ring-like structure. The first solder structure and the conductive ring-like structure are made of different materials.
    Type: Application
    Filed: December 18, 2023
    Publication date: April 11, 2024
    Inventors: Sheng-Yao YANG, Ling-Wei LI, Yu-Jui WU, Cheng-Lin HUANG, Chien-Chen LI, Lieh-Chuan CHEN, Che-Jung CHU, Kuo-Chio LIU