Patents by Inventor Liu HAN

Liu HAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220267974
    Abstract: The present invention discloses a method for constructing inner dump type strip mine pit bottom reservoirs section by section, specifically including the following steps: S1: processing end slopes: discarding clay at a lowest step of an inner waste dump of a strip mine; S2: discharging concrete to slope faces of lowest steps of the end slopes on two sides of a pit bottom; S3: sealing the bottom; S4: discarding gravel into a pit of the strip mine; S5: laying geotextile; S6: re-adopting clay on the lowest steps of the end slopes of the inner waste dump, so as to form a reservoir sealing isolation layer; S7: constructing a plurality of reservoirs step by step in an advancing direction of the strip mine; S8: storing water resources: completing installation of water storage wells; S9: completing installation of water fetching wells; S10: storing water resources.
    Type: Application
    Filed: February 29, 2020
    Publication date: August 25, 2022
    Inventors: Shuzhao CHEN, Liu HAN, Cangyan XIAO, Tao SHANG
  • Patent number: 11417601
    Abstract: A device includes a transistor, an insulating structure, a buried conductive line, and a buried via. The transistor is above a substrate and includes a source/drain region and a source/drain contact above the source/drain region. The insulating structure is above the substrate and laterally surrounds the transistor. The buried conductive line is in the insulating structure and spaced apart from the transistor. The buried via is in the insulating structure and interconnects the transistor and the buried conductive line. A height of the buried conductive line is greater than a height of the source/drain contact.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: August 16, 2022
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITED
    Inventors: Xin-Yong Wang, Liu Han, Li-Chun Tien, Chih-Liang Chen
  • Publication number: 20220243590
    Abstract: The present invention discloses a dendritic reverse underground mining method for a thin coal seam at an end slope of a strip mine. The method includes the following steps: step S1: using a continuous coal mining machine to excavate a main adit toward a boundary of the strip mine along a seam floor; step S2: excavating secondary adits on two sides of the main adit obliquely in a forward direction of the main adit; step S3: transporting the excavated coal out of the main adit by the self-moving belt conveyors; step S4: after the excavating of a secondary adit of the secondary adits is ended, withdrawing the continuous coal mining machine and the self-moving belt conveyor from the secondary adit, and then excavating subsequent secondary adits of the secondary adits in a similar way; step S5: filling the secondary adits, and filling a goaf of the main adit.
    Type: Application
    Filed: December 29, 2021
    Publication date: August 4, 2022
    Applicants: CHINA UNIVERSITY OF MINING AND TECHNOLOGY, JIANGSU VOCATIONAL INSTITUTE OF ARCHITECTURAL TECHNOLOGY
    Inventors: Shuzhao CHEN, Cangyan XIAO, Liu HAN
  • Patent number: 11404553
    Abstract: A semiconductor device includes a source/drain region, a body region, a first gate structure, and a second gate structure. The source/drain region and the body region are in a substrate. The first and second gate structures are above the substrate. The source/drain region and the body region are on opposite sides of the first gate structure. The second gate structure is spaced apart from the first gate structure. The source/drain region, the body region, and the first gate structure are on a same side of the second gate structure.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: August 2, 2022
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITED
    Inventors: Xin-Yong Wang, Liu Han
  • Publication number: 20210384128
    Abstract: A device includes a transistor, an insulating structure, a buried conductive line, and a buried via. The transistor is above a substrate and includes a source/drain region and a source/drain contact above the source/drain region. The insulating structure is above the substrate and laterally surrounds the transistor. The buried conductive line is in the insulating structure and spaced apart from the transistor. The buried via is in the insulating structure and interconnects the transistor and the buried conductive line. A height of the buried conductive line is greater than a height of the source/drain contact.
    Type: Application
    Filed: June 23, 2020
    Publication date: December 9, 2021
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITED
    Inventors: Xin-Yong WANG, Liu HAN, Li-Chun TIEN, Chih-Liang CHEN
  • Publication number: 20210320181
    Abstract: A semiconductor device includes a source/drain region, a body region, a first gate structure, and a second gate structure. The source/drain region and the body region are in a substrate. The first and second gate structures are above the substrate. The source/drain region and the body region are on opposite sides of the first gate structure. The second gate structure is spaced apart from the first gate structure. The source/drain region, the body region, and the first gate structure are on a same side of the second gate structure.
    Type: Application
    Filed: May 15, 2020
    Publication date: October 14, 2021
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC NANJING COMPANY LIMITED, TSMC CHINA COMPANY LIMITED
    Inventors: Xin-Yong WANG, Liu HAN
  • Publication number: 20210320098
    Abstract: A semiconductor device includes a substrate, a first gate structure, a second gate structure, a third gate structure, and a first source/drain region. The first, second, and third gate structures are above the substrate and arranged in a first direction. The first, second, and third gate structures extend in a second direction different from the first direction, and the second gate structure is between the first and third gate structures. The first source/drain region is between the first and third gate structures, and the first source/drain region is at one end of the second gate structure.
    Type: Application
    Filed: May 11, 2020
    Publication date: October 14, 2021
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC Nanjing Company Limited, TSMC China Company Limited
    Inventors: Xin-Yong WANG, Yang ZHOU, Liu HAN
  • Patent number: 10651827
    Abstract: Aspects of the disclosure include an apparatus that has a first clock generator and a second clock generator. The first clock generator is configured to drive a first circuit, causing the first circuit to (i) receive a signal corresponding to an audio input, and (ii) determine whether an energy level of the signal exceeds a predetermined threshold. The second clock generator is activated when the first circuit determines that the energy level of the signal exceeds the predetermined threshold. The second clock generator is configured to drive a second circuit, causing the second circuit to determine whether the signal matches a predetermined pattern. A third circuit is activated when the second circuit determines that the signal matches the predetermined pattern.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: May 12, 2020
    Assignee: MARVELL ASIA PTE, LTD.
    Inventors: Yafei Hu, Liu Han, Kapil Jain, Jin Xie
  • Publication number: 20170155378
    Abstract: Aspects of the disclosure include an apparatus that has a first clock generator and a second clock generator. The first clock generator is configured to drive a first circuit, causing the first circuit to (i) receive a signal corresponding to an audio input, and (ii) determine whether an energy level of the signal exceeds a predetermined threshold. The second clock generator is activated when the first circuit determines that the energy level of the signal exceeds the predetermined threshold. The second clock generator is configured to drive a second circuit, causing the second circuit to determine whether the signal matches a predetermined pattern. A third circuit is activated when the second circuit determines that the signal matches the predetermined pattern.
    Type: Application
    Filed: November 30, 2016
    Publication date: June 1, 2017
    Applicant: Marvell World Trade Ltd.
    Inventors: Yafei HU, Liu HAN, KapiI JAIN, Jin XIE
  • Publication number: 20090325657
    Abstract: A user-customizable case is provided for at least partially covering a portable electronic device. The case may include first and second panels and a retainer for holding an insert bearing an indicia. The panels may be elastically connected to facilitate receiving many different sizes and shapes of portable electronic devices. The retainer may removably attach to the case to facilitate exchanging the inserts for customizing the device, insignia, or the like. The case may be included in a kit, along with at least one insert and a retainer. Related methods are also disclosed.
    Type: Application
    Filed: January 6, 2005
    Publication date: December 31, 2009
    Applicant: PRIME FINISH, LLC
    Inventors: Richard A. Ramsdell, Scott A. Eppert, Liu Hans, Harry Mkhitarian