Abstract: A media center may include an interface to receive video game information including first and second tags from a communication link. The media center may also include a module to separate the video game information based on the first and second tags. A first modulator may modulate first video game information corresponding to the first tag at a first frequency on a media communication link, and a second modulator may modulate second video game information corresponding to the second tag at a second frequency on the media communication link.

Abstract: In an embodiment, a method includes receiving video into a video display device. The method also includes storing, by at least one processor, the video into a memory, upon determining that the video display device is in a storage mode. Additionally, the method includes performing enhanced image processing on the video with the at least one processor, upon determining that the video display device is in an image processing mode.

Abstract: A system, apparatus, method, and article to process a chroma motion vector are described. The apparatus may include a video decoder. The video decoder includes a processor to receive a compressed video bitstream. The compressed video bitstream includes a stream of pictures. The stream of pictures includes a current slice and a current block within the slice. The processor pre-computes a chroma motion vector adjustment parameter for the current slice and determines a motion vector component for the current block within the current slice using the pre-computed chroma motion vector adjustment parameter.

Abstract: In an embodiment, a method includes receiving video into a video display device. The method also includes storing, by at least one processor, the video into a memory, upon determining that the video display device is in a storage mode. Additionally, the method includes performing enhanced image processing on the video with the at least one processor, upon determining that the video display device is in an image processing mode.

Abstract: A media center may include an interface to receive video game information including first and second tags from a communication link. The media center may also include a module to separate the video game information based on the first and second tags. A first modulator may modulate first video game information corresponding to the first tag at a first frequency on a media communication link, and a second modulator may modulate second video game information corresponding to the second tag at a second frequency on the media communication link.

Abstract: A media center may include an interface to receive video game information including first and second tags from a communication link. The media center may also include a module to separate the video game information based on the first and second tags. A first modulator may modulate first video game information corresponding to the first tag at a first frequency on a media communication link, and a second modulator may modulate second video game information corresponding to the second tag at a second frequency on the media communication link.

Abstract: In an embodiment, a method includes receiving video into a video display device. The method also includes storing, by at least one processor, the video into a memory, upon determining that the video display device is in a storage mode. Additionally, the method includes performing enhanced image processing on the video with the at least one processor, upon determining that the video display device is in an image processing mode.

Abstract: A method and apparatus employing selectable hardware accelerators in a data driven architecture are described. In one embodiment, the apparatus includes a plurality of processing elements (PEs). A plurality of hardware accelerators are coupled to a selection unit. A register is coupled to the selection unit and the plurality of processing elements. In one embodiment, the register includes a plurality of general purpose registers (GPR), which are accessible by the plurality of processing elements, as well as the plurality of hardware accelerators. In one embodiment, at least one of the GPRs includes a bit to enable a processing element to enable access a selected hardware accelerator via the selection unit.

Abstract: An apparatus includes a decoder to receive a compressed bit stream that is based on a coding standard. The decoder includes a hardware accelerator to decode a part of the compressed bit stream that is based on an operation that is common across multiple coding standards that includes the coding standard. The decoder also includes a programmable element to decode a part of the compressed bit stream that is based on an operation that is specific to the coding standard.

Abstract: A system, apparatus, method, and article to process a chroma motion vector are described. The apparatus may include a video decoder. The video decoder includes a processor to receive a compressed video bitstream. The compressed video bitstream includes a stream of pictures. The stream of pictures includes a current slice and a current block within the slice. The processor pre-computes a chroma motion vector adjustment parameter for the current slice and determines a motion vector component for the current block within the current slice using the pre-computed chroma motion vector adjustment parameter. Other embodiments are described and claimed.

Abstract: A system, apparatus, method, and article to process a chroma motion vector are described. The apparatus may include a video decoder. The video decoder includes a processor to receive a compressed video bitstream. The compressed video bitstream includes a stream of pictures. The stream of pictures includes a current slice and a current block within the slice. The processor pre-computes a chroma motion vector adjustment parameter for the current slice and determines a motion vector component for the current block within the current slice using the pre-computed chroma motion vector adjustment parameter.

Abstract: A method and system for remotely controlling a device by using a remote control device and a soft remote control or device skin. The remote control device can be used to send commands to a soft remote control or device skin running as an application on a host device. The device skin incorporates soft control commands that can be used to remotely control an electronic device. The soft control commands are interpreted and forwarded by the host device to the electronic device.

Abstract: A method includes selecting a target pixel and comparing a value of the target pixel with a respective value of each of a plurality of pixels located in an area that includes the target pixel. Further, for each pixel of the plurality of pixels that has a value different by at least a threshold amount from the value of the target pixel, the value of such pixel is replaced by the value of the target pixel. A filter function is applied to a set of pixels which includes the value of the target pixel and current values, after the selective replacement step, of the plurality of pixels.

Abstract: A method and apparatus employing selectable hardware accelerators in a data driven architecture are described. In one embodiment, the apparatus includes a plurality of processing elements (PEs). A plurality of hardware accelerators are coupled to a selection unit. A register is coupled to the selection unit and the plurality of processing elements. In one embodiment, the register includes a plurality of general purpose registers (GPR), which are accessible by the plurality of processing elements, as well as the plurality of hardware accelerators. In one embodiment, at least one of the GPRs includes a bit to enable a processing element to enable access a selected hardware accelerator via the selection unit.

Abstract: An apparatus is described comprising: logic circuitry to take an absolute difference between: 1) less than all of the bits of an uncompressed video data value from a reference macro block and 2) less than all of the bits of an uncompressed video data value from a macro block worth of data within a search window. The apparatus further includes a register to store the reference macro block. The register is coupled to the logic circuitry. The apparatus further include a random access memory to store the search window. The random access memory is coupled to the logic circuitry.

Abstract: A method and apparatus employing selectable hardware accelerators in a data driven architecture are described. In one embodiment, the apparatus includes a plurality of processing elements (PEs). A plurality of hardware accelerators are coupled to a selection unit. A register is coupled to the selection unit and the plurality of processing elements. In one embodiment, the register includes a plurality of general purpose registers (GPR), which are accessible by the plurality of processing elements, as well as the plurality of hardware accelerators. In one embodiment, at least one of the GPRs includes a bit to enable a processing element to enable access a selected hardware accelerator via the selection unit.

Abstract: System or methods may include loading information associated with a window of pixels from memory into a matrix of processing elements, the window of pixels being selected from a plurality of pixels associated with a reference frame, determining a current frame comprising a plurality of pixels, determining a first block of pixels from the plurality of pixels of the current frame, comparing each pixel of the first block of pixels to each pixel of the window of pixels by comparing the first block of pixels to portions of the window of pixels in an exhaustive manner, wherein comparing comprises calculating a first deviation result for each pair of compared pixels and aggregating the first deviation results for each position of the first block of pixels in the window of pixels, the calculating being performed by the matrix of processors.

Abstract: In an embodiment, an apparatus includes a first processor that includes a first processor element. The apparatus also includes a second processor that includes a second processor element. The first processor is configured to transmit data to the second processor through a third processor, wherein no processor element within the third processor is configured to perform a process operation on the data as part of the transmission of the data from the first processor to the second processor.

Abstract: Methods and systems are described for providing a multi-player game system using standard consumer electronics equipment. For example, a system for playing multi-player games on a DVD player and other standard consumer electronics equipment receives commands from player remote controls in response to prompts from a game being played on the DVD player and other standard consumer electronics equipment. An electronic control mechanism determines which of the player remote controls first responds to the prompt. If necessary, the electronic control mechanism translates commands from the remote controls to commands compatible with and understandable by the DVD player and other standard consumer electronics equipment. A transmitter then sends the commands to the DVD player and other standard consumer electronics equipment. Based on those commands, the game proceeds until completed.

Abstract: A method includes selecting a target pixel and comparing a value of the target pixel with a respective value of each of a plurality of pixels located in an area that includes the target pixel. Further, for each pixel of the plurality of pixels that has a value different by at least a threshold amount from the value of the target pixel, the value of such pixel is replaced by the value of the target pixel. A filter function is applied to a set of pixels which includes the value of the target pixel and current values, after the selective replacement step, of the plurality of pixels.