Abstract: A device for decoding video data determine that a current block of video data is encoded in an affine linear weighted intra prediction (ALWIP) mode; derives, based on a set of left edge neighboring samples of the current block and a set of top edge neighboring samples of the current block, a subset of left edge samples and a subset of top edge samples; applies an affine model to the subset of left edge samples and the subset of top edge samples to generate an intermediate block of intermediate samples; filters the intermediate samples to generate a final prediction block; decodes the current block of video data based on the final prediction block.

Abstract: An example device for binarizing video data includes a memory configured to store video data; and one or more processors implemented in circuitry and configured to: calculate a local sum of absolute values (locSumAbs value) of neighboring coefficients to a current coefficient of a current block of video data; derive a shift value from the locSumAbs value; normalize the locSumAbs value using the shift value; determine a Rice parameter using the normalized locSumAbs value; and binarize or inverse binarize the current coefficient using the Rice parameter. In this manner, these techniques may allow for more appropriate Rice parameter value selection when binarizing high bitdepth data in conjunction with performing context-adaptive binary arithmetic coding (CABAC).

Abstract: Example devices and techniques for coding video data are described. An example device includes memory configured to store the video data and one or more processors implemented in circuitry and communicatively coupled to the memory. The one or more processors being configured to adjust an input bit depth of reconstructed samples of video data to a fixed bit depth, wherein the fixed bit depth is different than the input bit depth. The one or more processors are configured to classify the reconstructed samples at the fixed bit depth and determine a filter based on the classification. The one or more processors are configured to adaptive loop filter the reconstructed samples at the input bit depth based on the determined filter and process the adaptively loop filtered samples.

Abstract: A video decoder can be configured to determine that a first block of the video data is encoded in a cross component linear model (CCLM) mode; determine that the first block has a first bit depth; determine that a second block of the video data is encoded in the CCLM mode; determine that the second block has a second bit depth that is different than the first bit depth; and decode the first block and the second block in the CCLM mode using a fixed bit depth, wherein the fixed bit depth is different than at least one of the first bit depth or the second bit depth.

Abstract: An example device for coding (encoding or decoding) video data includes a memory for storing video data and one or more processors implemented in circuitry and configured to form an inter-prediction block for a current chrominance block of the video data; form an intra-prediction block for the current chrominance block of the video data; determine a number of neighboring blocks to a luminance block corresponding to the current chrominance block that are intra-prediction coded; determine a first weight and a second weight according to the number of neighboring blocks that are intra-prediction coded; apply the first weight to the inter-prediction block and the second weight to the intra-prediction block; combine the first weighted inter-prediction block and the second weighted intra-prediction block to form a prediction block for the current chrominance block; and code the current chrominance block using the prediction block.

Abstract: A video coder performs a Most-Probable Mode (MPM) derivation process that derives one or more MPMs for a current block that is not coded using affine linear weighted intra prediction (ALWIP). As part of performing the MPM derivation process, the video coder determines whether a neighboring block of the current block is an ALWIP-coded neighboring block. Based on the neighboring block being an ALWIP-coded neighboring block, the video coder determines that a value of an intra prediction mode of the neighboring block is a value indicating a planar mode. The video coder codes the current block based on one of the MPMs for the current block.

Abstract: An example method includes obtaining values of control point motion vectors (CPMVs) for a current block of video data selected for coding using affine mode; determining whether a memory bandwidth needed for accessing samples of a plurality of reference blocks derived based on the values of the CPMVs satisfies a bandwidth threshold; selectively modifying, based on whether the determined memory bandwidth satisfies the bandwidth threshold, a motion compensation method used to predict samples of the current block of video data; and predicting, using the selectively modified motion compensation method, the samples of the current block of video data from the samples of the plurality of reference blocks.

Abstract: The disclosure describes examples for determining samples to use for DC intra mode prediction, such as where the samples are in a row or column that is not immediately above or immediately left of the current block. The samples may be aligned with the current block such that a last sample in the samples in a row above the current block is in same column as last column of the current block and such that a last sample in the samples in a column left of the current block is in the same row as the last row of the current block.

Abstract: A method of decoding video data includes determining, by one or more processors implemented in circuitry, a picture size of a picture. The picture size applies a picture size restriction to set a width of the picture and a height of the picture to each be a respective multiple of a maximum of 8 and a minimum coding unit size for the picture. The method further includes determining, by the one or more processors, a partition of the picture into a plurality of blocks and generating, by the one or more processors, a prediction block for a block of the plurality of blocks. The method further includes decoding, by the one or more processors, a residual block for the block and combining, by the one or more processors, the prediction block and the residual block to decode the block.

Abstract: A video coder determines a plurality of available Matrix Intra Prediction (MIP) parameter sets (MPS's) for a picture of video data. The plurality of available MPS's is a union of (i) a subset of all default MPS's and (ii) a set of additional MPS's that are signaled in the bitstream. Each of the default MPS's is associated with a predefined MIP mode in a codec. Each of the set of additional MPS's is associated with a new MIP mode in a set of new MIP modes. The video decoder uses a MIP mode associated with an MPS in the plurality of available MPS's to generate a prediction block for a current block of the picture.

Abstract: An example device for coding (encoding or decoding) video data includes a memory configured to store video data; and one or more processors implemented in circuitry and configured to: determine a first number of neighboring blocks to a current block of the video data that are intra-predicted; determine a second number of the neighboring blocks that are inter-predicted; determine a first weight value to be applied to intra-prediction samples of an intra-prediction block for the current block; determine a second weight value to be applied to inter-prediction samples of an inter-prediction block for the current block; generate a prediction block for the current block as a weighted combination of the intra-prediction block to which the first weight value is applied and the inter-prediction block to which the second weight value is applied; and code the current block using the prediction block.

Abstract: A video coder determines a plurality of available Matrix Intra Prediction (MIP) parameter sets (MPS's) for a picture of video data. The plurality of available MPS's is a union of (i) a subset of all default MPS's and (ii) a set of additional MPS's that are signaled in the bitstream. Each of the default MPS's is associated with a predefined MIP mode in a codec. Each of the set of additional MPS's is associated with a new MIP mode in a set of new MIP modes. The video decoder uses a MIP mode associated with an MPS in the plurality of available MPS's to generate a prediction block for a current block of the picture.

Abstract: An example device for coding (encoding or decoding) video data includes a memory configured to store video data; and one or more processors implemented in circuitry and configured to: partition a coding unit (CU) of video data into sub-blocks, the sub-blocks being arranged into a number of rows and a number of columns, the number of rows being greater than 1 and the number of columns being greater than 1; form intra-prediction blocks for each of the sub-blocks; and code the CU using the intra-prediction blocks.

Abstract: A video decoder can be configured to determine that a new scaling list for a set of scaling lists is to be predicted from a reference scaling list, wherein the new scaling list corresponds to a new scaling matrix; receive a syntax element that identifies an ID number corresponding to a scaling list of the set of scaling lists that is to be used as the reference scaling list; determine that the set of scaling lists does not include a scaling list with the ID number; and in response to determining that the set of scaling lists does not include the scaling list with the ID number, determine the new scaling matrix based on a set of default values.

Abstract: A video encoder and video decoder may code video data using intra prediction and a block-based delta pulse code modulation (BDPCM) mode. The BDPCM mode may include a vertical mode and a horizontal mode. The video encoder and video decoder may be configured to align the direction of an intra prediction mode to the direction of a BDPCM mode for both luma and chroma blocks.

Abstract: In some examples, a device includes a memory configured to store a current block of the video data and one or more processors coupled to the memory. The one or more processors may be configured to derive a reference sample position (RSP) for a current sample of a current block according to one or more RSP derivation models. The one or more RSP derivation models may include a circular model, an elliptical model, a piece-wise linear model, a table-based model, or a parametric model. The one or more processors may be further configured to determine a reference sample value for a reference sample at the RSP, determine a predicted value for the current sample using the reference sample value, and code the current sample using the predicted value.

Abstract: Systems and techniques for intra-block copy (IBC) prediction in processing video data include the use of one or more virtual search areas (VSAs) which can be generated to include one or more references to one or more pixels stored in a physical memory. The one or more VSAs can provide references to additional reconstructed sample values that are derived from previously decoded blocks without incurring physical memory use for storage of the additional reconstructed samples. A search area for performing the IBC prediction for a current block of the video data can be extended to include the one or more VSAs. Extending the search area to include the one or more VSAs provides the IBC prediction with additional search area for finding one or more prediction blocks or prediction samples without having to utilize physical memory to store the additional reconstructed samples from previously decoded blocks.

Abstract: A video decoder can be configured to determine that a block of the video data is formatted in accordance with a 4:4:4 video coding format; determine that the block of the video data is encoded in an intra prediction mode; determine that a smallest chroma intra prediction unit (SCIPU) is disabled for the block in response to determining that the block has the 4:4:4 video coding format; decode the block of the video data based on the determination that the SCIPU is disabled; and output decoded video data comprising a decoded version of the block.

Abstract: A video coder determines a plurality of available Matrix Intra Prediction (MIP) parameter sets (MPS's) for a picture of video data. The plurality of available MPS's is a union of (i) a subset of all default MPS's and (ii) a set of additional MPS's that are signaled in the bitstream. Each of the default MPS's is associated with a predefined MIP mode in a codec. Each of the set of additional MPS's is associated with a new MIP mode in a set of new MIP modes. The video decoder uses a MIP mode associated with an MPS in the plurality of available MPS's to generate a prediction block for a current block of the picture.

Abstract: A method of decoding video data includes determining, by one or more processors implemented in circuitry, a picture size of a picture. The picture size applies a picture size restriction to set a width of the picture and a height of the picture to each be a respective multiple of a maximum of 8 and a minimum coding unit size for the picture. The method further includes determining, by the one or more processors, a partition of the picture into a plurality of blocks and generating, by the one or more processors, a prediction block for a block of the plurality of blocks. The method further includes decoding, by the one or more processors, a residual block for the block and combining, by the one or more processors, the prediction block and the residual block to decode the block.