Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: A satellite reception assembly may include a housing configured to support receipt and handling of a plurality of satellite signals. The housing may include circuitry incorporating integrated stacking architecture for supporting and/or providing channel and/or band stacking whereby particular channels or bands, from multiple satellite signals that are received via the satellite reception assembly, may be combined onto a single output signal that may be communicated from the satellite reception assembly to a gateway device for concurrent distribution thereby to a plurality of client devices serviced by the gateway device.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: A satellite reception assembly may include a housing configured to support receipt and handling of a plurality of satellite signals. The housing may include circuitry incorporating integrated stacking architecture for supporting and/or providing channel and/or band stacking whereby particular channels or bands, from multiple satellite signals that are received via the satellite reception assembly, may be combined onto a single output signal that may be communicated from the satellite reception assembly to a gateway device for concurrent distribution thereby to a plurality of client devices serviced by the gateway device.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: Methods and systems are provided for integrated channel and/or band stacking solutions. A plurality of signals may be received, such as via a signal receiver, with each of the received signals being different from remaining ones of the plurality signals. At least two received signals may be processed, such as via one or more processing circuits, and an output signal may be generated based on the processing of the at least two received signals. The output signal may include only one or more portions from each of the at least two signals, with the one or more portions being stacked within the output signal. The stacking of the one or more portions from the at least two signals may include applying channel equalization, with the channel equalization including equalizing power of a plurality of sub-components of a frequency band corresponding to the one or more portions.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: A wideband receiver system comprises a wideband analog-to-digital converter (ADC) module and a digital frontend (DFE) module. The wideband ADC is configured to concurrently digitize a band of frequencies comprising a plurality of desired channels and a plurality of undesired channels. The DFE module is coupled to the digital in-phase and quadrature signals. The DFE module is configured to select the plurality of desired channels from the digitized band of frequencies, and generate an intermediate frequency (IF) signal comprising the selected plurality of desired channels and having a bandwidth that is less than a bandwidth of the band of frequencies, where the generation comprises frequency shifting of the selected plurality of desired channels. The IF signal may be a digital signal and the DFE is configured to output the IF signal via a serial or parallel interface.

Abstract: The present invention relates to a novel and improved process for the preparation of Sitagliptin of Formula (I) and its pharmaceutically acceptable salts. The present invention also relates to novel intermediates and process for the preparation of intermediates used in the preparation of Sitagliptin.

Abstract: A microwave backhaul system may comprise a monolithic integrated circuit comprising an on-chip transceiver, digital baseband processing circuitry, and auxiliary interface circuitry. The on-chip transceiver may process a microwave signal from an antenna element to generate a first pair of quadrature baseband signals and convey the first pair of phase-quadrature baseband signals to the digital baseband processing circuitry. The auxiliary interface circuitry may receive one or more auxiliary signals from a source that is external to the monolithic integrated circuit and convey the one or more auxiliary signals to the digital baseband processing circuitry. The digital baseband processing circuitry may be operable to process signals to generate one or more second pairs of phase-quadrature digital baseband signals.

Abstract: An automatic gain control loop disposed in a receiver is adapted to compensate for varying levels of out of band interference sources by adaptively controlling the gain distribution throughout the receive signal path. One or more intermediate received signal strength indicator (RSSI) detectors are used to determine a corresponding intermediate signal level. The output of each RSSI detector is coupled to an associated comparator that compares the intermediate RSSI value against a corresponding threshold. The take over point (TOP) for gain stages is adjusted based in part on the comparator output values. The TOP for each of a plurality of gain stages may be adjusted in discrete steps or continuously.