Abstract: A wideband receiver system is provided to concurrently receive multiple RF channels including a number of desired channels that are located in non-contiguous portions of a radio frequency spectrum and to group the number of desired channels into a contiguous frequency band. The system includes a wideband receiver having a complex mixer for down-shifting the multiple RF channels and transforming them to an in-phase signal and a quadrature signal in the baseband. The system further includes a wideband analog-to-digital converter module that digitizes the in-phase and quadrature signals and a digital frontend module that transforms the digital in-phase and quadrature signals to baseband signals that contains only the number of desired RF channels. that are now located in a contiguous frequency band. An up-converter module up-shifts the baseband signals to a contiguous band in an IF spectrum so that the system can directly interface with commercially available demodulators.

Abstract: Methods and apparatuses for concurrently recording multiple radio channels. A recorder includes a wideband tuner having a complex mixer for converting a received wideband RF signal to a complex signal that is then digitized. A digital front end module applies a number of complex down-mixers to the digital complex signal to generate the multiple radio channels in the baseband. Each one of the multiple radio channels in the baseband is further filtered, decimated and demodulated. A digital signal processing unit encodes each demodulated channel according to an audio compression format and stores the then encoded audio content to a storage unit. An RBDS decoder parses radio data service information associated with the stored audio content. The radio data service information is stored in a first section of the storage unit while the encoded audio content is stored in a second section of the storage unit.

Abstract: An automatic gain control loop disposed in a receiver is adapted to compensate for varying levels of out of band interference sources by adaptively controlling the gain distribution throughout the receive signal path. One or more intermediate received signal strength indicator (RSSI) detectors are used to determine a corresponding intermediate signal level. The output of each RSSI detector is coupled to an associated comparator that compares the intermediate RSSI value against a corresponding threshold. The take over point (TOP) for gain stages is adjusted based in part on the comparator output values. The TOP for each of a plurality of gain stages may be adjusted in discrete steps or continuously.

Abstract: A radio integrated circuit includes, in part, an analog front end block, an analog-to-digital converter responsive to the analog-front end block, a digital signal processor responsive to the analog-to-digital converter and adapted to generate in-phase and quadrature signals, and a serial communication interface configured to receive and transmit the in-phase and quadrature signals. The serial communication interface supplies a gain control signal to the analog front end block when a switch disposed in the radio integrated circuit is in a first position. When the switch is in a second position, a gain control block disposed in the radio integrated circuit receives a gain control signal from the analog-to-digital converter and supplies the gain control signal to the analog front end block. The digital signal processor may be configured to interleave the in-phase and quadrature signals.

Abstract: A testing architecture for testing a complex integrated circuit in which each functional unit may be tested independently of the others. Embodiments of the invention allow testing of functional units to take place at slower or faster clock speeds than other portions of the processor without incurring delay or other adverse timing effects.

Abstract: Embodiments of the invention provide techniques for calibrating voltage-controlled oscillators (VCOs). Multiple VCOs may be disposed on a chip with the VCOs having different frequency ranges. The VCOs may be selected and tested to determine a desired VCO to use to tune to a selected channel frequency. Each of the VCOs has multiple possible varactor configurations. The varactor configurations of the desired VCO determined to be used to tune to the selected channel frequency can be selected and tested to determine a desired varactor configuration for the desired VCO. The desired VCO with the desired varactor configuration will preferably be able to produce a full range of desired frequencies corresponding to all channel frequencies desired.

Abstract: Embodiments of the invention provide techniques for calibrating voltage-controlled oscillators (VCOs). Multiple VCOs may be disposed on a chip with the VCOs having different frequency ranges. The VCOs may be selected and tested to determine a desired VCO to use to tune to a selected channel frequency. Each of the VCOs has multiple possible varactor configurations. The varactor configurations of the desired VCO determined to be used to tune to the selected channel frequency can be selected and tested to determine a desired varactor configuration for the desired VCO. The desired VCO with the desired varactor configuration will preferably be able to produce a full range of desired frequencies corresponding to all channel frequencies desired.

Abstract: A system for varying output power of variable-gain amplifiers (VGA) allows for varying the output power transfer function, thus varying the gain, and, hence, the resolution of the output power of the VGA. The preferred embodiment comprises a variable-slope VGA (VSVGA) circuit configured to operate within a closed-loop power-controlled CDMA handset. The VSVGA circuit manipulates the input control voltage of the VGA, thereby, adjusting the gain of the amplifier by varying the slope of a line which models the amplifier output transfer function. Varying gain of the VGA provides for a varying resolution in the VGA amplifier output transfer function. This variation allows for compatibility of a single CDMA handset with different industry standards.

Abstract: A driver system for a power amplifier in a wireless communication handset. The driver system includes a driver and a current source. The driver drives the power amplifier at a level of linearity determined responsive to a variable input bias current provided by the current source. The current source varies the bias current, and thus the degree of linearity provided, responsive to the desired output power of the handset.