Patents by Inventor Maheswaran Surendra

Maheswaran Surendra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080004991
    Abstract: A global service management configuration comprises a plurality of interrelated administrative objects. One or more of the plurality of interrelated administrative objects provide access control of one or more of a plurality of configuration items of a configuration management database by at least one of the plurality of interrelated administrative objects.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 3, 2008
    Applicant: International Business Machines Corporation
    Inventors: Glenn C. Aikens, Naga A. Ayachitula, Messaoud B. Benantar, Krishna S. Garimella, Hari Haranath Madduri, Yan Or, Larisa Shwartz, Maheswaran Surendra, Steve Weinberger
  • Publication number: 20080005317
    Abstract: Techniques are disclosed for providing cross-tier management in a multi-tier computing system architecture. For example, a method for managing a computing system, wherein the computing system includes a first tier and at least a second tier, wherein the first tier and the second tier are configured to respond to a request received by the computing system, includes the steps of monitoring performance of the second tier from the first tier, and sending one or more management commands from the first tier to the second tier based on the monitored performance. In one embodiment, the first tier may be an application server tier of the computing system, and the second tier may be a database server tier of the computing system.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 3, 2008
    Applicant: International Business Machines Corporation
    Inventors: Yixin Diao, Hidayatullah Habeebullah Shaikh, Maheswaran Surendra
  • Publication number: 20080005186
    Abstract: Methods and apparatus of managing a CMDB are provided. At least one composite CI is utilized in the CMDB. The at least one composite CI is represented as a graph of navigable relationships between one or more supporting elements in accordance with a template. The one or more supporting elements comprise at least a root element of the composite CI.
    Type: Application
    Filed: June 30, 2006
    Publication date: January 3, 2008
    Applicant: International Business Machines Corporation
    Inventors: Naga A. Ayachitula, Krishna S. Garimella, Yan Or, Larisa Shwartz, Maheswaran Surendra
  • Publication number: 20070294309
    Abstract: Embodiments of the present invention address deficiencies of the art in respect to server provisioning in a heterogeneous computing environment and provide a method, system and computer program product for secure and verified distributed orchestration and provisioning. In one embodiment of the invention, a server provisioning method can be provided. The server provisioning method can include establishing grouping criteria, grouping different target computing nodes into different groups of target computing nodes according to the established grouping criteria, server provisioning a root node in each of the different groups of target computing nodes, and relying upon the root node in each of the different groups to peer-to-peer server provision remaining nodes in each of the different groups.
    Type: Application
    Filed: June 19, 2006
    Publication date: December 20, 2007
    Applicant: International Business Machines Corporation
    Inventors: Larisa Shwartz, Maheswaran Surendra, Naga A. Ayachitula, Genady Grabarnik, James S. Lipscomb
  • Patent number: 7309649
    Abstract: A method to form a closed air gap interconnect structure is described. A starting structure made of regions of a permanent support dielectric under the interconnect lines and surrounding interconnect vias with one or more sacrificial dielectrics present in the remaining portions of the interconnect structure, is capped with a dielectric barrier which is perforated using a stencil with a regular array of holes. The sacrificial dielectrics are then extracted through the holes in the dielectric barrier layer such that the interconnect lines are substantially surrounded by air except for the regions of the support dielectric under the lines. The holes in the cap layer are closed off by depositing a second barrier dielectric so that a closed air gap is formed. Several embodiments of this method and the resulting structures are described.
    Type: Grant
    Filed: April 17, 2006
    Date of Patent: December 18, 2007
    Assignee: International Business Machines Corporation
    Inventors: Matthew E Colburn, Timothy J Dalton, Elbert Huang, Anna Karecki, legal representative, Satya V Nitta, Sampath Purushothaman, Katherine L Saenger, Maheswaran Surendra, Simon M Karecki, deceased
  • Publication number: 20070240162
    Abstract: Automated or autonomic techniques for managing deployment of one or more resources in a computing environment based on varying workload levels. The automated techniques may comprise predicting a future workload level based on data associated with the computing environment. Then, an estimation is performed to determine whether a current resource deployment is insufficient, sufficient, or overly sufficient to satisfy the future workload level. Then, one or more actions are caused to be taken when the current resource deployment is estimated to be insufficient or overly sufficient to satisfy the future workload level. Actions may comprise resource provisioning, resource tuning and/or admission control.
    Type: Application
    Filed: June 15, 2007
    Publication date: October 11, 2007
    Applicant: International Business Machines Corporation
    Inventors: David Coleman, Steven Froehlich, Joseph Hellerstein, Lawrence Hsiung, Edwin Lassettre, Todd Mummert, Mukund Raghavachari, Lance Russell, Maheswaran Surendra, Noshir Wadia, Peng Ye
  • Publication number: 20070233991
    Abstract: Methods and systems are provided for tuning memory allocated among a plurality of applications in a data processing system. In one implementation, the method includes generating memory benefit data for the plurality of applications, comparing the generated memory benefit data associated with each of the plurality of applications, and dynamically reallocating memory from one or more of the plurality of applications to one or more other of the plurality of applications based on the comparison. A method and system is also provided for tuning memory allocated among a plurality of individual memory consumers for a given application.
    Type: Application
    Filed: March 30, 2006
    Publication date: October 4, 2007
    Inventors: Yixin Diao, James Finnie, Christian Garcia-Arellano, Sam Lightstone, Lan Pham, Adam Storm, Maheswaran Surendra, Gary Valentin, Daniele Zilio
  • Publication number: 20070220509
    Abstract: A system, method, and computer program product for provisioning software on at least one node in a plurality of computational nodes in a distributed information processing system are disclosed. The method includes accepting a plurality of requirements associated with a software product. The plurality of requirements is expanded into multiple sets of installation requirements. At least one set of installation requirements in the multiple sets of installation requirements is minimized to produce at least one minimized set of installation requirements. At least one installation topology is determined using Rough Set Theory for the software product based on the at least one minimized set of installation requirements. The at least one installation topology is compared to a set of capabilities included on at least one computational node to determine a respective set of missing resources for the at least one computational node.
    Type: Application
    Filed: February 24, 2006
    Publication date: September 20, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Larisa Shwartz, Naga Ayachitula, Maheswaran Surendra, Genady Grabarnik
  • Patent number: 7243169
    Abstract: A method for reducing oscillations of an output value associated with a program to be operatively coupled to a data processing system. The program having an internal process configured to read an input value provided by the program, the input value adjusting a performance aspect of the internal process, the internal process configured to provide an output value reflecting changes in the internal process responsive to the input value, the output value readable by the program.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: July 10, 2007
    Assignee: International Business Machines Corporation
    Inventors: Matthew James Carroll, Christian Marcelo Garcia-Arellano, Sam Sampson Lightstone, Maheswaran Surendra, Adam J. Storm, Yixin Diao
  • Publication number: 20060267208
    Abstract: A method to form a closed air gap interconnect structure is described. A starting structure made of regions of a permanent support dielectric under the interconnect lines and surrounding interconnect vias with one or more sacrificial dielectrics present in the remaining portions of the interconnect structure, is capped with a dielectric barrier which is perforated using a stencil with a regular array of holes. The sacrificial dielectrics are then extracted through the holes in the dielectric barrier layer such that the interconnect lines are substantially surrounded by air except for the regions of the support dielectric under the lines. The holes in the cap layer are closed off by depositing a second barrier dielectric so that a closed air gap is formed. Several embodiments of this method and the resulting structures are described.
    Type: Application
    Filed: April 17, 2006
    Publication date: November 30, 2006
    Inventors: Matthew Colburn, Timothy Dalton, Elbert Huang, Simon Karecki, Satya Nitta, Sampath Purushothaman, Katherine Saenger, Maheswaran Surendra
  • Publication number: 20060258147
    Abstract: A method to form a closed air gap interconnect structure is described. A starting structure made of regions of a permanent support dielectric under the interconnect lines and surrounding interconnect vias with one or more sacrificial dielectrics present in the remaining portions of the interconnect structure, is capped with a dielectric barrier which is perforated using a stencil with a regular array of holes. The sacrificial dielectrics are then extracted through the holes in the dielectric barrier layer such that the interconnect lines are substantially surrounded by air except for the regions of the support dielectric under the lines. The holes in the cap layer are closed off by depositing a second barrier dielectric so that a closed air gap is formed. Several embodiments of this method and the resulting structures are described.
    Type: Application
    Filed: April 17, 2006
    Publication date: November 16, 2006
    Inventors: Matthew Colburn, Timothy Dalton, Elbert Huang, Simon Karecki, Anna Karecki, Satya Nitta, Sampath Purushothaman, Katherine Saenger, Maheswaran Surendra
  • Publication number: 20060259905
    Abstract: Techniques for managing feedback control systems are provided. By way of example, a method of controlling performance of a managed system by a controller includes the following steps/operations. The controller issues a control value to the managed system to affect a performance of the managed system. The controller maintains a measurement time period having a variable start time within which the performance of the managed system is measured, such that the control value is given time to take effect on the managed system and a performance metric fed back to the controller from the managed system reflects the effect of the control value on the managed system.
    Type: Application
    Filed: May 11, 2006
    Publication date: November 16, 2006
    Applicant: International Business Machines Corporation
    Inventors: Yixin Diao, Sujay Parekh, Maheswaran Surendra, Ronghua Zhang
  • Patent number: 7056782
    Abstract: The present invention provides a complementary metal oxide semiconductor integration process whereby a plurality of silicided metal gates are fabricated atop a gate dielectric. Each silicided metal gate that is formed using the integration scheme of the present invention has the same silicide metal phase and substantially the same height, regardless of the dimension of the silicide metal gate. The present invention also provides various methods of forming a CMOS structure having silicided contacts in which the polySi gate heights are substantially the same across the entire surface of a semiconductor structure.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: June 6, 2006
    Assignee: International Business Machines Corporation
    Inventors: Ricky S. Amos, Diane C. Boyd, Cyril Cabral, Jr., Richard D. Kaplan, Jakub T. Kedzierski, Victor Ku, Woo-Hyeong Lee, Ying Li, Anda C. Mocuta, Vijay Narayanan, An L. Steegen, Maheswaran Surendra
  • Publication number: 20060112075
    Abstract: Techniques are provided for use in accordance with relates to computing utilities. For example, in one aspect of the invention, a method for use in a computing utility, wherein the computing utility comprises a plurality of application service provider systems and a utility controller, and each application service provider system comprising an application controller, comprises the following steps. An application request to one of the plurality of application service provider systems is obtained. Then, in response to the application request, at least one of: (i) the application controller of the application service provider system to which the application request is directed computes a value of a business metric associated with a resource action; and (ii) the utility controller computes a value of a business metric associated with a resource action.
    Type: Application
    Filed: November 19, 2004
    Publication date: May 25, 2006
    Applicant: International Business Machines Corporation
    Inventors: Joseph Hellerstein, Kaan Katircioglu, Maheswaran Surendra
  • Patent number: 7039559
    Abstract: Techniques for performing adaptive and robust prediction. Prediction techniques are adaptive in that they use a minimal amount of historical data to make predictions, the amount of data being selectable. The techniques are able to learn quickly about changes in the workload traffic pattern and make predictions, based on such learning, that are useful for proactive response to workload changes. To counter the increased variability in the prediction as a result of using minimal history, robustness is improved by checking model stability at every time interval and revising the model structure as needed to meet designated stability criteria. Furthermore, the short term prediction techniques can be used in conjunction with a long term forecaster.
    Type: Grant
    Filed: March 10, 2003
    Date of Patent: May 2, 2006
    Assignee: International Business Machines Corporation
    Inventors: Steven E. Froehlich, Joseph L. Hellerstein, Edwin Richie Lassettre, Todd William Mummert, Maheswaran Surendra
  • Publication number: 20050278381
    Abstract: In one embodiment, functional system elements are added to an autonomic manager to enable automatic online sample interval selection. In another embodiment, a method for determining the sample interval by continually characterizing the system workload behavior includes monitoring the system data and analyzing the degree to which the workload is stationary. This makes the online optimization method less sensitive to system noise and capable of being adapted to handle different workloads. The effectiveness of the autonomic optimizer is thereby improved, making it easier to manage a wide range of systems.
    Type: Application
    Filed: May 26, 2004
    Publication date: December 15, 2005
    Inventors: Yixin Diao, Joseph Hellerstein, Sam Lightstone, Adam Storm, Maheswaran Surendra
  • Publication number: 20050273643
    Abstract: A method for reducing oscillations of an output value associated with a program to be operatively coupled to a data processing system. The program having an internal process configured to read an input value provided by the program, the input value adjusting a performance aspect of the internal process, the internal process configured to provide an output value reflecting changes in the internal process responsive to the input value, the output value readable by the program.
    Type: Application
    Filed: June 8, 2004
    Publication date: December 8, 2005
    Applicant: International Business Machines Corporation
    Inventors: Matthew Carroll, Christian Garcia-Arellano, Sam Lightstone, Maheswaran Surendra, Adam Storm, Yixin Diao
  • Publication number: 20050268063
    Abstract: Systems and methods are provided for optimizing the performance and/or allocation of constrained resources in a dynamic computing environment using adaptive regulatory control methods. For example, systems and methods for providing constrained optimization in a dynamic computing system implement model-based adaptive (self-tuning) regulatory control schemes that are designed to handle the system dynamics and which take into consideration control costs (such as the overheads of changing resource allocations and performance degradation due to transient load imbalances) to find an optimal solution. To facilitate practical application, a dual control architecture is disclosed which combines a heuristic fixed step control process that is implemented when there is no valid system model for model-based control. A system model is continually obtained and validated during run-time to adapt control parameters to variations in system dynamics.
    Type: Application
    Filed: May 25, 2004
    Publication date: December 1, 2005
    Inventors: Yixin Diao, Christian Garcia-Arellano, Joseph Hellerstein, Sam Lightstone, Sujay Parekh, Adam Storm, Maheswaran Surendra
  • Patent number: 6936522
    Abstract: A first aspect of the present invention is a method of forming an isolation structure including: (a) providing a semiconductor substrate; (b) forming a buried N-doped region in the substrate; (c) forming a vertical trench in the substrate, the trench extending into the N-doped region; (d) removing the N-doped region to form a lateral trench communicating with and extending perpendicular to the vertical trench; and (e) at least partially filling the lateral trench and filling the vertical trench with one or more insulating materials.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: August 30, 2005
    Assignee: International Business Machines Corporation
    Inventors: An L. Steegen, Maheswaran Surendra, Hsing-Jen Wann, Ying Zhang, Franz Zach, Robert Wong
  • Publication number: 20050186747
    Abstract: The present invention provides a complementary metal oxide semiconductor integration process whereby a plurality of silicided metal gates are fabricated atop a gate dielectric. Each silicided metal gate that is formed using the integration scheme of the present invention has the same silicide metal phase and substantially the same height, regardless of the dimension of the silicide metal gate. The present invention also provides various methods of forming a CMOS structure having silicided contacts in which the polySi gate heights are substantially the same across the entire surface of a semiconductor structure.
    Type: Application
    Filed: February 25, 2004
    Publication date: August 25, 2005
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ricky Amos, Diane Boyd, Cyril Cabral, Richard Kaplan, Jakub Kedzierski, Victor Ku, Woo-Hyeong Lee, Ying Li, Anda Mocuta, Vijay Narayanan, An Steegen, Maheswaran Surendra