Abstract: A method of forming a notched gate structure having substantially vertical sidewalls and a sub-0.05 &mgr;m electrical critical dimension is provided. The method includes forming a conductive layer on an insulating layer; forming a mask on the conductive layer so as to at least protect a portion of the conductive layer; anisotropically etching the conductive layer not protected by the mask so as to thin the conductive layer to a predetermined thickness and to form a conductive feature underlying the mask, the conductive feature having substantially vertical sidewalls; forming a passivating layer at least on the substantially vertical sidewalls; and isotropically etching remaining conductive layer not protected by the mask to remove the predetermined thickness thereby exposing a lower portion of said conductive feature not containing the passivating layer, while simultaneously removing notched regions in the lower portion of the conductive feature.

Abstract: A method and structure for controlling a manufacturing tool includes measuring different manufacturing parameters of the tool, transforming a plurality of time series of the manufacturing parameters into intermediate variables based on restrictions and historical reference statistics, generating a surrogate variable based on the intermediate variables, if the surrogate variable exceeds a predetermined limit, identifying a first intermediate variable, of the intermediate variables, that caused the surrogate variable to exceed the predetermined limit and identifying a first manufacturing parameter associated with the first intermediate variable, and inhibiting further operation of the tool until the first manufacturing parameter has been modified to bring the surrogate value within the predetermined limit.

Abstract: A process for making abrupt, e.g. <20 nm/decade, PN junctions and haloes in, e.g., CMOSFETs having gate lengths of, e.g. <50 nm, uses a mask, e.g., sidewall spacers, during ion implantation of gate, source, and drain regions. The mask is removed after source-drain activation by annealing and source and drain extension regions are then implanted. Then the extension regions are activated. Thereafter halo regions are implanted and activated preferably using spike annealing to prevent their diffusion. The process can also be used to make diodes, bipolar transistors, etc. The activation annealing steps can be combined into a single step near the end of the process.

Abstract: A method and structure for controlling a manufacturing tool includes measuring different manufacturing parameters of the tool, transforming a plurality of time series of the manufacturing parameters into intermediate variables based on restrictions and historical reference statistics, generating a surrogate variable based on the intermediate variables, if the surrogate variable exceeds a predetermined limit, identifying a first intermediate variable, of the intermediate variables, that caused the surrogate variable to exceed the predetermined limit and identifying a first manufacturing parameter associated with the first intermediate variable, and inhibiting further operation of the tool until the first manufacturing parameter has been modified to bring the surrogate value within the predetermined limit.

Abstract: A method of preparing an x-ray mask comprising providing a substrate, and applying sequentially to a surface of the substrate i) an etch stop layer resistant to etchant for an x-ray absorber, and ii) an x-ray absorber layer. The method then includes removing a portion of the substrate below the layers to create an active region of the substrate above the removed portion of the substrate and an inactive region over remaining portions of the substrate, applying a resist layer above the absorber layer, and exposing a portion of the resist layer using electron beam irradiation and developing the resist layer to form a latent mask image over the active region of the substrate.

Abstract: A method of preparing an x-ray mask comprising providing a substrate, and applying sequentially to a surface of the substrate i) an etch stop layer resistant to etchant for an x-ray absorber, and ii) an x-ray absorber layer. The method then includes removing a portion of the substrate below the layers to create an active region of the substrate above the removed portion of the substrate and an inactive region over remaining portions of the substrate, applying a resist layer above the absorber layer, and exposing a portion of the resist layer using electron beam irradiation and developing the resist layer to form a latent mask image over the active region of the substrate.

Abstract: A device for reducing plasma irregularities includes an electrode assembly capable of applying an electric potential to said plasma. The electrode assembly includes a portion for reducing the plasma irregularities. The portion which reduces the plasma irregularities includes alternately a buried portion which is capable of altering the potential within the buried element, or else a conditioned portion of the surface which controls reflectivity and/or emissivity of portions of a surface of the electrode assembly differently.