Patents by Inventor Makoto Miyoshi

Makoto Miyoshi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11989292
    Abstract: An analysis function imparting device according to the present invention includes processing circuitry configured to execute a script engine while monitoring the script engine to acquire an execution trace including an application programming interface (API) trace and a branch trace, analyze the execution trace, and detect a hook point that is a location to which a hook is applied and a code for analysis is inserted, detect, based on monitoring at the hook point, a tap point that is a memory monitoring location at which the code for analysis outputs a log, and apply a hook to the script engine to impart an analysis function to the script engine based on the hook point and the tap point.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: May 21, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Toshinori Usui, Yuto Otsuki, Makoto Iwamura, Yuhei Kawakoya, Jun Miyoshi
  • Publication number: 20240152611
    Abstract: A trace information determination device includes an extraction unit that extracts a feature of malware, a classification unit that performs clustering on the basis of the feature of malware extracted by the extraction unit and classifies the malware into a predetermined cluster, an attack tendency determination unit that determines a tendency of an attack of the malware on the basis of the cluster classified by the classification unit, and a validity determination unit that determines validity of trace information generated from an activity trace of the malware on the basis of a result of determination by the attack tendency determination unit.
    Type: Application
    Filed: March 16, 2021
    Publication date: May 9, 2024
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Toshinori USUI, Tomonori IKUSE, Yuhei KAWAKOYA, Makoto IWAMURA, Jun MIYOSHI
  • Publication number: 20240152615
    Abstract: An activity trace extraction device executes malware to collect an analysis log including a plurality of activity traces of the malware, and executes the malware again to collect an environment change analysis log including the plurality of activity traces of the malware assumed in a case where an execution environment of a system and a device used at execution of the malware and information unique to application software are changed. The activity trace extraction device updates, based on the analysis log and the environment change analysis log, the analysis log by removing, from the analysis log, an activity trace different from an activity trace of the environment change analysis log among the plurality of activity traces included in the analysis log. The activity trace extraction device generates trace information of the malware independent of the execution environment based on the analysis log updated.
    Type: Application
    Filed: March 16, 2021
    Publication date: May 9, 2024
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Toshinori USUI, Tomonori IKUSE, Yuhei KAWAKOYA, Makoto IWAMURA, Jun MIYOSHI
  • Publication number: 20240152603
    Abstract: An activity trace extraction device executes malware to collect an analysis log including a plurality of activity traces of the malware, and executes the malware again in an environment indicating time information different from time information at the time of executing the malware to collect a time change analysis log including a plurality of activity traces of the malware. The activity trace extraction device updates the analysis log by removing, from the analysis log, the activity trace different from the activity trace of the time change analysis log among the plurality of activity traces included in the analysis log based on the analysis log and the time change analysis log. The activity trace extraction device generates trace information of the malware independent of time lapse based on the updated analysis log.
    Type: Application
    Filed: March 16, 2021
    Publication date: May 9, 2024
    Applicant: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Toshinori USUI, Tomonori IKUSE, Yuhei KAWAKOYA, Makoto IWAMURA, Jun MIYOSHI
  • Patent number: 9382641
    Abstract: An epitaxial substrate having preferable two dimensional electron gas characteristic and contact characteristic is provided in the present invention. A channel layer is formed on a base substrate with GaN. A spacer layer is formed on the channel layer with AlN. A barrier layer is formed on the spacer layer with group III nitride having a composition of InXAlyGazN (wherein x+y+z=1) and at least including In, Al, and Ga such that the composition of the barrier layer is within the range surrounded with four lines defined in accordance with the composition on a ternary phase diagram with InN, AlN, and GaN as vertexes.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: July 5, 2016
    Assignee: NGK Insulators, Ltd.
    Inventors: Mikiya Ichimura, Makoto Miyoshi, Mitsuhiro Tanaka
  • Patent number: 9171914
    Abstract: A semiconductor device having small leakage current and high breakdown voltage during reverse blocking, small on-state resistance and large output current at forward conduction, short reverse recovery time at shutoff, and high peak surge current value is provided. An n-type layer is made of a group-III nitride, and a p-type layer is made of a group-IV semiconductor material having a smaller band gap than the group-III nitride. The energy level at the top of the valence band of the n-type layer is lower than the energy level at the top of the valence band of the p-type layer, so that a P-N junction semiconductor device satisfying the above requirements is obtained. Further, a combined structure of P-N junction and Schottky junction by additionally providing an anode electrode to be in Schottky contact with the n-type layer also achieves the effect of decreasing voltage at the rising edge of current resulting from the Schottky junction.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: October 27, 2015
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Yoshitaka Kuraoka
  • Patent number: 9090993
    Abstract: Provided is a crack-free epitaxial substrate with reduced warping, in which a silicon substrate is used as a base substrate. The epitaxial substrate includes a (111) single crystal Si substrate, a superlattice layer group in which a plurality of superlattice layers are laminated, and a crystal layer. The superlattice layer is formed of a first unit layer and a second unit layer made of group-III nitrides having different compositions being alternately and repeatedly laminated. The crystal layer is made of a group-III nitride and formed above the base substrate so as to be positioned at an upper side of the superlattice layer group relative to the base substrate. The superlattice layer group has a compressive strain contained therein. In the superlattice layer group, the more distant the superlattice layer is from the base substrate, the greater the compressive strain becomes.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: July 28, 2015
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Shigeaki Sumiya, Mikiya Ichimura, Tomohiko Sugiyama, Mitsuhiro Tanaka
  • Patent number: 9024325
    Abstract: Provided is an epitaxial substrate for use in a semiconductor element, having excellent characteristics and capable of suitably suppressing diffusion of elements from a cap layer. An epitaxial substrate for use in a semiconductor element, in which a group of group-III nitride layers are laminated on a base substrate such that a (0001) crystal plane of the group of group-III nitride layers is substantially in parallel with a substrate surface of the base substrate, includes: a channel layer made of a first group-III nitride having a composition of Inx1Aly1Gaz1N (x1+y1+z1=1, z1>0); a barrier layer made of a second group-III nitride having a composition of Inx2Aly2N (x2+y2=1, x2>0, y2>0); an anti-diffusion layer made of AlN and having a thickness of 3 nm or more; and a cap layer made of a third group-III nitride having a composition of Inx3Aly3Gaz3N (x3+y3+z3=1, z3>0).
    Type: Grant
    Filed: January 22, 2013
    Date of Patent: May 5, 2015
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Tomohiko Sugiyama, Mikiya Ichimura, Mitsuhiro Tanaka
  • Patent number: 8969880
    Abstract: Provided is a crack-free epitaxial substrate having a small amount of warping, in which a silicon substrate is used as a base substrate. The epitaxial substrate includes: a (111) single crystal Si substrate and a buffer layer formed of a plurality of lamination units being continuously laminated. The lamination unit includes: a composition modulation layer formed of a first and a second unit layer having different compositions being alternately and repeatedly laminated such that a compressive strain exists therein; a termination layer formed on an uppermost portion of the composition modulation layer, the termination layer acting to maintain the compressive strain existing in the composition modulation layer; and a strain reinforcing layer formed on the termination layer, the strain reinforcing layer acting to enhance the compressive strain existing in the composition modulation layer.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: March 3, 2015
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Shigeaki Sumiya, Mikiya Ichimura, Sota Maehara, Mitsuhiro Tanaka
  • Patent number: 8946723
    Abstract: Provided is a crack-free epitaxial substrate having excellent breakdown voltage properties in which a silicon substrate is used as a base. The epitaxial substrate includes a (111) single crystal Si substrate and a buffer layer including a plurality of first lamination units. Each of those units includes a composition modulation layer formed of a first composition layer made of AlN and a second composition layer made of AlxGa1-xN being alternately laminated, and a first intermediate layer made of AlyGa1-yN (0?y<1). The relationship of x(1)?x(2)? . . . ?x(n?1)?x(n) and x(1)>x(n) is satisfied, where n represents the number of laminations of each of the first and second composition layers, and x(i) represents the value of x in i-th one of the second composition layers as counted from the base substrate side. The second composition layer is coherent to the first composition layer, and the first intermediate layer is coherent to the composition modulation layer.
    Type: Grant
    Filed: October 23, 2012
    Date of Patent: February 3, 2015
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Shigeaki Sumiya, Mikiya Ichimura, Sota Maehara, Mitsuhiro Tanaka
  • Patent number: 8890208
    Abstract: Provided is an epitaxial substrate capable of manufacturing a HEMT device that has excellent two-dimensional electron gas characteristics and is capable of performing normally-off operation. A channel layer is formed of a first group III nitride represented by Inx1Aly1Gaz1N (x1+y1+z1=1) so as to have a composition in a range determined by x1=0 and 0?y1?0.3. A barrier layer is formed of a second group III nitride represented by Inx2Aly2Gaz2N (x2+y2+z2=1) so as to have a composition, in a ternary phase diagram with InN, AlN and GaN being vertices, in a range surrounded by four straight lines determined in accordance with the composition (AlN molar fraction) of the first group III nitride and to have a thickness of 5 nm or less.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: November 18, 2014
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Yoshitaka Kuraoka, Shigeaki Sumiya, Mitsuhiro Tanaka
  • Patent number: 8872226
    Abstract: Provided is an epitaxial substrate having excellent two-dimensional electron gas characteristics and reduced internal stress due to strains. A channel layer is formed of a first group III nitride represented by Inx1Aly1Gaz1N (x1+y1+z1=1) so as to have a composition in a range determined by x1=0 and 0?y1?0.3. A barrier layer is formed of a second group III nitride represented by Inx2Aly2Gaz2N (x2+y2+z2=1) so as to have a composition, in a ternary phase diagram with InN, AlN and GaN being vertices, in a range surrounded by five straight lines determined in accordance with the composition (AlN molar fraction) of the first group III nitride.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: October 28, 2014
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Yoshitaka Kuraoka, Shigeaki Sumiya, Mitsuhiro Tanaka
  • Patent number: 8860084
    Abstract: Provided is a semiconductor device of normally-off operation type having a low on-resistance. An epitaxial substrate for it includes: a base substrate; a channel layer made of a first group-III nitride having a composition of Inx1Aly1Gaz1N at least containing Al and Ga and x1=0 and 0?y1?0.3; and a barrier layer made of a second group-III nitride having a composition of Inx2Aly2Gaz2N at least containing In and Al. The composition of the second group-III nitride is, in a ternary phase diagram for InN, AlN, and GaN, in a certain range that is determined in accordance with the composition of the first group-III nitride. The barrier layer has a thickness of 3 nm or less. A low-crystallinity insulating layer is further formed on the barrier layer. The low-crystallinity insulating layer is made of silicon nitride and has a thickness of 3 nm or less.
    Type: Grant
    Filed: February 21, 2013
    Date of Patent: October 14, 2014
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Mikiya Ichimura, Mitsuhiro Tanaka
  • Patent number: 8853735
    Abstract: Provided is an epitaxial substrate for a semiconductor device, which has excellent schottky contact characteristics that are stable over time. The epitaxial substrate for a semiconductor device includes a base substrate, a channel layer formed of a first group III nitride containing at least Ga and having a composition of Inx1Aly1Gaz1N (x1+y1+z1=1), and a barrier layer formed of a second group III nitride containing at least In and Al and having a composition of Inx2Aly2Gaz2N (x2+y2+z2=1), wherein the barrier layer has tensile strains in an in-plane direction, and pits are formed on a surface of the barrier layer at a surface density of 5×107/cm2 or more and 1×109/cm2 or less.
    Type: Grant
    Filed: September 20, 2012
    Date of Patent: October 7, 2014
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Mikiya Ichimura, Tomohiko Sugiyama, Mitsuhiro Tanaka
  • Patent number: 8853828
    Abstract: An epitaxial substrate, in which a group of group-III nitride layers is formed on a single-crystal silicon substrate so that a crystal plane is approximately parallel to a substrate surface, comprises: a first group-III nitride layer formed of AlN on the base substrate; a second group-III nitride layer formed of InxxAlyyGazzN (xx+yy+zz=1, 0?xx?1, 0<yy?1 and 0<zz?1) on the first group-III nitride layer; and at least one third group-III nitride layer epitaxially-formed on the second group-III nitride layer, wherein: the first group-III nitride layer is a layer containing multiple defects including at least one type of a columnar crystal, a granular crystal, a columnar domain and a granular domain; and an interface between the first group-III nitride layer and the second group-III nitride layer is a three-dimensional asperity surface.
    Type: Grant
    Filed: January 19, 2012
    Date of Patent: October 7, 2014
    Assignee: NGK Insulators, Ltd.
    Inventors: Shigeaki Sumiya, Makoto Miyoshi, Tomohiko Sugiyama, Mikiya Ichimura, Yoshitaka Kuraoka, Mitsuhiro Tanaka
  • Patent number: 8853829
    Abstract: Provided is a crack-free epitaxial substrate having a small amount of dislocations in which a silicon substrate is used as a base substrate. An epitaxial substrate includes a substrate made of (111) single crystal silicon and a base layer group in which a plurality of base layers are laminated. Each of the plurality of base layers includes a first group-III nitride layer made of AlN and a second group-III nitride layer made of AlyyGazzN formed on the first group-III nitride layer. The first group-III nitride layer has many crystal defects. An interface between the first and second group-III nitride layers is a three-dimensional concavo-convex surface. In the base layer other than the base layer formed immediately above the base substrate, the first group-III nitride layer has a thickness of 50 nm or more and 100 nm or less and the second group-III nitride layer satisfies 0?yy?0.2.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: October 7, 2014
    Assignee: NGK Insulators, Ltd
    Inventors: Makoto Miyoshi, Mikiya Ichimura, Sota Maehara, Mitsuhiro Tanaka
  • Patent number: 8648351
    Abstract: Provided is a crack-free epitaxial substrate having excellent breakdown voltage properties in which a silicon substrate is used as a base substrate thereof. The epitaxial substrate includes: a (111) single crystal Si substrate and a buffer layer including a plurality of composition modulation layers each formed of a first composition layer made of AlN and a second composition layer made of AlxGa1-xN (0?x<1) being alternately laminated. The relationship of x(1)?x(2)? . . . ?x(n?1)?x(n) and x(1)>x(n) is satisfied, where n represents the number of laminations of each of the first and the second composition layer, and x(i) represents the value of x in i-th one of the second composition layers as counted from the base substrate side. Each of the second composition layers is formed so as to be in a coherent state relative to the first composition layer.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: February 11, 2014
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Shigeaki Sumiya, Mikiya Ichimura, Sota Maehara, Mitsuhiro Tanaka
  • Patent number: 8598626
    Abstract: Provided is an epitaxial substrate for semiconductor device that is capable of achieving a semiconductor device having high reliability in reverse characteristics of schottky junction. An epitaxial substrate for semiconductor device obtained by forming, on a base substrate, a group of group III nitride layers by lamination such that a (0001) crystal plane of each layer is approximately parallel to a substrate surface includes: a channel layer formed of a first group III nitride having a composition of Inx1Aly1Gaz1N (x1+y1+z1=1, z1>0); and a barrier layer formed of a second group III nitride having a composition of Inx2Aly2N (x2+y2=1, x2>0, y2>0), wherein the second group III nitride is a short-range-ordered mixed crystal having a short-range order parameter ? satisfying a range where 0???1.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: December 3, 2013
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Yoshitaka Kuraoka, Shigeaki Sumiya, Mikiya Ichimura, Tomohiko Sugiyama, Mitsuhiro Tanaka
  • Patent number: 8471265
    Abstract: Provided is a crack-free epitaxial substrate having a small amount of warping, in which a silicon substrate is used as a base substrate. The epitaxial substrate includes a (111) single crystal Si substrate, a buffer layer, and a crystal layer. The buffer layer is formed of a first lamination unit and a second lamination unit being alternately laminated. The first lamination unit includes a composition modulation layer and a first intermediate layer. The composition modulation layer is formed of a first unit layer and a second unit layer having different compositions being alternately and repeatedly laminated so that a compressive strain exists therein. The first intermediate layer enhances the compressive strain existing in the composition modulation layer. The second lamination unit is a second intermediate layer that is substantially strain-free.
    Type: Grant
    Filed: March 7, 2012
    Date of Patent: June 25, 2013
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Shigeaki Sumiya, Mikiya Ichimura, Sota Maehara, Mitsuhiro Tanaka
  • Patent number: 8415690
    Abstract: Provided is an epitaxial substrate using a silicon substrate as a base substrate. An epitaxial substrate, in which a group of group-III nitride layers are formed on a (111) single crystal Si substrate such that a (0001) crystal plane of the group of group-III nitride layers is substantially in parallel with a surface of the substrate, includes: a first group-III nitride layer made of AlN with many defects configured of at least one kind from a columnar or granular crystal or domain; a second group-III nitride layer whose interface with the first group-III nitride layer is shaped into a three-dimensional concave-convex surface; and a third group-III nitride layer epitaxially formed on the second group-III nitride layer as a graded composition layer in which the proportion of existence of Al is smaller in a portion closer to a fourth group-III nitride.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: April 9, 2013
    Assignee: NGK Insulators, Ltd.
    Inventors: Makoto Miyoshi, Shigeaki Sumiya, Mikiya Ichimura, Mitsuhiro Tanaka