Abstract: According to an embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region, a plurality of second semiconductor regions, a plurality of third semiconductor regions, a plurality of third electrodes, and a plurality of gate electrodes. The gate electrodes and the third electrodes are arranged parallel in a second direction and periodically with a third arrangement cycle such that the ratio of the number of the gate electrodes and the third electrodes in the first region is m3 to m4 (m3, m4 being positive integers and m3 being more than or equal to m4).

Abstract: A stacked multilayer structure according to an embodiment of the present invention comprises: a stacked layer part including a plurality of conducting layers and a plurality of insulating layers, said plurality of insulating layers being stacked alternately with each layer of said plurality of conducting layers, one of said plurality of insulating layers being a topmost layer among said plurality of conducting layers and said plurality of insulating layers; and a plurality of contacts, each contact of said plurality of contacts being formed from said topmost layer and each contact of said plurality of contacts being in contact with a respective conducting layer of said plurality of conducting layers, a side surface of each of said plurality of contacts being insulated from said plurality of conducting layers via an insulating film.

Abstract: A stacked multilayer structure according to an embodiment of the present invention comprises: a stacked layer part including a plurality of conducting layers and a plurality of insulating layers, said plurality of insulating layers being stacked alternately with each layer of said plurality of conducting layers, one of said plurality of insulating layers being a topmost layer among said plurality of conducting layers and said plurality of insulating layers; and a plurality of contacts, each contact of said plurality of contacts being formed from said topmost layer and each contact of said plurality of contacts being in contact with a respective conducting layer of said plurality of conducting layers, a side surface of each of said plurality of contacts being insulated from said plurality of conducting layers via an insulating film.

Abstract: A stacked multilayer structure according to an embodiment of the present invention comprises: a stacked layer part including a plurality of conducting layers and a plurality of insulating layers, said plurality of insulating layers being stacked alternately with each layer of said plurality of conducting layers, one of said plurality of insulating layers being a topmost layer among said plurality of conducting layers and said plurality of insulating layers; and a plurality of contacts, each contact of said plurality of contacts being formed from said topmost layer and each contact of said plurality of contacts being in contact with a respective conducting layer of said plurality of conducting layers, a side surface of each of said plurality of contacts being insulated from said plurality of conducting layers via an insulating film.

Abstract: A stacked multilayer structure according to an embodiment of the present invention comprises: a stacked layer part including a plurality of conducting layers and a plurality of insulating layers, said plurality of insulating layers being stacked alternately with each layer of said plurality of conducting layers, one of said plurality of insulating layers being a topmost layer among said plurality of conducting layers and said plurality of insulating layers; and a plurality of contacts, each contact of said plurality of contacts being formed from said topmost layer and each contact of said plurality of contacts being in contact with a respective conducting layer of said plurality of conducting layers, a side surface of each of said plurality of contacts being insulated from said plurality of conducting layers via an insulating film.

Abstract: A semiconductor device includes a first identification mark that is identifiable by a photoluminescence method, and a second identification mark that is identifiable using visible light.

Abstract: A semiconductor device includes a SiC substrate having first and second surfaces, p-type first SiC areas on the first surface of the SiC substrate, an n-type second SiC area between the first SiC areas and the second surface, a third SiC area having an n-type dopant concentration higher than that of the second SiC area, on the second surface of the SiC substrate, a first electrode on the first surface and electrically connected to the first SiC areas, and a second electrode on the second surface and electrically connected to the third SiC area. Where the area between the first SiC areas and the second surface is a first area, and the area between a portion between adjacent first SiC areas and the second surface is set as a second area, a Z1/2 level density of the first area is higher than that of the second area.

Abstract: The invention provides an ultra-low-on-resistance, excellent-reliability semiconductor device that can finely be processed using SiC and a semiconductor device producing method.

Abstract: A stacked multilayer structure according to an embodiment of the present invention comprises: a stacked layer part including a plurality of conducting layers and a plurality of insulating layers, said plurality of insulating layers being stacked alternately with each layer of said plurality of conducting layers, one of said plurality of insulating layers being a topmost layer among said plurality of conducting layers and said plurality of insulating layers; and a plurality of contacts, each contact of said plurality of contacts being formed from said topmost layer and each contact of said plurality of contacts being in contact with a respective conducting layer of said plurality of conducting layers, a side surface of each of said plurality of contacts being insulated from said plurality of conducting layers via an insulating film.

Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor layer of a first conductivity type located between the first electrode and the second electrode and having a region in which a carbon vacancy density becomes lower in a first direction from the first electrode to the second electrode, a second semiconductor layer of the first conductivity type located between the first electrode and the first semiconductor layer and having an impurity element concentration higher than the impurity element concentration of the first semiconductor layer, and a plurality of third semiconductor layers of a second conductivity type located between the second electrode and the first semiconductor layer.

Abstract: A stacked multilayer structure according to an embodiment of the present invention comprises: a stacked layer part including a plurality of conducting layers and a plurality of insulating layers, said plurality of insulating layers being stacked alternately with each layer of said plurality of conducting layers, one of said plurality of insulating layers being a topmost layer among said plurality of conducting layers and said plurality of insulating layers; and a plurality of contacts, each contact of said plurality of contacts being formed from said topmost layer and each contact of said plurality of contacts being in contact with a respective conducting layer of said plurality of conducting layers, a side surface of each of said plurality of contacts being insulated from said plurality of conducting layers via an insulating film.

Abstract: A semiconductor device according to an embodiment includes a first-conductive-type semiconductor substrate; a first-conductive-type first semiconductor layer formed on the semiconductor substrate, and having an impurity concentration lower than that of the semiconductor substrate; a second-conductive-type second semiconductor layer epitaxially formed on the first semiconductor layer; and a second-conductive-type third semiconductor layer epitaxially formed on the second semiconductor layer, and having an impurity concentration higher than that of the second semiconductor layer. The semiconductor device also includes a recess formed in the third semiconductor layer, and at least a corner portion of a side face and a bottom surface is located in the second semiconductor layer.

Abstract: An aspect of the present embodiment, there is provided a semiconductor device, including a first electrode, a first semiconductor layer having a first conductive type connected to the first electrode, a second semiconductor layer having a second conductive type contacted to the first semiconductor layer, a third semiconductor layer having the first conductive type, an impurity concentration of the third semiconductor layer being smaller than an impurity concentration of the second semiconductor layer, the third semiconductor layer contacting to the second semiconductor layer to be separated from the first semiconductor layer by the second semiconductor layer, a gate insulator provided on the second semiconductor layer, and the first semiconductor layer and the third semiconductor layer arranged at both sides of the second semiconductor layer, respectively, a gate electrode on the gate insulator; and a second electrode connected to the third semiconductor layer.

Abstract: A semiconductor device includes a first electrode, a second electrode, a first semiconductor layer of a first conductivity type located between the first electrode and the second electrode and having a region in which a carbon vacancy density becomes lower in a first direction from the first electrode to the second electrode, a second semiconductor layer of the first conductivity type located between the first electrode and the first semiconductor layer and having an impurity element concentration higher than the impurity element concentration of the first semiconductor layer, and a plurality of third semiconductor layers of a second conductivity type located between the second electrode and the first semiconductor layer.

Abstract: A semiconductor rectifier includes a first conductivity type wide bandgap semiconductor substrate having a first conductivity type wide bandgap semiconductor layer on an upper surface of which is formed a plurality of first wide bandgap semiconductor regions of the first conductivity type sandwiching a plurality of second wide bandgap semiconductor regions of a second conductivity type, and a plurality of third wide bandgap semiconductor regions of the second conductivity type, at least a part of the third wide bandgap semiconductor regions being connected to the second wide bandgap semiconductor regions and each of the third wide bandgap semiconductor regions having a width smaller than that of the second wide bandgap semiconductor regions. A first electrode is formed on the first and second wide bandgap semiconductor regions and a second electrode is formed on a lower surface of the wide bandgap semiconductor substrate.

Abstract: A semiconductor device includes a first conduction type semiconductor substrate, a first conduction type semiconductor deposition layer, a trench, second conduction type wells, a JFET region, a first conduction type first source region, a first source region, a trench-type source electrode, a gate insulator film, a gate electrode, and a drain electrode. The trench is formed substantially perpendicularly to the semiconductor deposition layer so that the semiconductor deposition layer exposes to a bottom of the trench. The second conduction type second source region are formed in the first conduction type first source region. The trench-type source electrode is in contact with the first source region, the second source region, and the first conduction type semiconductor deposition layer to configure a Schottky junction.

Abstract: The invention provides an ultra-low-on-resistance, excellent-reliability semiconductor device that can finely be processed using SiC and a semiconductor device producing method.

Abstract: One embodiment of a semiconductor device includes: a silicon carbide substrate including first and second principal surfaces; a first-conductive-type silicon carbide layer on the first principal surface; a second-conductive-type first silicon carbide region at a surface of the first silicon carbide layer; a first-conductive-type second silicon carbide region at the surface of the first silicon carbide region; a second-conductive-type third silicon carbide region at the surface of the first silicon carbide region; a second-conductive-type fourth silicon carbide region formed between the first silicon carbide region and the second silicon carbide region, and having an impurity concentration higher than that of the first silicon carbide region; a gate insulator; a gate electrode formed on the gate insulator; an inter-layer insulator; a first electrode connected to the second silicon carbide region and the third silicon carbide region; and a second electrode on the second principal surface.

Abstract: The invention provides an ultra-low-on-resistance, excellent-reliability semiconductor device that can finely be processed using SiC and a semiconductor device producing method.

Abstract: A semiconductor device according to an embodiment includes a first-conductive-type semiconductor substrate; a first-conductive-type first semiconductor layer formed on the semiconductor substrate, and having an impurity concentration lower than that of the semiconductor substrate; a second-conductive-type second semiconductor layer epitaxially formed on the first semiconductor layer; and a second-conductive-type third semiconductor layer epitaxially formed on the second semiconductor layer, and having an impurity concentration higher than that of the second semiconductor layer. The semiconductor device also includes a recess formed in the third semiconductor layer, and at least a corner portion of a side face and a bottom surface is located in the second semiconductor layer.