Patents by Inventor Malcolm J. Bevan
Malcolm J. Bevan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11927482Abstract: One or more embodiments described herein generally relate to systems and methods for calibrating an optical emission spectrometer (OES) used for processing semiconductor substrates. In embodiments herein, a light fixture is mounted to a plate within a process chamber. A light source is positioned within the light fixture such that it provides an optical path that projects directly at a window through which the OES looks into the process chamber for its reading. When the light source is on, the OES measures the optical intensity of radiation from the light source. To calibrate the OES, the optical intensity of the light source is compared at two separate times when the light source is on. If the optical intensity of radiation at the first time is different than the optical intensity of radiation at the second time, the OES is modified.Type: GrantFiled: March 27, 2020Date of Patent: March 12, 2024Assignee: Applied Materials, Inc.Inventors: Kin Pong Lo, Lara Hawrylchak, Malcolm J. Bevan, Theresa Kramer Guarini, Wei Liu, Bernard L. Hwang
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Patent number: 11923441Abstract: Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-? layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-? layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.Type: GrantFiled: August 16, 2022Date of Patent: March 5, 2024Assignee: Applied Materials, Inc.Inventors: Steven C. H. Hung, Benjamin Colombeau, Andy Lo, Byeong Chan Lee, Johanes F. Swenberg, Theresa Kramer Guarini, Malcolm J. Bevan
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Patent number: 11581408Abstract: Embodiments of the disclosure provide an improved apparatus and methods for nitridation of stacks of materials. In one embodiment, a method for processing a substrate in a processing region of a process chamber is provided. The method includes generating and flowing plasma species from a remote plasma source to a delivery member having a longitudinal passageway, flowing plasma species from the longitudinal passageway to an inlet port formed in a sidewall of the process chamber, wherein the plasma species are flowed at an angle into the inlet port to promote collision of ions or reaction of ions with electrons or charged particles in the plasma species such that ions are substantially eliminated from the plasma species before entering the processing region of the process chamber, and selectively incorporating atomic radicals from the plasma species in silicon or polysilicon regions of the substrate.Type: GrantFiled: March 15, 2021Date of Patent: February 14, 2023Assignee: Applied Materials, Inc.Inventors: Matthew Scott Rogers, Roger Curtis, Lara Hawrylchak, Canfeng Lai, Bernard L. Hwang, Jeffrey A. Tobin, Christopher S. Olsen, Malcolm J. Bevan
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Publication number: 20230010499Abstract: Exemplary integrated cluster tools may include a factory interface including a first transfer robot. The tools may include a wet clean system coupled with the factory interface at a first side of the wet clean system. The tools may include a load lock chamber coupled with the wet clean system at a second side of the wet clean system opposite the first side of the wet clean system. The tools may include a first transfer chamber coupled with the load lock chamber. The first transfer chamber may include a second transfer robot. The tools may include a thermal treatment chamber coupled with the first transfer chamber. The tools may include a second transfer chamber coupled with the first transfer chamber. The second transfer chamber may include a third transfer robot. The tools may include a metal deposition chamber coupled with the second transfer chamber.Type: ApplicationFiled: July 7, 2022Publication date: January 12, 2023Applicant: Applied Materials, Inc.Inventors: Brian K. Kirkpatrick, Steven C. H. Hung, Malcolm J. Bevan
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Publication number: 20220399457Abstract: Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-? layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-? layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.Type: ApplicationFiled: August 16, 2022Publication date: December 15, 2022Applicant: Applied Materials, Inc.Inventors: Steven C.H. Hung, Benjamin Colombeau, Andy Lo, Byeong Chan Lee, Johanes F. Swenberg, Theresa Kramer Guarini, Malcolm J. Bevan
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Patent number: 11456178Abstract: Processing methods may be performed to produce semiconductor structures. The methods may include forming a silicon layer over a semiconductor substrate. The forming may include forming a silicon layer incorporating a dopant. The methods may include oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The oxidizing may drive a portion of the dopant through the silicon layer and into the semiconductor substrate.Type: GrantFiled: June 15, 2021Date of Patent: September 27, 2022Assignee: Applied Materials, Inc.Inventors: Steven C. H. Hung, Benjamin Colombeau, Abhishek Dube, Sheng-Chin Kung, Patricia M. Liu, Malcolm J. Bevan, Johanes F. Swenberg
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Publication number: 20220301920Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits and to apparatus for use within a substrate processing chamber to improve film thickness uniformity. More specifically, the embodiments of the disclosure relate to an edge ring. The edge ring may include an overhang ring.Type: ApplicationFiled: June 6, 2022Publication date: September 22, 2022Inventors: Kin Pong LO, Vladimir NAGORNY, Wei LIU, Theresa Kramer GUARINI, Bernard L. HWANG, Malcolm J. BEVAN, Jacob ABRAHAM, Swayambhu Prasad BEHERA
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Patent number: 11450759Abstract: Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-? layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-? layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.Type: GrantFiled: September 30, 2020Date of Patent: September 20, 2022Assignee: Applied Materials, Inc.Inventors: Steven C. H. Hung, Benjamin Colombeau, Andy Lo, Byeong Chan Lee, Johanes F. Swenberg, Theresa Kramer Guarini, Malcolm J. Bevan
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Patent number: 11380575Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits and to apparatus for use within a substrate processing chamber to improve film thickness uniformity. More specifically, the embodiments of the disclosure relate to an edge ring. The edge ring may include an overhang ring.Type: GrantFiled: July 27, 2020Date of Patent: July 5, 2022Assignee: Applied Materials, Inc.Inventors: Kin Pong Lo, Vladimir Nagorny, Wei Liu, Theresa Kramer Guarini, Bernard L. Hwang, Malcolm J. Bevan, Jacob Abraham, Swayambhu Prasad Behera
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Publication number: 20220178747Abstract: One or more embodiments described herein generally relate to systems and methods for calibrating an optical emission spectrometer (OES) used for processing semiconductor substrates. In embodiments herein, a light fixture is mounted to a plate within a process chamber. A light source is positioned within the light fixture such that it provides an optical path that projects directly at a window through which the OES looks into the process chamber for its reading. When the light source is on, the OES measures the optical intensity of radiation from the light source. To calibrate the OES, the optical intensity of the light source is compared at two separate times when the light source is on. If the optical intensity of radiation at the first time is different than the optical intensity of radiation at the second time, the OES is modified.Type: ApplicationFiled: March 27, 2020Publication date: June 9, 2022Inventors: Kin Pong LO, Lara HAWRYLCHAK, Malcolm J. BEVAN, Theresa Kramer GUARINI, Wei LIU, Bernard L. HWANG
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Patent number: 11271097Abstract: Processing methods may be performed to produce semiconductor structures that may include a high-k dielectric material. The methods may include forming a silicon layer over a semiconductor substrate. The semiconductor substrate may include silicon germanium. The methods may include oxidizing a portion of the silicon layer to form a sacrificial oxide while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The methods may include removing the sacrificial oxide. The methods may include oxidizing the portion of the silicon layer in contact with the semiconductor substrate to form an oxygen-containing material. The methods may include forming a high-k dielectric material overlying the oxygen-containing material.Type: GrantFiled: October 26, 2020Date of Patent: March 8, 2022Assignee: Applied Materials, Inc.Inventors: Steven C. Hung, Benjamin Colombeau, Abhishek Dube, Sheng-Chin Kung, Patricia M. Liu, Malcolm J. Bevan, Johanes Swenberg
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Publication number: 20220028656Abstract: Embodiments of the present disclosure generally relate to the fabrication of integrated circuits and to apparatus for use within a substrate processing chamber to improve film thickness uniformity. More specifically, the embodiments of the disclosure relate to an edge ring. The edge ring may include an overhang ring.Type: ApplicationFiled: July 27, 2020Publication date: January 27, 2022Inventors: Kin Pong LO, Vladimir NAGORNY, Wei LIU, Theresa Kramer GUARINI, Bernard L. HWANG, Malcolm J. BEVAN, Jacob ABRAHAM, Swayambhu Prasad BEHERA
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Publication number: 20220013336Abstract: A method and apparatus for the use of hydrogen plasma treatments is described herein. The process chamber includes a plurality of chamber components. The plurality of chamber components may be coated with a yttrium zirconium oxide composition, such as a Y2O3—ZrO2 solid solution. Some of the plurality of chamber components are replaced with a bulk yttrium zirconium oxide ceramic. Yet other chamber components are replaced with similar components of different materials.Type: ApplicationFiled: July 10, 2020Publication date: January 13, 2022Inventors: Jian WU, Lara A. HAWRYLCHAK, Ren-Guan DUAN, Bernard L. HWANG, Malcolm J. BEVAN, Wei LIU
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Publication number: 20210398814Abstract: Processing methods may be performed to produce semiconductor structures. The methods may include forming a silicon layer over a semiconductor substrate. The forming may include forming a silicon layer incorporating a dopant. The methods may include oxidizing a portion of the silicon layer while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The oxidizing may drive a portion of the dopant through the silicon layer and into the semiconductor substrate.Type: ApplicationFiled: June 15, 2021Publication date: December 23, 2021Applicant: Applied Materials, Inc.Inventors: Steven C. H. Hung, Benjamin Colombeau, Abhishek Dube, Sheng-Chin Kung, Patricia M. Liu, Malcolm J. Bevan, Johanes F. Swenberg
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Publication number: 20210202702Abstract: Embodiments of the disclosure provide an improved apparatus and methods for nitridation of stacks of materials. In one embodiment, a method for processing a substrate in a processing region of a process chamber is provided. The method includes generating and flowing plasma species from a remote plasma source to a delivery member having a longitudinal passageway, flowing plasma species from the longitudinal passageway to an inlet port formed in a sidewall of the process chamber, wherein the plasma species are flowed at an angle into the inlet port to promote collision of ions or reaction of ions with electrons or charged particles in the plasma species such that ions are substantially eliminated from the plasma species before entering the processing region of the process chamber, and selectively incorporating atomic radicals from the plasma species in silicon or polysilicon regions of the substrate.Type: ApplicationFiled: March 15, 2021Publication date: July 1, 2021Inventors: Matthew Scott ROGERS, Roger CURTIS, Lara HAWRYLCHAK, Canfeng LAI, Bernard L. HWANG, Jeffrey A. TOBIN, Christopher S. OLSEN, Malcolm J. BEVAN
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Publication number: 20210134986Abstract: Processing methods may be performed to produce semiconductor structures that may include a high-k dielectric material. The methods may include forming a silicon layer over a semiconductor substrate. The semiconductor substrate may include silicon germanium. The methods may include oxidizing a portion of the silicon layer to form a sacrificial oxide while maintaining a portion of the silicon layer in contact with the semiconductor substrate. The methods may include removing the sacrificial oxide. The methods may include oxidizing the portion of the silicon layer in contact with the semiconductor substrate to form an oxygen-containing material. The methods may include forming a high-k dielectric material overlying the oxygen-containing material.Type: ApplicationFiled: October 26, 2020Publication date: May 6, 2021Applicant: Applied Materials, Inc.Inventors: Steven C. Hung, Benjamin Colombeau, Abhishek Dube, Sheng-Chin Kung, Patricia M. Liu, Malcolm J. Bevan, Johanes Swenberg
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Publication number: 20210104617Abstract: Described is a method of manufacturing a gate-all-around electronic device. The method includes forming a thermal oxide layer though an enhanced in situ steam generation process in combination with atomic layer deposition of a low-? layer. The thin thermal oxide layer passivates the interface between the silicon layer and the dielectric layer of the GAA. A passivation process after the deposition of the low-? layer reduces the bulk trap and enhances the breakdown performance of the GAA transistor.Type: ApplicationFiled: September 30, 2020Publication date: April 8, 2021Applicant: Applied Materials, Inc.Inventors: Steven C.H. Hung, Benjamin Colombeau, Andy Lo, Byeong Chan Lee, Johanes F. Swenberg, Theresa Kramer Guarini, Malcolm J. Bevan
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Publication number: 20210043448Abstract: Processing platforms having a central transfer station with a robot and an environment having greater than or equal to about 0.1% by weight water vapor, a pre-clean chamber connected to a side of the transfer station and a batch processing chamber connected to a side of the transfer station. The processing platform configured to pre-clean a substrate to remove native oxides from a first surface, form a blocking layer using a alkylsilane and selectively deposit a film. Methods of using the processing platforms and processing a plurality of wafers are also described.Type: ApplicationFiled: October 27, 2020Publication date: February 11, 2021Applicant: Applied Materials, Inc.Inventors: Ning Li, Mihaela A. Balseanu, Li-Qun Xia, Dongqing Yang, Lala Zhu, Malcolm J. Bevan, Theresa Kramer Guarini, Wenbo Yan
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Patent number: 10872763Abstract: Processing methods may be performed to produce semiconductor structures that may include a high-k dielectric material. The methods may include delivering a nitrogen-containing precursor or an oxygen-containing precursor to a substrate contained in a semiconductor processing chamber. The methods may include forming reactive ligands on an exposed surface of the substrate with the nitrogen-containing precursor or the oxygen-containing precursor. The methods may also include forming a high-k dielectric material overlying the substrate.Type: GrantFiled: May 3, 2019Date of Patent: December 22, 2020Assignee: Applied Materials, Inc.Inventors: David Chu, Steven C. Hung, Malcolm J. Bevan, Charles Chu, Tatsuya E. Sato, Shih-Chung Chen, Patricia M. Liu, Johanes Swenberg
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Publication number: 20200350157Abstract: Processing methods may be performed to produce semiconductor structures that may include a high-k dielectric material. The methods may include delivering a nitrogen-containing precursor or an oxygen-containing precursor to a substrate contained in a semiconductor processing chamber. The methods may include forming reactive ligands on an exposed surface of the substrate with the nitrogen-containing precursor or the oxygen-containing precursor. The methods may also include forming a high-k dielectric material overlying the substrate.Type: ApplicationFiled: May 3, 2019Publication date: November 5, 2020Applicant: Applied Materials, Inc.Inventors: David Chu, Steven C. Hung, Malcolm J. Bevan, Charles Chu, Tatsuya E. Sato, Shih-Chung Chen, Patricia M. Liu, Johanes Swenberg