Abstract: Calibration with high accuracy can be realized even when performing the calibration while running on the actual road.

Abstract: High precision calibration of external parameters is possible even when the surrounding road surface is configured from a plurality of flat surfaces.

Abstract: A road surface area detection device includes a normalized speed calculation portion configured to calculate a normalized speed based on a movement of a feature point in an image captured by a camera that is disposed in a vehicle; a determination range calculation portion configured to calculate a road surface determination range, which is indicated by a magnitude of the normalized speed, based on the normalized speeds of at least two feature points at different positions in a width direction of the vehicle in a predetermined central area where the vehicle is positioned in a center thereof in the width direction perpendicular to a vehicle traveling direction; and a road surface area identification portion configured to identify, as a road surface area on which the vehicle travels, a position in the width direction that includes the feature point whose normalized speed is within the road surface determination range.

Abstract: There are provided a calibration apparatus and method capable of obtaining a high-precision calibration result by taking out only feature points on a road surface from images captured by an in-vehicle camera which is a calibration target. A road surface range is estimated by using feature points appearing in an image(s) captured by a camera (a front camera 102 or a rear camera 103) that is not a camera on which the calibration is executed (a side camera 106); and the calibration is executed by using only feature points existing within the estimated road surface range from among the feature points appearing in an image(s) captured by the camera on which the calibration is executed.

Abstract: High precision calibration of external parameters is possible even when the surrounding road surface is configured from a plurality of flat surfaces.

Abstract: Calibration with high accuracy can be realized even when performing the calibration while running on the actual road.

Abstract: A road surface area detection device includes a normalized speed calculation portion configured to calculate a normalized speed based on a movement of a feature point in an image captured by a camera that is disposed in a vehicle; a determination range calculation portion configured to calculate a road surface determination range, which is indicated by a magnitude of the normalized speed, based on the normalized speeds of at least two feature points at different positions in a width direction of the vehicle in a predetermined central area where the vehicle is positioned in a center thereof in the width direction perpendicular to a vehicle traveling direction; and a road surface area identification portion configured to identify, as a road surface area on which the vehicle travels, a position in the width direction that includes the feature point whose normalized speed is within the road surface determination range.

Abstract: There are provided a calibration apparatus and method capable of obtaining a high-precision calibration result by taking out only feature points on a road surface from images captured by an in-vehicle camera which is a calibration target. A road surface range is estimated by using feature points appearing in an image(s) captured by a camera (a front camera 102 or a rear camera 103) that is not a camera on which the calibration is executed (a side camera 106); and the calibration is executed by using only feature points existing within the estimated road surface range from among the feature points appearing in an image(s) captured by the camera on which the calibration is executed.

Abstract: The present invention aims to efficiently calibrate the characteristics of a pair of reception or transmission low-pass filters by a receiving or transmitting circuit. A semiconductor integrated circuit includes an RF receiver that processes an RF reception signal, an RF transmitter that generates an RF transmission signal and a frequency synthesizer. A reception low-pass filter of the RF receiver suppresses undesired components contained in I and Q baseband reception signals. A transmission low-pass filter of the RF transmitter suppresses noise due to D/A conversion, which is contained in I and Q transmission analog baseband signals. A calibration test signal is supplied to the inputs of the pair of reception or transmission low-pass filters. A difference in phase between the pair of filters is detected by a phase detection unit. A calibration controller calibrates a relative mismatch between the cut-off frequencies of the pair of filters.

Abstract: The present invention aims to efficiently calibrate the characteristics of a pair of reception or transmission low-pass filters by a receiving or transmitting circuit. A semiconductor integrated circuit includes an RF receiver that processes an RF reception signal, an RF transmitter that generates an RF transmission signal and a frequency synthesizer. A reception low-pass filter of the RF receiver suppresses undesired components contained in I and Q baseband reception signals. A transmission low-pass filter of the RF transmitter suppresses noise due to D/A conversion, which is contained in I and Q transmission analog baseband signals. A calibration test signal is supplied to the inputs of the pair of reception or transmission low-pass filters. A difference in phase between the pair of filters is detected by a phase detection unit. A calibration controller calibrates a relative mismatch between the cut-off frequencies of the pair of filters.

Abstract: This invention provides a wireless transmitter circuit for mobile communication apparatus and this circuit can be configured with fewer components and is suitable for downsizing. A single PLL synthesizer serves as both RF frequency band PLL and IF frequency band PLL among three oscillators for TX, RX and IF frequency bands, which have been required in conventional mobile communication apparatus. The number of necessary oscillators occupying a large area within a chip is reduced and the number of components is decreased. Specifically, circuitry is arranged to generate local oscillation signals for RF and IF frequency bands by frequency dividing the output of a VCO of the RF frequency band PLL.

Abstract: The present invention aims to efficiently calibrate the characteristics of a pair of reception or transmission low-pass filters by a receiving or transmitting circuit. A semiconductor integrated circuit includes an RF receiver that processes an RF reception signal, an RF transmitter that generates an RF transmission signal and a frequency synthesizer. A reception low-pass filter of the RF receiver suppresses undesired components contained in I and Q baseband reception signals. A transmission low-pass filter of the RF transmitter suppresses noise due to D/A conversion, which is contained in I and Q transmission analog baseband signals. A calibration test signal is supplied to the inputs of the pair of reception or transmission low-pass filters. A difference in phase between the pair of filters is detected by a phase detection unit. A calibration controller calibrates a relative mismatch between the cut-off frequencies of the pair of filters.

Abstract: The present invention provides a PLL circuit containing a loop gain circuit capable of suppressing loop gain variation. This PLL circuit includes a counter that is driven by a voltage controlled oscillator within the PLL circuit, an accumulator (ACL) that accumulates the output of the counter, and a comparison operation circuit block that compares the count value of the ACL and the design value pre-stored in a register, and the loop gain of the PLL circuit is detected taking advantage of the fact that the ACL count value is inversely proportional to the loop gain. Based on the detection result, the loop gain is calibrated by correcting the loop gain with a charge pump current, etc. This allows the PLL circuit to maintain stable loop characteristics that will not affect the characteristics variation of each element constituting the PLL.

Abstract: The receiver, which enables rejection of image signals with higher accuracy over wider frequency band, can be provided as a low IF receiver by inputting a calibration signal of frequency fi (1?i?N) before reception of signals and determining the frequency response fa(z) to fd(z) of a calibrating filter in a filter mismatch calibrating circuit (FIL_CAL) 195 to make zero amplitude and phase mismatches between the I component and Q component of the quadrature demodulation signal at the frequency fIFi.

Abstract: A radio communication apparatus having a radio modem for processing a signal in a radio frequency band, a signal processor for processing a base band of a transmission or reception signal, and a CPU for processing a protocol. The signal processor includes signal processing blocks implemented by programmable software. Each of the signal processing blocks processes a signal of reception signal data input from the radio modem or from a preceding stage of one of the signal processing blocks or a signal of transmission signal data input from the CPU or from the preceding stage of signal processing block on the basis of a control signal input together with the transmission signal data or the reception signal data. The control signal can include information required by all the signal processing blocks in a common format.

Abstract: To realize a software radio processing with a reduced circuit area by hardware and software which can process transmission and reception, or synchronization and demodulation in time division. There are provided a circuit DRC that can dynamically change a configuration with a structure that can change the configuration at a high speed, a general processor, and an interface for connection with an external device such as an AD converter or a DA converter. Software radio is realized by using a software radio chip that conducts plural different processing such as transmission and reception, or synchronization and demodulation in time division. The different processing during the radio signal processing can be conducted in time division. As a result, the software radio can be realized with a circuit of a reduced area in a software radio system that allocates regions of an FPGA to the respective processing.

Abstract: A PLL circuit equipped with a loop gain detecting circuit that can suppress the change of the loop gain. When detecting the loop gain, the frequency of the input signal to the second input (IN-2) of the phase detector is first changed, and the response corresponding to the change is detected by the output of the voltage locked oscillator. The detection is performed by connecting the output of the voltage locked oscillator with the counter and connecting the output of the counter with the integrator. The phase locked loop characteristics are optimized by performing feedback for the detection result on the value of the charge pump current.

Abstract: It is to provide a vapor phase growth apparatus which can perform vapor phase growth of a thin film having a good uniformity throughout a surface of a wafer. The vapor phase growth apparatus includes at least a sealable reactor, a wafer containing member (wafer holder) installed within the reactor and having a wafer mounting portion (pocket hole) on a surface thereof for holding a wafer, a gas supply member (gas inlet pipe) for supplying raw material gas towards the wafer, a heating member (heater) for heating the wafer, and a heat uniformizing member (susceptor) for holding the wafer containing member and uniformizing heat from the heating member, wherein raw material gas is supplied into the reactor in a high temperature environment while heating the wafer by using the heating member via the heat uniformizing member and the wafer containing member, to form a film grown on a surface of the wafer, and wherein a recess portion depressed in a dome shape is formed at a back side of the wafer containing member.

Abstract: The present invention aims to efficiently calibrate the characteristics of a pair of reception or transmission low-pass filters by a receiving or transmitting circuit. A semiconductor integrated circuit includes an RF receiver that processes an RF reception signal, an RF transmitter that generates an RF transmission signal and a frequency synthesizer. A reception low-pass filter of the RF receiver suppresses undesired components contained in I and Q baseband reception signals. A transmission low-pass filter of the RF transmitter suppresses noise due to D/A conversion, which is contained in I and Q transmission analog baseband signals. A calibration test signal is supplied to the inputs of the pair of reception or transmission low-pass filters. A difference in phase between the pair of filters is detected by a phase detection unit. A calibration controller calibrates a relative mismatch between the cut-off frequencies of the pair of filters.

Abstract: It is to provide a method for growing an epitaxial crystal in which the doping conditions are set when an epitaxial crystal having a desired carrier concentration is grown. A method for growing an epitaxial crystal while a dopant is added to a compound semiconductor substrate, comprises: obtaining a relation between an off angle and a doping efficiency with regards to the same type of compound semiconductor substrate in advance; and setting a doping condition for carrying out an epitaxial growth on the compound semiconductor substrate based on the obtained relation and a value of the off angle of the subtrate.