Abstract: The present invention provides a signal field scaler for use with a multiple-input, multiple-output (MIMO) transmitter employing N transmit antennas, where N is at least two. In one embodiment, the signal field scaler includes a signal field generator configured to provide a signal field corresponding to a multiple concurrent transmission to each of the N transmit antennas during a time interval. Additionally, the signal field scaler also includes a signal field adapter coupled to the signal field generator and configured to apply a vector of scale factors to the signal field for each of the N transmit antennas during the time interval to allow proper decoding of the signal field by a legacy receiver and a MIMO receiver.

Abstract: The present invention provides a concurrent gain generator for use with a MIMO transmitter having an N of two or more transmit antennas. In one embodiment, the concurrent gain generator includes a first sequence formatter that provides one of the N transmit antennas with a gain training sequence during an initial time interval, and a second sequence formatter that further provides (N?1) remaining transmit antennas with (N?1) additional gain training sequences during the initial time interval to train receive gains. The present invention also provides a non-concurrent gain adjuster for use with a MIMO receiver employing an M of two or more receive antennas. In one embodiment, the non-concurrent gain adjuster includes a gain combiner that computes a common receive gain as a function of M independent receive gains, and a gain applier that applies the common receive gain to receivers associated with the M receive antennas.

Abstract: The present invention provides a folded low-complexity (FLC) pipeline. In one embodiment, the FLC pipeline includes a dot product unit chain configured to employ only addition and multiplication operations to compute intermediate numerators and denominators from a received signal matrix, a channel gain matrix and a noise matrix. Additionally, FLC pipeline also includes a divider stage configured to terminate the dot product unit chain by computing an unscaled quotient and a scale factor from ultimate ones of the intermediate numerators and denominators.

Abstract: A preamble frequency switching design technique for frequency switching the training symbols within the preamble associated with a MIMO communication system ensures that data throughput is optimized.

Abstract: A Hybrid IMMSE-LMMSE receiver processing technique predicts performance of and selects between iterative and non-iterative decoding of symbols based on an intelligent metric. Based on a pre-specified criterion, the receiver determines if a correct first-stage decision is made or not. If a correct decision is made, then it follows iterative processing like in BLAST. Alternatively, if a wrong decision is found to have occurred, the receiver resorts to LMMSE estimation processing.

Abstract: In at least some embodiments, a system may comprise one or more devices configured to communicate according to a first protocol that uses a data frame comprising a header field and a data field and one or more devices configured to communicate according to a second protocol that uses a data frame comprising a header field, a header extension, and a data field. The data frame used by the second protocol may comprise fictitious information for interpretation by the one or more devices configured according to the first protocol. In accordance with some embodiments of the invention, the devices configured according to the first protocol may use the fictitious information to determine a data transmission duration of data packets sent by devices configured according to the second protocol, even though the data packets may be sent according to parameters that are not supported by the first protocol.

Abstract: For use with a multiple-input, multiple-output (MIMO) transmitter, a signal field controller, a method of controlling signal fields and a MIMO transmitter incorporating the controller or the method. In one embodiment, the controller includes: (1) a primary signal field mode indicator configured to cause a primary signal field to indicate a presence of a supplemental signal field and provide the primary signal field to the MIMO transmitter for transmission thereby and (2) a supplemental signal field generator coupled to the primary signal field mode indicator and configured to provide a supplemental signal field to the MIMO transmitter for further transmission thereby only when the primary signal field indicates the presence.

Abstract: A resynchronization method for use in a data communication system having a first device configured to transmit data at a symbol rate to a second device. The second device includes a Reed Solomon (RS) decoder having a RS lock indicator and a Moving Picture Experts Group (MPEG) Protocol Interface (MPI) having a MPI lock indicator, wherein the RS and the MPI lock indicators are monitored. Four different states, defined by the values of the RS and MPI lock indicators, determine whether the data communication system will wait for the RS decoder and the MPI hardware block to resynchronize, whether an intermediate-subset of the channel acquisition algorithm is performed or whether the entire channel acquisition algorithm is performed. The method for resynchronization described herein recovers synchronization within a predetermined time without the layers above the physical link layer having knowledge.

Abstract: The present invention is directed to a fast Fourier transform (FFT) architecture. In one embodiment, the FFT architecture includes a pipeline segment having a plurality of data-independent pipelines that receive different time-domain data samples and generate therefrom corresponding intermediate results. Additionally, the FFT architecture also includes a parallel segment, coupled to all of the pipelines, that receives the corresponding intermediate results and generates therefrom corresponding frequency-domain results.

Abstract: A de-interleaver-de-puncturer architecture is scalable and capable of achieving a higher data throughput than that achievable using a conventional disjointed de-interleaver-de-puncturer architecture. The higher data throughput is achieved without increasing the clock speed of the de-interleaver. The scalable de-interleaver-de-puncturer architecture is also less complex than a conventional disjointed de-interleaver-de-puncturer architecture.

Abstract: A high speed add-compare-select (ACS) circuit for a radix-4 Viterbi decoder has a lower critical path delay than that achievable using a traditional ACS circuit suitable for use with a radix-4 Viterbi decoder. The high speed ACS circuit is implemented to achieve a lower critical path delay without increasing the clock rate beyond that required by a radix-2 ACS circuit.

Abstract: A branch metric duplication method substantially reduces interconnection delays. The branch metric duplication method is particularly useful to implement a high speed radix-4 Viterbi decoder targeted for FPGA applications.

Abstract: Transport of water in a fuel cell system between a first gaseous stream having a higher concentration of water and a second gaseous stream having a lower concentration of water, by mass and heat transfer, is effected through a plurality of non-hydrophilic membranes in a membrane module, such that water uptake of the selective layer is less than 10 wt % measured at a water activity of 0.9 and at a temperature of 30° C.; the membrane has a minimum pressure-normalized water flux of 100 GPU at 50° C., and maintains an ideal selectivity of water over any remaining component in the gas mixture greater than 5 at 50° C. Water and heat are transferred from an exhaust stream from either the cathode or anode compartment of a PEM fuel cell into an incoming reactant stream, whether oxidant or fuel. Operation is at a temperature above 50° C. and water activity greater than 0.

Abstract: A method of correctly estimating the frequency offset when the CPE modem has already acquired and is tracking the OFDM burst boundaries in an OFDM-based, wireless communication system. CPS data in an OFDM-based, wireless communication system is modulated as QPSK data in the training tones of the data burst. As long as some bursts have the CPS data modulation and some bursts do not have the CPS data modulation, the CPS data can be recovered. A slip results when there is a linear phase difference across the tones (after the FFT) between the current and the previous burst. This linear phase difference is generally taken care of by the channel estimation obtained using the pilot tones. This phase difference is however, now compensated for correct frequency offset estimation which occurs before the channel estimation and CPS decoding steps.

Abstract: A method of determining CPS data in an OFDM-based, wireless communication system resolves the phase angle difference between training tones in a burst without CPS data and training tones in a burst with CPS data and then demodulates the resulting difference phase angles to determine the CPS data. The method achieves timing correction/compensation in CPS decode operations associated with OFDM-based, wireless communication systems.

Abstract: An apparatus (100) for computing the absolute value of a complex number includes separate squaring units (110, 115) for the real and imaginary parts. A square root unit (130) extracts the square root of the sum (120) of these squares, which is absolute value of the complex number. Each squaring unit includes one unsigned multipliers for respective least significant and two signed multipliers for respective most significant bits and a cross term. The products are aligned by shifting and summed. The square root unit employs identical processing elements, each considering two bits of the input and forming one root bit and a remainder. Each processing element compares two intermediate test variables, and selects a “1” or “0” for the root bit and the next remainder based upon this comparison. A chain of processing elements enables computation of the root to the desired precision. Alternatively, the same processing elements may be used in a recirculating manner.