Patents by Inventor Marco Fiorentino
Marco Fiorentino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11923899Abstract: Examples described herein relate to a method for synchronizing a wavelength of light in an optical device. In some examples, a heater voltage may be predicted for a heater disposed adjacent to the optical device in a photonic chip. The predicted heater voltage may be applied to the heater to cause a change in the wavelength of the light inside the optical device. In response to applying the heater voltage, an optical power inside the optical device may be measured. Further, a check may be performed to determine whether the measured optical power is a peak optical power. If it is determined that measured optical power is the peak optical power, the application of the predicted heater voltage to the heater may be continued.Type: GrantFiled: December 1, 2021Date of Patent: March 5, 2024Assignee: Hewlett Packard Enterprise Development LPInventors: Hyunmin Jeong, Sai Rahul Chalamalasetti, Marco Fiorentino, Peter Jin Rhim
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Patent number: 11876345Abstract: Techniques and systems for a semiconductor laser, namely a grating-coupled surface-emitting (GCSE) comb laser, having thermal management for facilitating dissipation of heat, integrated thereon. The thermal management is structured in manner that prevents deformation or damage to the GCSE laser chips included in the semiconductor laser implementation. The disclosed thermal management elements integrated in the laser can include: heat sinks; support bars; solder joints; thermal interface material (TIM); silicon vias (TSV); and terminal conductive sheets. Support bars, for example, having the GCSE laser chip positioned between the bars and having a height that is higher than a thickness of the GCSE laser chip. Accordingly, the heat sink can be placed on top of the support bars such that heat is dissipated from the GCSE laser chip, and the heat sink is separated from directed contact with the GCSE laser chip due to the height of the support bars.Type: GrantFiled: September 8, 2020Date of Patent: January 16, 2024Assignee: Hewlett Packard Enterprise Development LPInventors: Di Liang, Chih C. Shih, Kevin B. Leigh, Geza Kurczveil, Marco Fiorentino
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Patent number: 11681103Abstract: Embodiments of the present disclosure provide etch-variation tolerant optical coupling components and processes for making the same. An etch-variation tolerant geometry is determined for at least one waveguide of an optical coupling component (e.g., a directional coupler). The geometry is optimized such that each fabricated instance of an optical component design with the etch-variation tolerant geometry has substantially the same coupling ratio at any etch depth between a shallow etch depth and a deep etch depth.Type: GrantFiled: May 26, 2020Date of Patent: June 20, 2023Assignee: Hewlett Packard Enterprise Development LPInventors: Peng Sun, Mir Ashkan Seyedi, Thomas Van Vaerenbergh, Marco Fiorentino
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Publication number: 20230170991Abstract: Examples described herein relate to a method for synchronizing a wavelength of light in an optical device. In some examples, a heater voltage may be predicted for a heater disposed adjacent to the optical device in a photonic chip. The predicted heater voltage may be applied to the heater to cause a change in the wavelength of the light inside the optical device. In response to applying the heater voltage, an optical power inside the optical device may be measured. Further, a check may be performed to determine whether the measured optical power is a peak optical power. If it is determined that measured optical power is the peak optical power, the application of the predicted heater voltage to the heater may be continued.Type: ApplicationFiled: December 1, 2021Publication date: June 1, 2023Inventors: Hyunmin Jeong, Sai Rahul Chalamalasetti, Marco Fiorentino, Peter Jin Rhim
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Publication number: 20220173825Abstract: An optical network on chip comprises a first optical communication link and a second communication optical link. The first communication optical link comprises a plurality of first wavelength division multiplexers (WDMs) coupled to a first processor, a plurality of second WDMs coupled to a second processor, and a plurality of first optical interconnects coupled between the plurality of first WDMs and the plurality of second WDMs. The second optical communication link comprises a plurality of first serializer-deserializers (SerDes) coupled to the first processor at one end and coupled to a plurality third WDMs at the other end, a plurality of second SerDes coupled to a memory component at one end and coupled to a plurality of fourth WDMs at the other end, and a plurality of second optical interconnects coupled between the plurality of third WDMs and the plurality of fourth WDMs.Type: ApplicationFiled: November 30, 2020Publication date: June 2, 2022Inventors: LUCA RAMINI, Jinsung YOUN, Steven DEAN, Marco FIORENTINO
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Patent number: 11340410Abstract: An photonic circuit includes a substrate, a plurality of first light waveguides disposed on the substrate, the first light waveguides extending in a first direction, a plurality of second light waveguides disposed on the substrate and extending in a second direction intersecting the first direction, and a plurality of first micro-ring resonators disposed on the substrate. Each of the first light waveguides has an intersection with each of the second light waveguides. Each of the intersections is provided with a first micro-ring resonator of the first micro-ring resonators. Each first micro-ring resonator is configured to route signals of a respective wavelength from one of the light waveguides at the intersection to another light waveguide at the intersection.Type: GrantFiled: October 19, 2020Date of Patent: May 24, 2022Assignee: Hewlett Packard Enterprise Development LPInventors: Kevin B. Leigh, Luca Ramini, Mir Ashkan Seyedi, Marco Fiorentino
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Publication number: 20220141557Abstract: A photonic node includes a first circuit disposed on a first substrate and a second circuit disposed on a second substrate different from the first substrate. The first circuit is configured to route light signals originated from the photonic node to local nodes of a local group in which the photonic node is a member. The second circuit is configured to route light signals received from a node of an external group in which the photonic node is not a member, to one of the local nodes.Type: ApplicationFiled: October 30, 2020Publication date: May 5, 2022Inventors: KEVIN B. LEIGH, LUCA RAMINI, MIR ASHKAN SEYEDI, STEVEN DEAN, MARCO FIORENTINO
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Patent number: 11323787Abstract: A photonic node includes a first circuit disposed on a first substrate and a second circuit disposed on a second substrate different from the first substrate. The first circuit is configured to route light signals originated from the photonic node to local nodes of a local group in which the photonic node is a member. The second circuit is configured to route light signals received from a node of an external group in which the photonic node is not a member, to one of the local nodes.Type: GrantFiled: October 30, 2020Date of Patent: May 3, 2022Assignee: Hewlett Packard Enterprise Development LPInventors: Kevin B. Leigh, Luca Ramini, Mir Ashkan Seyedi, Steven Dean, Marco Fiorentino
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Publication number: 20220120983Abstract: An photonic circuit includes a substrate, a plurality of first light waveguides disposed on the substrate, the first light waveguides extending in a first direction, a plurality of second light waveguides disposed on the substrate and extending in a second direction intersecting the first direction, and a plurality of first micro-ring resonators disposed on the substrate. Each of the first light waveguides has an intersection with each of the second light waveguides. Each of the intersections is provided with a first micro-ring resonator of the first micro-ring resonators. Each first micro-ring resonator is configured to route signals of a respective wavelength from one of the light waveguides at the intersection to another light waveguide at the intersection.Type: ApplicationFiled: October 19, 2020Publication date: April 21, 2022Inventors: KEVIN B. LEIGH, LUCA RAMINI, MIR ASHKAN SEYEDI, MARCO FIORENTINO
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Publication number: 20220077656Abstract: Techniques and systems for a semiconductor laser, namely a grating-coupled surface-emitting (GCSE) comb laser, having thermal management for facilitating dissipation of heat, integrated thereon. The thermal management is structured in manner that prevents deformation or damage to the GCSE laser chips included in the semiconductor laser implementation. The disclosed thermal management elements integrated in the laser can include: heat sinks; support bars; solder joints; thermal interface material (TIM); silicon vias (TSV); and terminal conductive sheets. Support bars, for example, having the GCSE laser chip positioned between the bars and having a height that is higher than a thickness of the GCSE laser chip. Accordingly, the heat sink can be placed on top of the support bars such that heat is dissipated from the GCSE laser chip, and the heat sink is separated from directed contact with the GCSE laser chip due to the height of the support bars.Type: ApplicationFiled: September 8, 2020Publication date: March 10, 2022Inventors: DI LIANG, CHIH C. SHIH, KEVIN B. LEIGH, GEZA KURCZVEIL, MARCO FIORENTINO
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Publication number: 20210373241Abstract: Embodiments of the present disclosure provide etch-variation tolerant optical coupling components and processes for making the same. An etch-variation tolerant geometry is determined for at least one waveguide of an optical coupling component (e.g., a directional coupler). The geometry is optimized such that each fabricated instance of an optical component design with the etch-variation tolerant geometry has substantially the same coupling ratio at any etch depth between a shallow etch depth and a deep etch depth.Type: ApplicationFiled: May 26, 2020Publication date: December 2, 2021Inventors: PENG SUN, MIR ASHKAN SEYEDI, THOMAS VAN VAERENBERGH, MARCO FIORENTINO
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Patent number: 11114409Abstract: Examples herein relate to optoelectronic assemblies. In particular, implementations herein relate to an optoelectronic assembly formed via a chip on wafer on substrate (CoWoS) process. The optoelectronic assembly includes a substrate, an interposer, and an electronic integrated circuit (EIC). Each of the substrate, interposer, and EIC includes opposing first and second sides. The EIC is flip-chip assembled to the first side of the interposer, and the interposer with the EIC assembled thereto is flip-chip assembled to the first side of the substrate. An overmold layer extends over the first side of the interposer and encapsulates the EIC. The overmold layer includes a cavity such that a region of the first side of the interposer is exposed. An optical component is positioned within the cavity and coupled to the first side of the interposer.Type: GrantFiled: January 30, 2020Date of Patent: September 7, 2021Assignee: Hewlett Packard Enterprise Development LPInventors: Mir Ashkan Seyedi, Marco Fiorentino
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Patent number: 11115130Abstract: Techniques and circuitry for wavelength monitor and control are disclosed herein. The disclosed wavelength monitor and control circuitry and techniques are designed to realize a multi-channel DWDM optical link by using a photonic receiver that dynamically adjusts resonant wavelengths of the microring drop filter (MDF), as needed. The wavelength monitor and control circuitry can monitor and control the resonant wavelengths of multiple MDFs for a DWDM silicon photonics receiver with minimum power and area overhead. In an embodiment, circuitry for an optical receiver comprises an MDF having resonant wavelength for multiple DWDM channels, and circuitry to control and monitor the resonant wavelength of the MDF in real-time and in manner that compensates for deviation between actual resonant wavelength of the MDF and the incident optical wavelength of the MDF.Type: GrantFiled: July 9, 2020Date of Patent: September 7, 2021Assignee: Hewlett Packard Enterprise Development LPInventors: Tsung Ching Huang, Jinsung Youn, Peter Jin Rhim, Marco Fiorentino
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Publication number: 20210242168Abstract: Examples herein relate to optoelectronic assemblies. In particular, implementations herein relate to an optoelectronic assembly formed via a chip on wafer on substrate (CoWoS) process. The optoelectronic assembly includes a substrate, an interposer, and an electronic integrated circuit (EIC). Each of the substrate, interposer, and EIC includes opposing first and second sides. The EIC is flip-chip assembled to the first side of the interposer, and the interposer with the EIC assembled thereto is flip-chip assembled to the first side of the substrate. An overmold layer extends over the first side of the interposer and encapsulates the EIC. The overmold layer includes a cavity such that a region of the first side of the interposer is exposed. An optical component is positioned within the cavity and coupled to the first side of the interposer.Type: ApplicationFiled: January 30, 2020Publication date: August 5, 2021Inventors: Mir Ashkan Seyedi, Marco Fiorentino
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Patent number: 10989878Abstract: An example system for multi-wavelength optical signal splitting is disclosed. The example disclosed herein comprises a first splitter, a second splitter, and a modulator. The system receives a multi-wavelength optical signal and an electrical signal, wherein the multi-wavelength optical signal comprises a plurality of optical wavelengths and has a power level. The first splitter is to split the plurality of optical wavelengths into a plurality of optical wavelength groups. The second splitter is to split the multi-wavelength optical signal or the plurality of optical wavelength groups into a plurality of lower power signal groups. The modulator is to encode the electrical signal into the plurality of optical wavelength groups, the plurality of lower power signal groups, or a combination thereof.Type: GrantFiled: May 15, 2020Date of Patent: April 27, 2021Assignee: Hewlett Packard Enterprise Development LPInventors: Raymond G. Beausoleil, Di Liang, Marco Fiorentino, Geza Kurczveil, Mir Ashkan Seyedi, Zhihong Huang
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Patent number: 10895688Abstract: In example implementations, an optical connector is provided. The optical connector includes a jumper holder, a base bracket, and an optical ferrule. The jumper holder holds a plurality of ribbon fibers. The base bracket is coupled to an electrical substrate to mate with the jumper holder. The optical ferrule is coupled to an end of each one of the plurality of ribbon fibers. The optical ferrule is laterally inserted into a corresponding orthogonal socket that is coupled to a silicon interposer on the electrical substrate to optically mate the optical ferrule to the orthogonal socket.Type: GrantFiled: November 25, 2019Date of Patent: January 19, 2021Assignee: Hewlett Packard Enterprise Development LPInventors: Kevin B. Leigh, Paul Kessler Rosenberg, Sagi Mathai, Mir Ashkan Seyedi, Michael Renne Ty Tan, Wayne Victor Sorin, Marco Fiorentino
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Patent number: 10845535Abstract: Systems and methods are provided for processing an optical signal. An example system may include a source disposed on a substrate and capable of emitting the optical signal. A first waveguide is formed in the substrate to receive the optical signal. A first coupler is disposed on the substrate to receive a reflected portion of the optical signal. A second waveguide is formed in the substrate to receive the reflected portion from the first coupler. A second coupler is formed in the substrate to mix the optical signal and the reflected portion to form a mixed signal. Photodetectors are formed in the substrate to convert the mixed signal to an electrical signal. A processor is electrically coupled to the substrate and programmed to convert the electrical signal from a time domain to a frequency domain to determine a phase difference between the optical signal and the reflected portion.Type: GrantFiled: December 10, 2019Date of Patent: November 24, 2020Assignee: Hewlett Packard Enterprise Development LPInventors: Amit S. Sharma, John Paul Strachan, Marco Fiorentino
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Patent number: 10805004Abstract: Examples described herein relate to reducing a magnitude of a supply voltage for a circuit element of an optical transmitter device. In some such examples, the circuit element is a driving element that is to receive a first electrical data signal and to provide a second electrical data signal to an optical element that is to provide an optical data signal. A testing element is to compare the optical data signal to the first electrical data signal to determine whether the optical transmitter device meets a performance threshold. When the device meets the performance threshold, a regulating element is to reduce a magnitude of the supply voltage of the driving element.Type: GrantFiled: April 7, 2017Date of Patent: October 13, 2020Assignee: Hewlett Packard Enterprise Development LPInventors: Tsung Ching Huang, Rui Wu, Nan Qi, Mir Ashkan Seyedi, Marco Fiorentino, Raymond G. Beausoleil
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Patent number: 10804678Abstract: An example method of manufacturing a semiconductor device. A first wafer may be provided that includes a first layer that contains quantum dots. A second wafer may be provided that includes a buried dielectric layer and a second layer on the buried dielectric layer. An interface layer may be formed on at least one of the first layer and the second layer, where the interface layer may be an insulator, a transparent electrical conductor, or a polymer. The first wafer may be bonded to the second wafer by way of the interface layer.Type: GrantFiled: September 14, 2018Date of Patent: October 13, 2020Assignee: Hewlett Packard Enterprise Development LPInventors: Di Liang, Geza Kurczveil, Raymond G. Beausoleil, Marco Fiorentino
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Patent number: 10795104Abstract: A photonic integrated circuit package includes two arrays or sets of integrated comb laser modules that are bonded to a silicon interposer. Each comb laser of an array has a common or overlapping spectral range, with each laser in the array being optically coupled to a local optical bus. The effective spectral range of the lasers in each array are different, or distinct, as to each array. An optical coupler is disposed within the silicon interposer and is optically coupled to each of the local optical buses. An ASIC (application specific integrated circuit) is bonded to the silicon interposer and provides control and operation of the comb laser modules.Type: GrantFiled: September 30, 2019Date of Patent: October 6, 2020Assignee: Hewlett Packard Enterprise Develpment LPInventors: Mir Ashkan Seyedi, Marco Fiorentino, Geza Kurczveil, Raymond G. Beausoleil