Abstract: A high-speed digital transceiver is provided for use in a PBX environment comprising twisted-pair wire cables interconnecting like transceivers, each transceiver being operative to exchange voice, data and control information in a packetized format over a common twisted-pair cable. Specifically, each transceiver communicates packetized pulse code modulated information in pure Alternate Mark Inverted (AMI) coding, that is, without the introduction of bipolar violation pulses to provide timing. Frame synchronization is acquired on the first pulse by the use of a digital circuit deriving synchronization from a local high-speed clock. The use of a high-speed clock-driven digital circuit for synchronization acquisition eliminates the need for a phase-locked loop synchronization scheme and its concomitant finite acquisition delay.

Abstract: The locking valve apparatus includes a valve housing containing a rotatable cylinder lock with a keyway extending into the cylinder from one end and with a stationary cylindrical member of the valve housing encircling this rotatable cylinder. An alignment element on the outside of this stationary cylindrical member is adapted to position, align and guide a removable handle for the valve. This removable handle includes a sleeve defining a socket which is adapted to nest over the stationary cylindrical member of the valve housing when the handle is engaged for operating the valve. A key is located inside of this sleeve socket, being adjustably secured therein, and the socket is provided with a slot, which the user of the handle must align with the alignment element, otherwise the handle cannot be positioned on the valve housing.

Abstract: A circuit for the decoding during reading of data prerecorded on a magnetic medium comprising a circuit for recognition of the recording code of the data recorded on the support by the recognition of the frequency of an input signal generated during the reading of the support and a frequency generating circuit controlled by the recognition circuit for generating a signal of predetermined frequency for the conversion of the recording code recognized into a binary code. A read-only memory comprising two zones is responsive to the recognition means for generating correcting words applied to a counter for controlling the position of a decoding window generated by a phase locked loop oscillator.