Patents by Inventor Mark D. Poliks

Mark D. Poliks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7713767
    Abstract: A method of making a circuitized substrate (e.g., PCB) including at least one and possibly several internal optical pathways as part thereof such that the resulting substrate will be capable of transmitting and/or receiving both electrical and optical signals. The method involves forming at least one opening between a side of the optical core and an adjacent upstanding member such that the opening is defined by at least one angular sidewall. Light passing through the optical core material (or into the core from above) is reflected off this angular sidewall. The medium (e.g., air) within the opening thus also serves as a reflecting medium due to its own reflective index in comparison to that of the adjacent optical core material. The method utilizes many processes used in conventional PCB manufacturing, thereby keeping costs to a minimum.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: May 11, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, How T. Lin, Roy H. Magnuson, Voya R. Markovich, Mark D. Poliks
  • Patent number: 7646098
    Abstract: A multilayered circuitized substrate including a plurality of dielectric layers each comprised of a p-aramid paper impregnated with a halogen-free, low moisture absorptivity resin including an inorganic filler but not including continuous or semi-continuous fiberglass fibers as part thereof, and a first circuitized layer positioned on a first of the dielectric layers. A method of making this substrate is also provided.
    Type: Grant
    Filed: April 10, 2008
    Date of Patent: January 12, 2010
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Robert M. Japp, Voya R. Markovich, Kostas I. Papathomas, Mark D. Poliks
  • Publication number: 20090301770
    Abstract: A method for forming a film on a conductive substrate, comprising immersing a substrate having a conductive portion in a solution comprising a metal ion ceramic precursor for the film and a peroxide; applying a voltage potential to the conductive portion with respect to a counter electrode in the solution, sufficient to protect the conductive portion from corrosion by the solution, and drive formation of a film on the substrate, controlling a pH of the solution while limiting a production of hydrogen by electrolysis of the solution proximate to the conductive portion; and maintaining the voltage potential for a sufficient duration to produce a film on the conductive portion. An electrode may be formed over the film to produce an electrical device. The film may be, for example, insulating, dielectric, resistive, semiconductive, magnetic, or ferromagnetic.
    Type: Application
    Filed: June 10, 2009
    Publication date: December 10, 2009
    Inventors: Junghyun Cho, Bahgat Sammakia, Mark D. Poliks, Roy Magnuson, Biplab Kumar Roy
  • Publication number: 20090258161
    Abstract: A circuitized substrate including a dielectric layer having a p-aramid paper impregnated with a halogen-free, low moisture absorptivity resin and not including continuous or semi-continuous fiberglass fibers as part thereof, and a first circuitized layer positioned on the dielectric layer. A method of making this substrate is also provided.
    Type: Application
    Filed: March 2, 2009
    Publication date: October 15, 2009
    Inventors: Robert M. Japp, Voya R. Markovich, Kostas I. Papathomas, Mark D. Poliks
  • Publication number: 20090173426
    Abstract: A multilayered circuitized substrate including a plurality of dielectric layers each comprised of a p-aramid paper impregnated with a halogen-free, low moisture absorptivity resin including an inorganic filler but not including continuous or semi-continuous fiberglass fibers as part thereof, and a first circuitized layer positioned on a first of the dielectric layers. A method of making this substrate is also provided.
    Type: Application
    Filed: March 2, 2009
    Publication date: July 9, 2009
    Inventors: Robert M. Japp, Voya R. Markovich, Kostas I. Papathomas, Mark D. Poliks
  • Patent number: 7541265
    Abstract: A material for use as part of an internal capacitor within a circuitized substrate includes a polymer (e.g., a cycloaliphatic epoxy or phenoxy based) resin and a quantity of nano-powders of ferroelectric ceramic material (e.g., barium titanate) having a particle size substantially in the range of from about 0.01 microns to about 0.90 microns and a surface area for selected ones of said particles within the range of from about 2.0 to about 20 square meters per gram. A circuitized substrate adapted for using such a material and capacitor therein and a method of making such a substrate are also provided. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) are also provided.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: June 2, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, John M. Lauffer, Kostas I. Papathomas, Mark D. Poliks
  • Patent number: 7541058
    Abstract: A circuitized substrate (e.g., PCB) including an internal optical pathway as part thereof such that the substrate is capable of transmitting and/or receiving both electrical and optical signals. The substrate includes an angular reflector on one of the cladding layers such that optical signals passing through the optical core will impinge on the angled reflecting surfaces of the angular reflector and be reflected up through an opening (including one with optically transparent material therein), e.g., to a second circuitized substrate also having at least one internal optical pathway as part thereof, to thus interconnect the two substrates optically. A method of making the substrate is also provided.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: June 2, 2009
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, How T. Lin, Roy H. Magnuson, Voya R. Markovich, Mark D. Poliks
  • Publication number: 20090093073
    Abstract: A method of making a circuitized substrate (e.g., PCB) including at least one and possibly several internal optical pathways as part thereof such that the resulting substrate will be capable of transmitting and/or receiving both electrical and optical signals. The method involves forming at least one opening between a side of the optical core and an adjacent upstanding member such that the opening is defined by at least one angular sidewall. Light passing through the optical core material (or into the core from above) is reflected off this angular sidewall. The medium (e.g., air) within the opening thus also serves as a reflecting medium due to its own reflective index in comparison to that of the adjacent optical core material. The method utilizes many processes used in conventional PCB manufacturing, thereby keeping costs to a minimum.
    Type: Application
    Filed: October 9, 2007
    Publication date: April 9, 2009
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, How T. Lin, Roy H. Magnuson, Voya R. Markovich, Mark D. Poliks
  • Publication number: 20090092353
    Abstract: A circuitized substrate (e.g., PCB) including an internal optical pathway as part thereof such that the substrate is capable of transmitting and/or receiving both electrical and optical signals. The substrate includes an angular reflector on one of the cladding layers such that optical signals passing through the optical core will impinge on the angled reflecting surfaces of the angular reflector and be reflected up through an opening (including one with optically transparent material therein), e.g., to a second circuitized substrate also having at least one internal optical pathway as part thereof, to thus interconnect the two substrates optically. A method of making the substrate is also provided.
    Type: Application
    Filed: October 9, 2007
    Publication date: April 9, 2009
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Benson Chan, How T. Lin, Roy H. Magnuson, Voya R. Markovich, Mark D. Poliks
  • Publication number: 20080217050
    Abstract: A multi-layered interconnect structure and method of formation. In a first embodiment, first and second liquid crystal polymer (LCP) dielectric layers are directly bonded, respectively, to first and second opposing surface of a thermally conductive layer, with no extrinsic adhesive material bonding the thermally conductive layer with either the first or second LCP dielectric layer. In a second embodiment, first and second 2S1P substructures are directly bonded, respectively, to first and second opposing surfaces of a LCP dielectric joining layer, with no extrinsic adhesive material bonding the LCP dielectric joining layer with either the first or second 2S1P substructures.
    Type: Application
    Filed: October 17, 2007
    Publication date: September 11, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Frank D. Egitto, Donald S. Farquhar, Voya R. Markovich, Mark D. Poliks, Douglas O. Powell
  • Publication number: 20080191354
    Abstract: A circuitized substrate including a dielectric layer having a p-aramid paper impregnated with a halogen-free, low moisture absorptivity resin and not including continuous or semi-continuous fiberglass fibers as part thereof, and a first circuitized layer positioned on the dielectric layer. A method of making this substrate is also provided.
    Type: Application
    Filed: April 10, 2008
    Publication date: August 14, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert M. Japp, Voya R. Markovich, Kostas I. Papathomas, Mark D. Poliks
  • Publication number: 20080191353
    Abstract: A multilayered circuitized substrate including a plurality of dielectric layers each comprised of a p-aramid paper impregnated with a halogen-free, low moisture absorptivity resin including an inorganic filler but not including continuous or semi-continuous fiberglass fibers as part thereof, and a first circuitized layer positioned on a first of the dielectric layers. A method of making this substrate is also provided.
    Type: Application
    Filed: April 10, 2008
    Publication date: August 14, 2008
    Applicant: Endicott Interconnect Technologies, Inc.
    Inventors: Robert M. Japp, Voya R. Markovich, Kostas I. Papathomas, Mark D. Poliks
  • Publication number: 20080178999
    Abstract: A multi-layered interconnect structure and method of formation. In a first embodiment, first and second liquid crystal polymer (LCP) dielectric layers are directly bonded, respectively, to first and second opposing surface of a thermally conductive layer, with no extrinsic adhesive material bonding the thermally conductive layer with either the first or second LCP dielectric layer. In a second embodiment, first and second 2S1P substructures are directly bonded, respectively, to first and second opposing surfaces of a LCP dielectric joining layer, with no extrinsic adhesive material bonding the LCP dielectric joining layer with either the first or second 2S1P substructures.
    Type: Application
    Filed: October 16, 2007
    Publication date: July 31, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Frank D. Egitto, Donald S. Farquhar, Voya R. Markovich, Mark D. Poliks, Douglas O. Powell
  • Patent number: 7402254
    Abstract: A method of forming a core for and forming a composite wiring board. The core has an electrically conductive coating on at least one face of a dielectric substrate. At least one opening is formed through the substrate extending from one face to the other and through each conductive coating. An electrically conductive material is dispensed in each of the openings extending through the conducting coating. At least a portion of the surface of the conductive coating on one face is removed to allow a nub of the conductive material to extend above the substrate face and any remaining conductive material to thereby form a core that can be electrically joined face-to-face with a second core member or other circuitized structure.
    Type: Grant
    Filed: September 8, 2003
    Date of Patent: July 22, 2008
    Assignee: International Business Machines Corporation
    Inventors: Brian E. Curcio, Donald S. Farquhar, Konstantinos I. Papathomas, Mark D. Poliks
  • Patent number: 7301108
    Abstract: A multi-layered interconnect structure and method of formation. In a first embodiment, first and second liquid crystal polymer (LCP) dielectric layers are directly bonded, respectively, to first and second opposing surface of a thermally conductive layer, with no extrinsic adhesive material bonding the thermally conductive layer with either the first or second LCP dielectric layer. In a second embodiment, first and second 2S1P substructures are directly bonded, respectively, to first and second opposing surfaces of a LCP dielectric joining layer, with no extrinsic adhesive material bonding the LCP dielectric joining layer with either the first or second 2S1P substructures.
    Type: Grant
    Filed: October 5, 2004
    Date of Patent: November 27, 2007
    Assignee: International Business Machines Corporation
    Inventors: Frank D. Egitto, Donald S. Farquhar, Voya R. Markovich, Mark D. Poliks, Douglas O. Powell
  • Patent number: 7025607
    Abstract: A material for use as part of an internal capacitor within a circuitized substrate includes a polymer resin and a quantity of nano-powders including a mixture of at least one metal component and at least one ferroelectric ceramic component, the ferroelectric ceramic component nano-particles having a particle size substantially in the range of between about 0.01 microns and about 0.9 microns and a surface within the range of from about 2.0 to about 20 square meters per gram. A circuitized substrate adapted for using such a material and capacitor therein and a method of making such a substrate are also provided. An electrical assembly (substrate and at least one electrical component) and an information handling system (e.g., personal computer) are also provided.
    Type: Grant
    Filed: January 10, 2005
    Date of Patent: April 11, 2006
    Assignee: Endicott Interconnect Technologies, Inc.
    Inventors: Rabindra N. Das, John M. Lauffer, Voya R. Markovich, Mark D. Poliks
  • Patent number: 7014731
    Abstract: A semiconductor device having a thermoset-containing, dielectric material and methods for fabricating the same is provided. The device may take the form of a printed circuit board, an integrated circuit chip carrier, or the like. The dielectric material is a non-fibrillated, fluoropolymer matrix that has inorganic particles distributed therein and is impregnated with a thermoset material.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: March 21, 2006
    Assignee: International Business Machines Corporation
    Inventors: Donald S. Farquhar, Konstantinos I. Papathomas, Mark D. Poliks
  • Patent number: 6967705
    Abstract: A multi-layered structure and method of formation. A page is generated by stacking N substructures (N?2) in an ordered sequence. A first substructure of each pair of adjacent substructures comprises liquid crystal polymer (LCP) dielectric material to be bonded with a second substructure of a pair of the adjacent substructure. The page is subjected to a temperature less than the lowest nematic-to-isotropic transition temperature of the LCP dielectric materials within the page. The dwell time and elevated pressure are sufficient to cause all LCP dielectric material within the page to plastically deform and laminate each pair of adjacent substructures without any extrinsic adhesive layer disposed between the first and second substructures of each pair of adjacent substructures.
    Type: Grant
    Filed: August 25, 2004
    Date of Patent: November 22, 2005
    Assignee: International Business Machines Corporation
    Inventors: Donald S. Farquhar, Mark D. Poliks
  • Patent number: 6944946
    Abstract: Power and ground planes that are used in Printed Circuit Boards (PCBs) and that comprise porous, conductive materials are disclosed. Using porous power and ground plane materials in PCBs allows liquids (e.g., water and/or other solvents) to pass through the power and ground planes, thus decreasing failures in PCBs (or PCBs used as laminate chip carriers) caused by cathodic/anodic filament growth and delamination of insulators. Porous conductive materials suitable for use in PCBs may be formed by using metal-coated organic cloths (such as polyester or liquid crystal polymers) or fabrics (such as those made from carbon/graphite or glass fibers), using metal wire mesh instead of metal sheets, using sintered metal, or making metal sheets porous by forming an array of holes in the metal sheets. Fabrics and mesh may be woven or random. If an array of holes is formed in a metal sheet, such an array may be formed with no additional processing steps than are performed using conventional PCB assembly methods.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: September 20, 2005
    Assignee: International Business Machines Corporation
    Inventors: Robert M. Japp, Mark D. Poliks
  • Patent number: 6929900
    Abstract: A structure and method for forming a tamper respondent electronic circuit enclosure that includes an integrated circuit structure, a mesh structure surrounding the integrated circuit structure, and a sealed enclosure surrounding the mesh structure. The mesh structure includes a layer of flexible dielectric having a first side and a second side, a screen-printed pattern of flexible electrically conductive first circuit lines forming a first resistor network on the first side, and a photo lithographically-formed pattern of flexible electrically conductive second circuit lines forming a second resistor network on the second side.
    Type: Grant
    Filed: November 7, 2003
    Date of Patent: August 16, 2005
    Assignee: International Business Machines Corporation
    Inventors: Donald S. Farquhar, Claudius Feger, Voya Markovich, Konstantinos I. Papathomas, Mark D. Poliks, Jane M. Shaw, George Szeparowycz, Steve H. Weingart