Patents by Inventor Mark D. Poliks

Mark D. Poliks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020050402
    Abstract: Conductive materials that have low coefficients of thermal expansion (CTEs) and that are used for power and ground planes are disclosed. Fibrous materials (such as carbon, graphite, glass, quartz, polyethylene, and liquid crystal polymer fibers) with low CTEs are metallized to provide a resultant conductive material with a low CTE. Such fibers may be metallized in their individual state and then formed into a fabric, or these materials may be formed into a fabric and then metallized or a combination of both metallizations may be used. In addition, a graphite or carbon sheet may be metallized on one or both sides to provide a material that has a low CTE and high conductivity. These metallized, low CTE power and ground planes may be laminated with other planes/cores into a composite, or laminated into a core which is then laminated with other planes/cores into a composite. The resultant composite may be used for printed circuit boards (PCBs) or PCBs used as laminate chip carriers.
    Type: Application
    Filed: December 7, 2001
    Publication date: May 2, 2002
    Inventors: Robert M. Japp, Mark D. Poliks
  • Patent number: 6329603
    Abstract: Conductive materials that have low coefficients of thermal expansion (CTEs) and that are used for power and ground planes are disclosed. Fibrous materials (such as carbon, graphite, glass, quartz, polyethylene, and liquid crystal polymer fibers) with low CTEs are metallized to provide a resultant conductive material with a low CTE. Such fibers may be metallized in their individual state and then formed into a fabric, or these materials may be formed into a fabric and then metallized or a combination of both metallizations may be used. In addition, a graphite or carbon sheet may be metallized on one or both sides to provide a material that has a low CTE and high conductivity. These metallized, low CTE power and ground planes may be laminated with other planes/cores into a composite, or laminated into a core which is then laminated with other planes/cores into a composite. The resultant composite may be used for printed circuit boards (PCBs) or PCBs used as laminate chip carriers.
    Type: Grant
    Filed: April 7, 1999
    Date of Patent: December 11, 2001
    Assignee: International Business Machines Corporation
    Inventors: Robert M. Japp, Mark D. Poliks
  • Publication number: 20010041389
    Abstract: A semiconductor device having a thermoset-containing, dielectric material and methods for fabricating the same is provided. The device may take the form of a printed circuit board, an integrated circuit chip carrier, or the like. The dielectric material is a non-fibrillated, fluoropolymer matrix that has inorganic particles distributed therein and is impregnated with a thermoset material.
    Type: Application
    Filed: February 12, 2001
    Publication date: November 15, 2001
    Inventors: Donald S. Farquhar, Konstantinos I. Papathomas, Mark D Poliks
  • Patent number: 6254972
    Abstract: A semiconductor device having a thermoset-containing, dielectric material and methods for fabricating the same is provided. The device may take the form of a printed circuit board, an integrated circuit chip carrier, or the like. The dielectric material is a non-fibrillated, fluoropolymer matrix that has inorganic particles distributed therein and is impregnated with a thermoset material.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: July 3, 2001
    Assignee: International Business Machines Corporation
    Inventors: Donald S. Farquhar, Konstantinos I. Papathomas, Mark D. Poliks
  • Publication number: 20010005548
    Abstract: A semiconductor device having a thermoset-containing, dielectric material and methods for fabricating the same is provided. The device may take the form of a printed circuit board, an integrated circuit chip carrier, or the like. The dielectric material is a non-fibrillated, fluoropolymer matrix that has inorganic particles distributed therein and is impregnated with a thermoset material.
    Type: Application
    Filed: February 12, 2001
    Publication date: June 28, 2001
    Inventors: Donald S. Farquhar, Konstantinos l. Papathomas, Mark D. Poliks
  • Patent number: 6207595
    Abstract: A fabric material and method of its manufacture suitable for use in electronic packages including chip carriers. High insulation resistance is exhibited when subjected to high temperatures and humidity stress conditions.
    Type: Grant
    Filed: March 2, 1998
    Date of Patent: March 27, 2001
    Assignee: International Business Machines Corporation
    Inventors: Bernd K. Appelt, Lawrence R. Blumberg, William T. Fotorny, Ross D. Havens, Robert M. Japp, Kostas Papathomas, Jan Obrzut, Mark D. Poliks, Amarjit S. Rai
  • Patent number: 5194930
    Abstract: Composition and solder interconnection structure for its use, wherein the gap created by solder connections between a carrier substrate and a semiconductor chip device mounted thereon is filled with the solvent free formulation obtained by curing a preparation containing a cycloaliphatic polyepoxide and/or curable cyanate ester or prepolymer thereof, polyol, and filler which is substantially free of alpha particle emissions.
    Type: Grant
    Filed: September 16, 1991
    Date of Patent: March 16, 1993
    Assignee: International Business Machines
    Inventors: Kostas Papathomas, Mark D. Poliks, David W. Wang, Frederick R. Christie