Patents by Inventor Martin Schrems

Martin Schrems has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10283541
    Abstract: A photosensor (2) is arranged in a semiconductor substrate (1) at a main surface (10), a dielectric layer (4) is arranged on or above the main surface, the dielectric layer including a metal layer (6) electrically connected with the photosensor, and an aperture layer (16) formed from an opaque or semitransparent material is arranged on or above the dielectric layer. The aperture layer is provided with an array of transparent aperture zones (18) above the photosensor, each of the aperture zones penetrating the aperture layer.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: May 7, 2019
    Assignee: ams AG
    Inventors: Joerg Siegert, Franz Schrank, Martin Schrems
  • Patent number: 10256147
    Abstract: The dicing method comprises the steps of providing a substrate (1) of semiconductor material, the substrate having a main surface (10), where integrated components (3) of chips (13) are arranged, and a rear surface (11) opposite the main surface, fastening a first handling wafer above the main surface, thinning the substrate at the rear surface, and forming trenches (20) penetrating the substrate and separating the chips by a single etching step after the substrate has been thinned.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: April 9, 2019
    Assignee: ams AG
    Inventors: Martin Schrems, Bernhard Stering, Franz Schrank
  • Patent number: 10217715
    Abstract: The semiconductor device comprises a semiconductor substrate (1) with a main surface (10) and a further main surface (11) opposite the main surface, a TSV (3) penetrating the substrate from the main surface to the further main surface, a metallization (13) of the TSV, an under-bump metallization (5) and a bump contact (6) at least partially covering the TSV at the further main surface. The TSV (3) comprises a cavity (15), which may be filled with a gas or liquid. An opening (15?) of the cavity is provided to expose the cavity to the environment.
    Type: Grant
    Filed: February 9, 2015
    Date of Patent: February 26, 2019
    Assignee: ams AG
    Inventors: Martin Schrems, Bernhard Stering, Harald Etschmaier
  • Patent number: 9947711
    Abstract: The semiconductor device comprises a semiconductor substrate (1), a sensor or sensor array (2) arranged at a main surface (10) of the substrate, an integrated circuit (3) arranged at or above the main surface, and a focusing element (17) comprising recesses (4) formed within a further main surface (11) of the substrate opposite the main surface. The focusing element may be arranged opposite the sensor or sensor array (2), which may be a photosensor or photodetector or an array of photosensors or photodetectors, for instance. The focusing element (17) is formed by etching the recesses (4) into the semiconductor material.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: April 17, 2018
    Assignee: AMS AG
    Inventors: Rainer Minixhofer, Martin Schrems, Sara Carniello
  • Publication number: 20180096969
    Abstract: The method of producing an interposer-chip-arrangement, comprises providing an interposer (1) with an integrated circuit (25), arranging a dielectric layer (2) with metal layers embedded in the dielectric layer above a main surface (10) of the interposer, connecting the integrated circuit with at least one of the metal layers, forming an interconnection (7) through the interposer, the interconnection contacting one of the metal layers, arranging a further dielectric layer (3) above a further main surface (11) of the interposer opposite the main surface and arranging a further metal layer in or on the further dielectric layer, the further metal layer being connected with the interconnection, arranging a chip provided with at least one contact pad at the main surface or at the further main surface, and electrically conductively connecting the contact pad with the interconnection.
    Type: Application
    Filed: October 6, 2017
    Publication date: April 5, 2018
    Inventors: Jochen KRAFT, Martin SCHREMS, Franz SCHRANK
  • Patent number: 9929035
    Abstract: A relief structure is formed on a surface of a carrier provided for accommodating a wafer, which is fastened to the carrier by a removable adhesive contacting the carrier. The relief structure, which may be spatially confined to the center of the carrier, reduces the strength of adhesion between the wafer and the carrier. If the adhesive is appropriately selected and maintains the connection between the wafer and the carrier at elevated temperatures, further process steps can be performed at temperatures of typically 300° C. or more. The subsequent mechanical separation of the adhesive joint is facilitated by the relief structure on the carrier.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: March 27, 2018
    Assignee: ams AG
    Inventors: Thomas Bodner, Joerg Siegert, Martin Schrems
  • Patent number: 9870988
    Abstract: A semiconductor substrate is provided with an annular cavity extending from a front side of the substrate to an opposite rear side. A metallization is applied in the annular cavity, thereby forming a through-substrate via and leaving an opening of the annular cavity at the front side. A solder ball is placed above the opening and a reflow of the solder ball is effected, thereby forming a void of the through-substrate via, the void being covered by the solder ball.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: January 16, 2018
    Assignee: ams AG
    Inventors: Cathal Cassidy, Martin Schrems, Franz Schrank
  • Publication number: 20170365551
    Abstract: A semiconductor substrate is provided with an annular cavity extending from a front side of the substrate to an opposite rear side. A metallization is applied in the annular cavity, thereby forming a through-substrate via and leaving an opening of the annular cavity at the front side. A solder ball is placed above the opening and a reflow of the solder ball is effected, thereby forming a void of the through-substrate via, the void being covered by the solder ball.
    Type: Application
    Filed: August 30, 2017
    Publication date: December 21, 2017
    Inventors: Cathal CASSIDY, Martin SCHREMS, Franz SCHRANK
  • Patent number: 9818724
    Abstract: The interposer-chip-arrangement comprises an interposer (1), metal layers arranged above a main surface (10), a further metal layer arranged above a further main surface (11) opposite the main surface, an electrically conductive interconnection (7) through the interposer, the interconnection connecting one of the metal layers and the further metal layer, a chip (12) arranged at the main surface or at the further main surface, the chip having a contact pad (15), which is electrically conductively connected with the interconnection, a dielectric layer (2) arranged above the main surface with the metal layers embedded in the dielectric layer, a further dielectric layer (3) arranged above the further main surface with the further metal layer embedded in the further dielectric layer, and an integrated circuit (25) in the interposer, the integrated circuit being connected with at least one of the metal layers (5).
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: November 14, 2017
    Assignee: AMS AG
    Inventors: Jochen Kraft, Martin Schrems, Franz Schrank
  • Publication number: 20170309665
    Abstract: A photosensor (2) is arranged in a semiconductor substrate (1) at a main surface (10), a dielectric layer (4) is arranged on or above the main surface, the dielectric layer including a metal layer (6) electrically connected with the photosensor, and an aperture layer (16) formed from an opaque or semitransparent material is arranged on or above the dielectric layer. The aperture layer is provided with an array of transparent aperture zones (18) above the photosensor, each of the aperture zones penetrating the aperture layer.
    Type: Application
    Filed: November 9, 2015
    Publication date: October 26, 2017
    Inventors: Joerg SIEGERT, Franz SCHRANK, Martin SCHREMS
  • Patent number: 9773729
    Abstract: A semiconductor substrate is provided with a through-substrate via comprising a metallization and an opening. A solder ball is placed on the opening. A reflow of the solder ball is performed in such a way that the solder ball closes the through-substrate via and leaves a void in the through-substrate via.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: September 26, 2017
    Assignee: ams AG
    Inventors: Cathal Cassidy, Martin Schrems, Franz Schrank
  • Patent number: 9768131
    Abstract: A wiring (3) comprising electrical conductors (4, 5, 6, 7) is formed in a dielectric layer (2) on or above a semiconductor substrate (1), an opening is formed in the dielectric layer to uncover a contact pad (8), which is formed by one of the conductors, and a further opening is formed in the dielectric layer to uncover an area of a further conductor (5), separate from the contact pad. The further opening is filled with an electrically conductive material (9), and the dielectric layer is thinned from a side opposite the substrate, so that the electrically conductive material protrudes from the dielectric layer.
    Type: Grant
    Filed: January 14, 2015
    Date of Patent: September 19, 2017
    Assignee: AMS AG
    Inventors: Jochen Kraft, Karl Rohracher, Martin Schrems
  • Patent number: 9735101
    Abstract: The semiconductor device comprises a semiconductor substrate (10) with a metallization (111) having an upper terminal layer (22) located at a front side (20) of the substrate. The metallization forms a through-substrate via (23) from the upper terminal layer to a rear terminal layer (13) located opposite to the front side at a rear side (21) of the substrate. The through-substrate via comprises an annular cavity (18) and a void (101), which may be filled with air or another gas. A solder ball (100) closes the void without completely filling it. A variety of interconnections for three-dimensional integration is offered by this scheme.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: August 15, 2017
    Assignee: AMS AG
    Inventors: Cathal Cassidy, Martin Schrems, Franz Schrank
  • Publication number: 20170179056
    Abstract: The semiconductor device comprises a semiconductor substrate (1) with a main surface (10) and a further main surface (11) opposite the main surface, a TSV (3) penetrating the substrate from the main surface to the further main surface, a metallization (13) of the TSV, an under-bump metallization (5) and a bump contact (6) at least partially covering the TSV at the further main surface. The TSV (3) comprises a cavity (15), which may be filled with a gas or liquid. An opening (15?) of the cavity is provided to expose the cavity to the environment.
    Type: Application
    Filed: February 9, 2015
    Publication date: June 22, 2017
    Inventors: Martin SCHREMS, Bernhard STERING, Harald ETSCHMAIER
  • Patent number: 9684074
    Abstract: An optical sensor arrangement, in particular an optical proximity sensor arrangement comprises a three-dimensional integrated circuit further comprising a first layer comprising a light-emitting device, a second layer comprising a light-detector and a driver circuit. The driver circuit is electrically connected to the light-emitting device and to the light-detector to control the operation of the light-emitting device and the light-detector. A mold layer comprising a first light-barrier between the light-emitting device and the light-detector configured to block light from being transmitted directly from the light-emitting device to the light-detector.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: June 20, 2017
    Assignee: AMS AG
    Inventors: Franz Schrank, Eugene G. Dierschke, Martin Schrems
  • Publication number: 20170062277
    Abstract: The dicing method comprises the steps of providing a substrate (1) of semiconductor material, the substrate having a main surface (10), where integrated components (3) of chips (13) are arranged, and a rear surface (11) opposite the main surface, fastening a first handling wafer above the main surface, thinning the substrate at the rear surface, and forming trenches (20) penetrating the substrate and separating the chips by a single etching step after the substrate has been thinned.
    Type: Application
    Filed: February 9, 2015
    Publication date: March 2, 2017
    Inventors: Martin SCHREMS, Bernhard STERING, Franz SCHRANK
  • Publication number: 20170062504
    Abstract: The semiconductor device comprises a semiconductor substrate (1), a sensor or sensor array (2) arranged at a main surface (10) of the substrate, an integrated circuit (3) arranged at or above the main surface, and a focusing element (17) comprising recesses (4) formed within a further main surface (11) of the substrate opposite the main surface. The focusing element may be arranged opposite the sensor or sensor array (2), which may be a photosensor or photodetector or an array of photosensors or photodetectors, for instance. The focusing element (17) is formed by etching the recesses (4) into the semiconductor material.
    Type: Application
    Filed: February 10, 2015
    Publication date: March 2, 2017
    Inventors: Rainer MINIXHOFER, Martin SCHREMS, Sara CARNIELLO
  • Patent number: 9577001
    Abstract: The integrated imaging device comprises a substrate (1) with an integrated circuit (4), a cover (2), a cavity (6) enclosed between the substrate (1) and the cover (2), and a sensor (5) or an array of sensors (5) arranged in the cavity (6). A surface (11, 12) of the substrate (1) or the cover (2) opposite the cavity (6) has a structure (8) directing incident radiation. The surface structure (8) may be a plate zone or a Fresnel lens focusing infrared radiation and may be etched into the surface of the substrate or cover, respectively.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: February 21, 2017
    Assignee: AMS AG
    Inventors: Hubert Enichlmair, Rainer Minixhofer, Martin Schrems
  • Patent number: 9570390
    Abstract: The semiconductor device comprises a substrate of semiconductor material, a dielectric layer on the substrate, an electrically conductive contact pad arranged in the dielectric layer, a hot plate arranged in the dielectric layer, a recess of the substrate at the location of the hot plate, and an integrated circuit, which operates the hot plate. An electrically conductive layer is arranged on a side of the substrate opposite the dielectric layer. The substrate is provided with a via hole above the contact pad, and an electrically conductive material connecting the electrically conductive layer with the contact pad is applied in the via hole. The recess and the via hole are formed in the same process step.
    Type: Grant
    Filed: December 5, 2013
    Date of Patent: February 14, 2017
    Assignee: AMS AG
    Inventors: Franz Schrank, Martin Schrems
  • Publication number: 20170025351
    Abstract: The semiconductor device comprises a semiconductor substrate (10) with a metallization (111) having an upper terminal layer (22) located at a front side (20) of the substrate. The metallization forms a through-substrate via (23) from the upper terminal layer to a rear terminal layer (13) located opposite to the front side at a rear side (21) of the substrate. The through-substrate via comprises an annular cavity (18) and a void (101), which may be filled with air or another gas. A solder ball (100) closes the void without completely filling it. A variety of interconnections for three-dimensional integration is offered by this scheme.
    Type: Application
    Filed: September 30, 2016
    Publication date: January 26, 2017
    Inventors: Cathal CASSIDY, Martin SCHREMS, Franz SCHRANK