Patents by Inventor Martin Schrems

Martin Schrems has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8368390
    Abstract: A well (2) doped for a conductivity type and provided as the sensor region is formed in a substrate (1) made of semiconductor material. Contact regions (4), arranged spaced apart from one another and doped for the same conductivity type as the well (2), are formed in a cover layer (3) that delimits the region with the conductivity type of the well. The contact areas (4) are electroconductively connected to the well (2) and provided for terminal contacts (6).
    Type: Grant
    Filed: August 26, 2010
    Date of Patent: February 5, 2013
    Assignee: Austriamicrosystems AG
    Inventors: Martin Schrems, Sara Carniello
  • Patent number: 8338898
    Abstract: An MEMS microphone is bonded onto the surface of an IC component containing at least one integrated circuit suitable for the conditioning and processing of the electrical signal supplied by the MEMS microphone. The entire component is simple to produce and has a compact and space-saving construction. Production is accomplished in a simple and reliable manner.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: December 25, 2012
    Assignee: Austriamicrosystems AG
    Inventors: Franz Schrank, Martin Schrems
  • Publication number: 20110050210
    Abstract: A well (2) doped for a conductivity type and provided as the sensor region is formed in a substrate (1) made of semiconductor material. Contact regions (4), arranged spaced apart from one another and doped for the same conductivity type as the well (2), are formed in a cover layer (3) that delimits the region with the conductivity type of the well. The contact areas (4) are electroconductively connected to the well (2) and provided for terminal contacts (6).
    Type: Application
    Filed: August 26, 2010
    Publication date: March 3, 2011
    Applicant: austriamicrosystems AG
    Inventors: Martin Schrems, Sara Carniello
  • Publication number: 20100314762
    Abstract: The interlayer connection of the substrate is formed by a contact-hole filling (4) of a semiconductor layer (11) and metallization (17) of a recess (16) in a reverse-side semiconductor layer (13), wherein the semiconductor layers are separated from each other by a buried insulation layer (12), at whose layer position the contact-hole filling or the metallization ends.
    Type: Application
    Filed: July 23, 2008
    Publication date: December 16, 2010
    Applicant: austriamicrosystems AG
    Inventors: Franz Schrank, Martin Schrems, Jochen Kraft
  • Patent number: 7820342
    Abstract: In order to produce doping regions (DG) in a substrate (S) having different dopings with the aid of a single mask (DM) different mask regions are provided which have elongated mask openings (MO) having different orientations relative to the spatial direction of an oblique implantation. The substrate is rotated between the first and second oblique implantations, wherein during the first oblique implantation maximum and minimum shadings in the different mask regions are opposite one another and the conditions are precisely reversed during the second oblique implantation after the rotation of the substrate.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: October 26, 2010
    Assignee: Austriamicrosystems AG
    Inventors: Martin Knaipp, Rainer Minixhofer, Martin Schrems
  • Publication number: 20100144114
    Abstract: A method, in which a first isolating trench, filled with a dielectric material, and a second conducting trench, filled with an electrically conductive material, can be produced. To this end, the first and second trenches are etched with different trench widths, so that the first trench is filled completely with the dielectric material after a deposition of a dielectric layer over the entire surface with the edges covered, whereas the wider second trench is covered by the dielectric layer only on the inside walls. By anisotropic back-etching of the dielectric layer, the semiconductor substrate is exposed at the bottom of the second trench. Subsequently, the second trench is filled with an electrically conductive material and then represents a low-ohmic connection from the substrate surface to the buried structure located below the second trench.
    Type: Application
    Filed: October 22, 2007
    Publication date: June 10, 2010
    Applicant: austriamicroystems AG
    Inventors: Hubert Enichlmair, Martin Schrems, Franz Schrank
  • Publication number: 20090273030
    Abstract: A low cost integration method for a plurality of deep isolation trenches on the same chip is provided. The trenches have an additional n-type or p-type doped region surrounding the trench—silicon interface. Providing such variations of doping the trench interface is achieved by using implantation masking layers or doped glass films structured by a simple resist mask. By simple layout variation of the top dimension of the trench various trench depths at the same time can be ensured. Using this method, wider trenches will be deeper and smaller trenches will be shallower.
    Type: Application
    Filed: May 15, 2007
    Publication date: November 5, 2009
    Applicant: AUSTRIAMICROSYSTEMS AG
    Inventors: Martin Schrems, Jong Mun Park
  • Publication number: 20090098718
    Abstract: In order to produce doping regions (DG) in a substrate (S) having different dopings with the aid of a single mask (DM) different mask regions are provided which have elongated mask openings (MO) having different orientations relative to the spatial direction of an oblique implantation. The substrate is rotated between the first and second oblique implantations, wherein during the first oblique implantation maximum and minimum shadings in the different mask regions are opposite one another and the conditions are precisely reversed during the second oblique implantation after the rotation of the substrate.
    Type: Application
    Filed: November 3, 2005
    Publication date: April 16, 2009
    Inventors: Martin Knaipp, Rainer Minixhofer, Martin Schrems
  • Publication number: 20090041270
    Abstract: An MEMS microphone is bonded onto the surface of an IC component containing at least one integrated circuit suitable for the conditioning and processing of the electrical signal supplied by the MEMS microphone. The entire component is simple to produce and has a compact and space-saving construction. Production is accomplished in a simple and reliable manner.
    Type: Application
    Filed: October 12, 2005
    Publication date: February 12, 2009
    Applicant: austriamicrosystems AG
    Inventors: Franz Schrank, Martin Schrems
  • Patent number: 7067372
    Abstract: A memory cell has a trench, in which a trench capacitor is disposed. Furthermore a vertical transistor is formed in the trench above the trench capacitor. A barrier layer is disposed for the electric connection of the conductive trench filling to a lower doping region of the vertical transistor. The barrier layer is a diffusion barrier for dopants or impurities that are contained in the conductive trench filling.
    Type: Grant
    Filed: September 9, 2003
    Date of Patent: June 27, 2006
    Assignee: Infineon Technologies AG
    Inventors: Martin Schrems, Rolf Weis
  • Patent number: 7049647
    Abstract: A semiconductor memory cell is formed in a substrate and includes a trench capacitor and a selection transistor. The trench capacitor includes a capacitor dielectric and a conductive trench filling. Disposed on the conductive trench filling is a diffusion barrier on which an epitaxial layer is formed. The selection transistor is disposed as a planar transistor above the trench capacitor. A drain doping region of the selection transistor is disposed in the epitaxial layer.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: May 23, 2006
    Assignee: Infineon Technologies AG
    Inventors: Wolfram Karcher, Dietmar Temmler, Martin Schrems
  • Patent number: 6989311
    Abstract: The instant invention is a method for fabricating a trench contact to a deep trench capacitor with a polysilicon filling in a trench hole formed in a silicon substrate. An epitaxy process is performed to selectively grow silicon above the polysilicon filling in the trench hole. An opening leading to the polysilicon filling is anisotropically etched into the epitaxially grown silicon. The opening has lateral dimensions that are smaller than those of the polysilicon filling, and the opening is filled with polysilicon.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: January 24, 2006
    Assignee: Infineon Technologies AG
    Inventors: Martin Schrems, Dietmar Temmler, Andreas Wich-Glasen
  • Patent number: 6960541
    Abstract: A semiconductor element with at least one layer of tungsten oxide, optionally in a structured tungsten oxide layer, is described. The semiconductor element is characterized in that the relative premittivity of the tungsten oxide layer is higher than 50.
    Type: Grant
    Filed: July 16, 2001
    Date of Patent: November 1, 2005
    Assignee: Infineon Technologies AG
    Inventors: Dirk Drescher, Helmut Tews, Martin Schrems, Helmut Wurzer
  • Patent number: 6939805
    Abstract: To fabricate a trench capacitor in a substrate, a trench is formed in the substrate. The trench has an upper region and a lower region. In the trench, first of all nanocrystallites and/or a seed layer for nanocrystallites are deposited in the upper region and the lower region. Then, the nanocrystallites and/or the seed layer are removed from the upper region of the trench by means of an etching process. The etching parameters of the etching process are selected in such a way that the seed layer and/or the nanocrystallites which are uncovered in the upper region and the lower region are removed only from the upper region. Consequently, an expensive mask layer can be avoided in the lower region of the trench.
    Type: Grant
    Filed: September 24, 2002
    Date of Patent: September 6, 2005
    Assignee: Infineon Technologies AG
    Inventors: Jörn Lützen, Barbara Schmidt, Stefan Rongen, Martin Schrems, Daniel Köhler
  • Patent number: 6828191
    Abstract: A trench capacitor, in particular for use in a semiconductor memory cell, has a trench formed in a substrate; an insulation collar formed in an upper region of the trench; an optional buried plate in the substrate region serving as a first capacitor plate; a dielectric layer lining the lower region of the trench and the insulation collar as a capacitor dielectric; a conductive second filling material filled into the trench as a second capacitor plate; and a buried contact underneath the surface of the substrate. The substrate has, underneath its surface in the region of the buried contact, a doped region introduced by implantation, plasma doping and/or vapor phase deposition. A tunnel layer, in particular an oxide, nitride or oxinitride layer, is preferably formed at the interface of the buried contact. A method for producing a trench capacitor is also provided.
    Type: Grant
    Filed: July 28, 1999
    Date of Patent: December 7, 2004
    Assignee: Siemens Aktiengesellschaft
    Inventors: Kai Wurster, Martin Schrems, Jürgen Faul, Klaus-Dieter Morhard, Alexandra Lamprecht, Odile Dequiedt
  • Patent number: 6828192
    Abstract: A trench capacitor is formed in a trench, which is disposed in a substrate. The trench is filled with a conductive trench filling which functions as an inner capacitor electrode. An epitaxial layer is grown on the sidewall of the trench on the substrate. A buried strap is disposed between the conductive trench filling with the second intermediate layer and the epitaxially grown layer. A dopant outdiffusion formed from the buried strap is disposed in the epitaxially grown layer. Through the epitaxially grown layer, the dopant outdiffusion is further removed from a selection transistor disposed beside the trench, as a result of which it is possible to avoid short-channel effects in the selection transistor.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: December 7, 2004
    Assignee: Infineon Technologies AG
    Inventors: Wolfgang Gustin, Ulrike Grüning-Von Schwerin, Dietmar Temmler, Martin Schrems, Stefan Rongen, Rudolf Strasser
  • Patent number: 6777303
    Abstract: A trench capacitor is formed with an insulation collar. After the formation of the trench, firstly an insulating layer is deposited, from which layer the insulation collar will be subsequently formed. Afterward, the trench is partly filled with a sacrificial filling material and a thin patterning layer is deposited thereon. Spacers are formed from that layer and cover the insulating layer in the upper region of the trench. Afterward, the sacrificial filling material and the insulating layer are completely removed in the lower region of the trench. As a result, the insulation collar is produced in the upper region of the trench.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: August 17, 2004
    Assignee: Infineon Technologies AG
    Inventors: Martin Schrems, Anke Krasemann, Moritz Haupt, Sabine Steck, Daniel Köhler
  • Publication number: 20040157389
    Abstract: A trench capacitor is formed in a trench, which is disposed in a substrate. The trench is filled with a conductive trench filling which functions as an inner capacitor electrode. An epitaxial layer is grown on the sidewall of the trench on the substrate. A buried strap is disposed between the conductive trench filling with the second intermediate layer and the epitaxially grown layer. A dopant outdiffusion formed from the buried strap is disposed in the epitaxially grown layer. Through the epitaxially grown layer, the dopant outdiffusion is further removed from a selection transistor disposed beside the trench, as a result of which it is possible to avoid short-channel effects in the selection transistor.
    Type: Application
    Filed: September 10, 2003
    Publication date: August 12, 2004
    Inventors: Wolfgang Gustin, Ulrike Gruning Von Schwerin, Dietmar Temmler, Martin Schrems, Stefan Rongen, Rudolf Strasser
  • Patent number: 6750111
    Abstract: A trench capacitor has an insulation collar that is formed non-conformally in the upper region of a trench in such a way that a layer thickness in an upper section of the insulation collar is greater than a layer thickness in a lower section of the insulation collar. This results in a trench capacitor having improved leakage current properties. A simplified and cost-effective method of fabricating a trench capacitor is also provided.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: June 15, 2004
    Assignee: Infineon Technologies AG
    Inventor: Martin Schrems
  • Patent number: 6750096
    Abstract: A method for forming a trench with a buried plate includes the steps of forming a trench in a substrate, depositing a non-doped silicate oxide in the trench and placing a doped silicate glass filling thereon. A buried trench plate is formed around the lower region of the trench in the substrate.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: June 15, 2004
    Assignee: Infineon Technologies AG
    Inventors: Sabine Steck, Martin Schrems