Patents by Inventor Masahiro Sakurada
Masahiro Sakurada has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7258744Abstract: The present invention discloses a graphite heater for producing a single crystal used when producing a single crystal by the Czochralski method which comprises at least a terminal part to which electric current is supplied and a cylindrical heat generating part by resistance heating and are provided so as to surround a crucible for containing a raw material melt wherein the heat generating part has heat generating slit parts formed by being provided with upper slits extending downward from the upper end and lower slits extending upwards from the lower end by turns, and a length of at least one slit of the upper slits differs from others and/or a length of at least one slit of the lower slits differs from others so that a heat generating distribution of the heat generating part may be changed.Type: GrantFiled: December 8, 2003Date of Patent: August 21, 2007Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masahiro Sakurada, Izumi Fusegawa, Satoshi Soeta, Makoto Iida
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Patent number: 7226507Abstract: The present invention is a method for producing a single crystal of which a whole plane in a radial direction is a defect-free region with pulling the single crystal from a raw material melt in a chamber by Czochralski method, wherein a pulling condition is changed in a direction of the crystal growth axis during pulling the single crystal so that a margin of a pulling rate is always a predetermined value or more that the single crystal of which the whole plane in a radial direction is a defect-free region can be pulled. Thereby, there can be provided a method for producing a single crystal in which when a single crystal is produced by CZ method, the single crystal of which a whole plane in a radial direction is a defect-free region entirely in a direction of the crystal growth axis can be produced with stability.Type: GrantFiled: May 27, 2004Date of Patent: June 5, 2007Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Nobuaki Mitamura, Tomohiko Ohta, Izumi Fusegawa, Masahiro Sakurada, Atsushi Ozaki
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Patent number: 7214268Abstract: The present invention is a method of producing a P(phosphorus)-doped silicon single crystal by Czochralski method, wherein, at least, a growth of the single crystal is performed so that an Al (aluminum) concentration is 2×1012 atoms/cc or more. Thereby, there can be provided a method of easily and inexpensively producing a P(phosphorus)-doped silicon single crystal of defect-free region having an excellent capability of electrical characteristics to be high breakdown voltage, which contains neither, for example, V region, OSF region, nor large dislocation cluster (LSEPD, LFPD) region.Type: GrantFiled: December 25, 2003Date of Patent: May 8, 2007Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masahiro Sakurada, Izumi Fusegawa
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Publication number: 20070017433Abstract: The present invention is a method for producing a single crystal with pulling the single crystal from a raw material melt in a chamber by CZ method, wherein when growing the single crystal, where a pulling rate is defined as V and a temperature gradient of the crystal is defined as G during growing the single crystal, the temperature gradient G of the crystal is controlled by changing at least two or more of pulling conditions including a diameter of the straight body of the single crystal, a rotation rate of the single crystal during pulling the single crystal, a flow rate of an inert-gas introduced into the chamber, a position of a heater heating the raw material melt and a distance between the melt surface of the raw material melt and a heat insulating member provided in the chamber so as to oppose to the surface of the raw material melt, thereby V/G which is a ratio of the pulling rate V and the temperature gradient G of the crystal is controlled so that a single crystal including a desired defect regionType: ApplicationFiled: May 28, 2004Publication date: January 25, 2007Applicant: Shin-Etsu Handotai Co., Ltd.Inventors: Masahiro Sakurada, Makoto Iida, Nobuaki Mitamura, Atsushi Ozaki
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Patent number: 7129123Abstract: In a method for producing an SOI wafer comprising steps of implanting ions from a bond wafer surface to form an ion-implanted layer inside the wafer, bonding the ion-implanted bond wafer surface and a surface of a base wafer via an oxide film or directly, and forming an SOI wafer by delaminating by heat treatment a part of the bond wafer at the ion-implanted layer, the bond wafer is a silicon wafer that consists of a silicon single crystal grown by Czochralski method, that is occupied by N region outside OSF generated in a ring shape and that has no defect region detected by Cu deposition method. Thereby, even an extremely thin SOI layer having a thickness of 200 nm or less, can provide an SOI wafer that has an excellent electric property without micro pits caused by acid cleaning, and can be produced without increasing the number of processes.Type: GrantFiled: October 24, 2003Date of Patent: October 31, 2006Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masahiro Sakurada, Nobuaki Mitamura, Izumi Fusegawa, Tomohiko Ohta
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Publication number: 20060174819Abstract: The present invention is a method for producing a single crystal of which a whole plane in a radial direction is a defect-free region with pulling the single crystal from a raw material melt in a chamber by Czochralski method, wherein a pulling condition is changed in a direction of the crystal growth axis during pulling the single crystal so that a margin of a pulling rate is always a predetermined value or more that the single crystal of which the whole plane in a radial direction is a defect-free region can be pulled. Thereby, there can be provided a method for producing a single crystal in which when a single crystal is produced by CZ method, the single crystal of which a whole plane in a radial direction is a defect-free region entirely in a direction of the crystal growth axis can be produced with stability.Type: ApplicationFiled: May 27, 2004Publication date: August 10, 2006Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Nobuaki Mitamura, Tomohiko Ohta, Izumi Fusegawa, Masahiro Sakurada, Atsushi Ozaki
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Publication number: 20060130740Abstract: The present invention is a method for producing a single crystal with pulling the single crystal from a raw material melt by CZ method, wherein when growing the single crystal, where a pulling rate is defined as V, a temperature gradient of the crystal at a central portion of the crystal is defined as Gc, and a temperature gradient of the crystal at a peripheral portion of the crystal is defined as Ge, the temperature gradient Gc at the central portion of the crystal and the temperature gradient Ge at the peripheral portion of the crystal are controlled by changing a distance between the melt surface of the raw material melt and a heat insulating member provided so as to oppose to the surface of the raw material melt, thereby difference ?G between the temperature gradient Gc at the central portion of the crystal and the temperature gradient Ge at the peripheral portion of the crystal is 0.5° C.Type: ApplicationFiled: May 28, 2004Publication date: June 22, 2006Inventor: Masahiro Sakurada
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Publication number: 20060113594Abstract: An SOI wafer in which a base wafer and a bond wafer respectively consisting of silicon single crystal are bonded via an oxide film, and then the bond wafer is thinned to form a silicon active layer, wherein the base wafer is formed of silicon single crystal grown by Czochralski method, and the whole surface of the base wafer is within N region outside OSF region and doesn't include a defect region detected by Cu deposition method, or the whole surface of the base wafer is within a region outside OSF region, doesn't include a defect region detected by Cu deposition method, and includes I region containing dislocation cluster due to interstitial silicon. Thereby, there is provided an SOI wafer that retains high insulating properties and has an excellent electrical reliability in device fabrication even in the case of forming an extremely thin interlevel dielectric oxide film with, for example, a thickness of 100 nm or less.Type: ApplicationFiled: January 22, 2004Publication date: June 1, 2006Applicant: SHIN-ETSU HANDOTAI CO., LTD.Inventors: Masahiro Sakurada, Nobuaki Mitamura, Izumi Fusegawa
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Publication number: 20060086313Abstract: The present invention is an SOI wafer in which at least a silicon active layer is formed over a support substrate via an insulator film or on a support substrate directly, wherein, at least, the silicon active layer consists of a P(phosphorus)-doped silicon single crystal grown by Czochralski method, which is occupied by N region and/or defect-free I region, and contains Al (aluminum) with concentration of 2×1012 atoms/cc or more. There can be provided with ease and at low cost an SOI wafer with high electrical reliability in a device fabrication process, that has an excellent electric property without generation of micro pits by cleaning with hydrofluoric acid etc. even in the case of forming an extremely thin silicon active layer, or that retains high insulation property even in the case of forming an extremely thin inter-layer insulator film.Type: ApplicationFiled: March 12, 2004Publication date: April 27, 2006Applicant: SHIN-ETSU HANDOTAI CO LTDInventor: Masahiro Sakurada
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Publication number: 20060075957Abstract: The present invention provides an annealed wafer which has a wafer surface layer serving as a device fabricating region and having an excellent oxide film dielectric breakdown characteristic, and a wafer bulk layer in which oxide precipitates are present at a high density at the stage before the wafer is loaded into the device fabrication processes to give an excellent IG capability, and a method for manufacturing the annealed wafer. The present invention is directed to an annealed wafer obtained by performing heat treatment on a silicon wafer manufactured from a silicon single crystal grown by the Czochralski method, wherein a good chip yield of an oxide film dielectric breakdown characteristic in a region having at least a depth of up to 5 ?m from a wafer surface is 95% or more, and a density of oxide precipitates detectable in the wafer bulk and each having a size not smaller than a size showing a gettering capability is not less than 1×109/cm3.Type: ApplicationFiled: September 29, 2003Publication date: April 13, 2006Inventors: Hiroshi Takeno, Masahiro Sakurada, Takeshi Kobayashi
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Process for producing p doped silicon single crystal and p doped n type silicon single crystal wafer
Publication number: 20060065184Abstract: The present invention is a method of producing a P(phosphorus)-doped silicon single crystal by Czochralski method, wherein, at least, a growth of the single crystal is performed so that an Al (aluminum) concentration is 2×1012 atoms/cc or more. Thereby, there can be provided a method of easily and inexpensively producing a P(phosphorus)-doped silicon single crystal of defect-free region having an excellent capability of electrical characteristics to be high breakdown voltage, which contains neither, for example, V region, OSF region, nor large dislocation cluster (LSEPD, LFPD) region.Type: ApplicationFiled: December 25, 2003Publication date: March 30, 2006Inventors: Masahiro Sakurada, Izumi Fusegawa -
Publication number: 20050252441Abstract: In a method for producing a silicon single crystal by Czochralski method, the single crystal is grown with controlling a growth rate between a growth rate at a boundary where a defect region detected by Cu deposition remaining after disappearance of OSF ring disappears when gradually decreasing a growth rate of silicon single crystal during pulling and a growth rate at a boundary where a high oxygen precipitation Nv region having a density of BMDs of 1×107 numbers/cm3 or more and/or a wafer lifetime of 30 ?sec or less after oxygen precipitation treatment disappears when gradually decreasing the growth rate further. Thereby, there is provided a silicon single crystal which does not belong to any of V region rich in vacancy, OSF region and I region rich in interstitial silicon, and has excellent electrical characteristics and gettering capability, so that yield of devices can be surely improved, and also an epitaxial wafer.Type: ApplicationFiled: May 7, 2003Publication date: November 17, 2005Inventors: Masahiro Sakurada, Nobuaki Mitamura, Izumi Fusegawa, Tomohiko Ohta
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Publication number: 20050205004Abstract: The present invention discloses a graphite heater for producing a single crystal used when producing a single crystal by the Czochralski method which comprises at least a terminal part to which electric current is supplied and a cylindrical heat generating part by resistance heating and are provided so as to surround a crucible for containing a raw material melt wherein the heat generating part has heat generating slit parts formed by being provided with upper slits extending downward from the upper end and lower slits extending upwards from the lower end by turns, and a length of at least one slit of the upper slits differs from others and/or a length of at least one slit of the lower slits differs from others so that a heat generating distribution of the heat generating part may be changed.Type: ApplicationFiled: December 8, 2003Publication date: September 22, 2005Inventors: Masahiro Sakurada, Izumi Fusegawa, Satoshi Soeta, Makoto Iida
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Patent number: 6913646Abstract: There can be provided a silicon single crystal wafer grown according to Czochralski method wherein the whole plane of the wafer is occupied by N region on the outside of OSF generated in a shape of a ring by thermal oxidation treatment and there exists no defect region detected by Cu deposition. Thereby, there can be produced a silicon single crystal wafer according to CZ method, which does not belong to any of V region rich in vacancies, OSF region and I region rich in interstitial silicons, and can surely improve electric characteristics such as oxide dielectric breakdown voltage characteristics or the like under stable manufacture conditions.Type: GrantFiled: December 26, 2001Date of Patent: July 5, 2005Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masahiro Sakurada, Takeshi Kobayashi, Tatsuo Mori, Izumi Fusegawa, Tomohiko Ohta
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Patent number: 6893499Abstract: According to the present invention, there is disclosed a silicon single crystal wafer grown according to the CZ method which is a wafer having a diameter of 200 mm or more produced from a single crystal grown at a growth rate of 0.5 mm/min or more without doping except for a dopant for controlling resistance, wherein neither an octahedral void defect due to vacancies nor a dislocation cluster due to interstitial silicons exists as a grown-in defect, and a method for producing it.Type: GrantFiled: June 28, 2001Date of Patent: May 17, 2005Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Izumi Fusegawa, Koji Kitagawa, Ryoji Hoshi, Masahiro Sakurada, Tomohiko Ohta
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Publication number: 20050064632Abstract: In a method for producing an SOI wafer comprising steps of implanting hydrogen ions etc. from a surface of a bond wafer 21 to form an ion-implanted layer 24 inside the wafer, bonding the ion-implanted surface of the bond wafer and a surface of a base wafer 22 via an oxide film 23 or directly, and forming an SOI wafer by delaminating a part of the bond wafer at the ion-implanted layer by heat treatment, wherein a silicon wafer consisting of silicon single crystal grown by Chochralski method, which is occupied by N region outside OSF generated in a ring shape and has no defect region detected by Cu deposition method, is used as the bond wafer. Thereby, even in the case of forming an extremely thin SOI layer 27 such that, for example, its thickness is 200 nm or less, there is provided an SOI wafer which has an excellent electric property without causing micro pits by cleaning with hydrofluoric acid etc., and in addition, can be produced without increasing the number of process.Type: ApplicationFiled: October 24, 2003Publication date: March 24, 2005Inventors: Masahiro Sakurada, Nobuaki Mitamura, Izumi Fusegawa, Tomohiko Ohta
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Publication number: 20030116082Abstract: There can be provided a silicon single crystal wafer grown according to Czochralski method wherein the whole plane of the wafer is occupied by N region on the outside of OSF generated in a shape of a ring by thermal oxidation treatment and there exists no defect region detected by Cu deposition. Thereby, there can be produced a silicon single crystal wafer according to CZ method, which does not belong to any of V region rich in vacancies, OSF region and I region rich in interstitial silicons, and can surely improve electric characteristics such as oxide dielectric breakdown voltage characteristics or the like under stable manufacture conditions.Type: ApplicationFiled: August 27, 2002Publication date: June 26, 2003Inventors: Masahiro Sakurada, Takeshi Kobayashi, Tatsuo Mori, Izumi Fusegawa, Tomohiko Ohta
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Publication number: 20030106484Abstract: According to the present invention, there is disclosed a silicon single crystal wafer grown according to the CZ method which is a wafer having a diameter of 200 mm or more produced from a single crystal grown at a growth rate of 0.5 mm/min or more without doping except for a dopant for controlling resistance, wherein neither an octahedral void defect due to vacancies nor a dislocation cluster due to interstitial silicons exists as a grown-in defect, and a method for producing it.Type: ApplicationFiled: December 26, 2002Publication date: June 12, 2003Inventors: Izumi Fusegawa, Koji Kitagawa, Ryoji Hoshi, Masahiro Sakurada, Tomohiko Ohta
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Patent number: 6565822Abstract: An epitaxial silicon wafer, which has no projections having a size of 100 nm or more and a height of 5 nm or more on an epitaxial layer, and a method for producing an epitaxial silicon wafer, wherein a single crystal ingot containing no I-region is grown when a silicon single crystal is grown by the CZ method, and an epitaxial layer is deposited on a silicon wafer sliced from the single crystal ingot and containing no I-region for the entire surface. An epitaxial wafer of high quality with no projection-like surface distortion observed as particles on an epi-layer surface is provided by forming a wafer having no I-region for the entire surface from a single crystal and depositing an epitaxial layer thereon, and a single crystal having no I-region for entire plane is produced with good yield and high productivity, thereby improving productivity of epi-wafers and realizing cost reduction.Type: GrantFiled: September 21, 2000Date of Patent: May 20, 2003Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Ryoji Hoshi, Susumu Sonokawa, Masahiro Sakurada, Tomohiko Ohta, Izumi Fusegawa
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Patent number: 6482260Abstract: There is disclosed a method for producing a silicon single crystal in accordance with the Czochralski method wherein a crystal is pulled with controlling a temperature in a furnace so that &Dgr;G may be 0 or a negative value, where &Dgr;G is a difference between the temperature gradient Gc (°C./mm) at the center of a crystal and the temperature gradient Ge (°C./mm) at the circumferential portion of the crystal, namely &Dgr;G=(Ge−Gc), wherein G is a temperature gradient in the vicinity of a solid-liquid interface of a crystal from the melting point of silicon to 1400° C.Type: GrantFiled: November 30, 2000Date of Patent: November 19, 2002Assignee: Shin-Etsu Handotai Co., Ltd.Inventors: Masahiro Sakurada, Hideki Yamanaka, Tomohiko Ohta