Patents by Inventor Masanao Yamamoto

Masanao Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240076927
    Abstract: A window regulator includes: a base assembled to a vehicle; a bracket configured to support window glass; an arm member having one end side rotatably supported by the base and the other end side rotatably supported by the bracket; and a driving member configured to drive, by rotationally driving the arm member, the bracket configured to support the window glass. At least one of a rotation center axis on the one end side of the arm member and a rotation center axis on the other end side of the arm member is inclined in a vehicle front-rear direction with respect to a vehicle width direction when viewed from a vehicle upper-lower direction.
    Type: Application
    Filed: July 11, 2023
    Publication date: March 7, 2024
    Applicant: AISIN CORPORATION
    Inventors: Kenji YAMAMOTO, Masanao BABA, Satoshi ISAZAWA
  • Patent number: 10310339
    Abstract: In a wall electrode liquid crystal display device, planar distribution of the wall structure and the electrode is optimized to improve a yield. A liquid crystal display device includes a plurality of pixels arranged in a matrix, each of the pixels having an insulator wall structure formed at a border of pixels, a wall electrode formed at a side surface of the wall structure of the border of the pixels, a source electrode which is continuous with the wall electrode and formed of a planar electrode extending in a planar direction, a first common electrode provided between source electrodes at both sides of the pixel to form a retentive capacitance, and a second common electrode provided between wall electrodes on both sides of the pixel. A slit which becomes a border of the wall electrodes of two adjacent pixels is disposed only on a top of the wall structure.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: June 4, 2019
    Assignee: Japan Display Inc.
    Inventors: Osamu Itou, Takato Hiratsuka, Masanao Yamamoto, Toshimasa Ishigaki, Daisuke Sonoda
  • Patent number: 9606389
    Abstract: The present invention provides a liquid crystal display device including: plural pixels disposed in a matrix shape, each pixel having insulating wall-shaped structures at the boundaries of the pixels and a small wall-shaped structure between the wall-shaped structures; wall electrodes, each having wall-shaped electrodes formed on the side faces of the wall-shaped structures, and planar electrodes that are connected to the wall-shaped electrodes and extend in the planar direction; electrodes, each having a TFT-side electrode covering the small wall-shaped structure and a storage capacitor electrode that is connected to the TFT-side electrode and extends in the planar direction of the substrate; and interlayer insulating films formed between the storage capacitor electrodes and the planar electrodes. And the interlayer insulating films of inorganic films are not formed on the upper and side faces and at the base portions of the wall-shaped structures at the boundaries of the pixels.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 28, 2017
    Assignee: Japan Display Inc.
    Inventors: Takato Hiratsuka, Osamu Itou, Masanao Yamamoto, Daisuke Sonoda, Toshimasa Ishigaki
  • Publication number: 20160291428
    Abstract: In a wall electrode liquid crystal display device, planar distribution of the wall structure and the electrode is optimized to improve a yield. A liquid crystal display device includes a plurality of pixels arranged in a matrix, each of the pixels having an insulator wall structure formed at a border of pixels, a wall electrode formed at a side surface of the wall structure of the border of the pixels, a source electrode which is continuous with the wall electrode and formed of a planar electrode extending in a planar direction, a first common electrode provided between source electrodes at both sides of the pixel to form a retentive capacitance, and a second common electrode provided between wall electrodes on both sides of the pixel. A slit which becomes a border of the wall electrodes of two adjacent pixels is disposed only on a top of the wall structure.
    Type: Application
    Filed: May 18, 2016
    Publication date: October 6, 2016
    Inventors: Osamu ITOU, Takato HIRATSUKA, Masanao YAMAMOTO, Toshimasa ISHIGAKI, Daisuke SONODA
  • Patent number: 9366919
    Abstract: In a wall electrode liquid crystal display device, planar distribution of the wall structure and the electrode is optimized to improve a yield. A liquid crystal display device includes a plurality of pixels arranged in a matrix, each of the pixels having an insulator wall structure formed at a border of pixels, a wall electrode formed at a side surface of the wall structure of the border of the pixels, a source electrode which is continuous with the wall electrode and formed of a planar electrode extending in a planar direction, a first common electrode provided between source electrodes at both sides of the pixel to form a retentive capacitance, and a second common electrode provided between wall electrodes on both sides of the pixel. A slit which becomes a border of the wall electrodes of two adjacent pixels is disposed only on a top of the wall structure.
    Type: Grant
    Filed: January 11, 2013
    Date of Patent: June 14, 2016
    Assignee: Japan Display Inc.
    Inventors: Osamu Itou, Takato Hiratsuka, Masanao Yamamoto, Toshimasa Ishigaki, Daisuke Sonoda
  • Patent number: 9304362
    Abstract: In a liquid crystal display device including: TFT substrate; color filter; counter electrode; interlayer insulation film; pixel electrode; alignment film; liquid crystal layer; counter substrate; and Si semiconductor layer. The color filter, counter electrode, interlayer insulation film, pixel electrode, and alignment film being formed on the side where the TFT substrate is provided, the counter substrate being disposed in facing relation to the TFT substrate with the liquid crystal layer put between the counter substrate and TFT substrate, the Si semiconductor layer is formed between the pixel electrode and interlayer insulation film. Even when light from a backlight is absorbed by the color filter and sufficient light cannot reach the alignment film, electric charges accumulated on the alignment film can escape to the pixel electrode in an early stage by the Si semiconductor layer formed under the alignment film, thereby capable of erasing the afterimage in an early stage.
    Type: Grant
    Filed: August 12, 2013
    Date of Patent: April 5, 2016
    Assignee: Japan Display Inc.
    Inventors: Chikae Matsui, Masanao Yamamoto, Noboru Kunimatsu, Hidehiro Sonoda
  • Patent number: 9229285
    Abstract: Provided is a method of manufacturing a display device that includes a structure formed so as to protrude at least in a normal direction of a first substrate, and an electrode formed in a side wall surface of the structure, the method including: forming a transparent conductive film for the electrode; forming a low-affinity material having a low affinity for a resist film on an upper surface of the transparent conductive film formed in a head surface of the structure; forming a resist film by applying a liquid resist material to an upper layer of the transparent conductive film and then fixing the resist material; forming an opening that exposes the transparent conductive film in the resist film by removing the low-affinity material; etching the transparent conductive film which is a lower layer using the resist film as a protective film; and removing the resist film.
    Type: Grant
    Filed: March 27, 2013
    Date of Patent: January 5, 2016
    Assignee: JAPAN DISPLAY INC.
    Inventors: Masanao Yamamoto, Daisuke Sonoda, Osamu Itou, Takato Hiratsuka
  • Patent number: 9035310
    Abstract: The invention prevents disconnection of data lines that traverse two-layered gate lines via an insulating film. Data lines 20 override and thereby traverse gate lines 10 with an insulating film deposited therebetween. The gate lines 10 each have a two-layered structure including a lower AlCu layer 11 and an upper MoCr layer 12. When the thickness ratio of the upper layer 12 to the lower layer 11 is in the range of 0.4 to 1.0, it is possible to prevent a decrease in the etch speed of the upper layer 12 near the side edges of the gate line 10, which occurs due to galvanization. As a result, the upper layer 12 is prevented from having an overhang. The absence of overhangs on the gate lines 10 prevents the data lines 20 from being disconnected at the intersections of the gate lines 10 and the data lines 20.
    Type: Grant
    Filed: October 2, 2012
    Date of Patent: May 19, 2015
    Assignee: JAPAN DISPLAY INC.
    Inventors: Yoshinori Ishii, Daisuke Sonoda, Masanao Yamamoto
  • Patent number: 8928847
    Abstract: The liquid crystal display device includes a pixel structure provided with a large wall formed along a long side of a pixel with a rectangular plane, a small wall formed at a center of the pixel and extending in the same direction as the large wall, a wall electrode formed on a wall surface of the large wall, a plane electrode formed between the small and large walls, in which the wall electrode and the plane electrode form a pixel electrode, and a common electrode formed on a surface of the small wall. The large wall has a part with an increased thickness at an end part of the pixel. The wall electrode is bent toward the center of the pixel. This structure prevents decrease of reverse twist of liquid crystal at an end part of the pixel as well as generation of domain, thus improving transmittance of the screen.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: January 6, 2015
    Assignee: Japan Display Inc.
    Inventors: Takato Hiratsuka, Osamu Itou, Masanao Yamamoto, Daisuke Sonoda
  • Patent number: 8673545
    Abstract: In a method of manufacturing a liquid crystal display device in which a plurality of pixels are arranged in a matrix, each of the pixels has an insulator wall structure at a boundary of the pixels, and a wall electrode is provided at least at a side of the wall structure, the wall structure being formed by: using a chemically amplified resist as a material of the wall structure, a step of applying the chemically amplified resist; a step of exposing and developing the chemically amplified resist; a step of irradiating light on an entire surface to perform post exposure; a step of pre-calcinating the chemically amplified resist at a temperature lower than a main calcination temperature; and a step of performing main calcination at a temperature higher than a pre-calcination temperature.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 18, 2014
    Assignee: Japan Display East Inc.
    Inventors: Toshimasa Ishigaki, Daisuke Sonoda, Masanao Yamamoto, Osamu Itou, Takato Hiratsuka
  • Publication number: 20140055701
    Abstract: In a liquid crystal display device including: TFT substrate; color filter; counter electrode; interlayer insulation film; pixel electrode; alignment film; liquid crystal layer; counter substrate; and Si semiconductor layer. The color filter, counter electrode, interlayer insulation film, pixel electrode, and alignment film being formed on the side where the TFT substrate is provided, the counter substrate being disposed in facing relation to the TFT substrate with the liquid crystal layer put between the counter substrate and TFT substrate, the Si semiconductor layer is formed between the pixel electrode and interlayer insulation film. Even when light from a backlight is absorbed by the color filter and sufficient light cannot reach the alignment film, electric charges accumulated on the alignment film can escape to the pixel electrode in an early stage by the Si semiconductor layer formed under the alignment film, thereby capable of erasing the afterimage in an early stage.
    Type: Application
    Filed: August 12, 2013
    Publication date: February 27, 2014
    Applicant: Japan Display Inc.
    Inventors: Chikae MATSUI, Masanao YAMAMOTO, Noboru KUNIMATSU, Hidehiro SONODA
  • Publication number: 20130323997
    Abstract: Provided is a method of manufacturing a display device that includes a structure formed so as to protrude at least in a normal direction of a first substrate, and an electrode formed in a side wall surface of the structure, the method including: forming a transparent conductive film for the electrode; forming a low-affinity material having a low affinity for a resist film on an upper surface of the transparent conductive film formed in a head surface of the structure; forming a resist film by applying a liquid resist material to an upper layer of the transparent conductive film and then fixing the resist material; forming an opening that exposes the transparent conductive film in the resist film by removing the low-affinity material; etching the transparent conductive film which is a lower layer using the resist film as a protective film; and removing the resist film.
    Type: Application
    Filed: March 27, 2013
    Publication date: December 5, 2013
    Applicant: Japan Display East Inc.
    Inventors: Masanao YAMAMOTO, Daisuke SONODA, Osamu ITOU, Takato HIRATSUKA
  • Publication number: 20130280661
    Abstract: In a method of manufacturing a liquid crystal display device in which a plurality of pixels are arranged in a matrix, each of the pixels has an insulator wall structure at a boundary of the pixels, and a wall electrode is provided at least at a side of the wall structure, the wall structure being formed by: using a chemically amplified resist as a material of the wall structure, a step of applying the chemically amplified resist; a step of exposing and developing the chemically amplified resist; a step of irradiating light on an entire surface to perform post exposure; a step of pre-calcinating the chemically amplified resist at a temperature lower than a main calcination temperature; and a step of performing main calcination at a temperature higher than a pre-calcination temperature.
    Type: Application
    Filed: March 15, 2013
    Publication date: October 24, 2013
    Applicant: JAPAN DISPLAY EAST INC.
    Inventors: Toshimasa ISHIGAKI, Daisuke SONODA, Masanao YAMAMOTO, Osamu ITOU, Takato HIRATSUKA
  • Publication number: 20130265534
    Abstract: The liquid crystal display device includes a pixel structure provided with a large wall formed along a long side of a pixel with a rectangular plane, a small wall formed at a center of the pixel and extending in the same direction as the large wall, a wall electrode formed on a wall surface of the large wall, a plane electrode formed between the small and large walls, in which the wall electrode and the plane electrode form a pixel electrode, and a common electrode formed on a surface of the small wall. The large wall has a part with an increased thickness at an end part of the pixel. The wall electrode is bent toward the center of the pixel. This structure prevents decrease of reverse twist of liquid crystal at an end part of the pixel as well as generation of domain, thus improving the transmittance of the screen.
    Type: Application
    Filed: March 8, 2013
    Publication date: October 10, 2013
    Applicant: JAPAN DISPLAY EAST INC.
    Inventors: Takato HIRATSUKA, Osamu ITOU, Masanao YAMAMOTO, Daisuke SONODA
  • Publication number: 20130250199
    Abstract: The present invention provides a liquid crystal display device including: plural pixels disposed in a matrix shape, each pixel having insulating wall-shaped structures at the boundaries of the pixels and a small wall-shaped structure between the wall-shaped structures; wall electrodes, each having wall-shaped electrodes formed on the side faces of the wall-shaped structures, and planar electrodes that are connected to the wall-shaped electrodes and extend in the planar direction; electrodes, each having a TFT-side electrode covering the small wall-shaped structure and a storage capacitor electrode that is connected to the TFT-side electrode and extends in the planar direction of the substrate; and interlayer insulating films formed between the storage capacitor electrodes and the planar electrodes. And the interlayer insulating films of inorganic films are not formed on the upper and side faces and at the base portions of the wall-shaped structures at the boundaries of the pixels.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 26, 2013
    Applicant: JAPAN DISPLAY EAST INC.
    Inventors: Takato HIRATSUKA, Osamu ITOU, Masanao YAMAMOTO, Daisuke SONODA, Toshimasa ISHIGAKI
  • Patent number: 7479451
    Abstract: The present invention prevents the diffusion of an aluminum element into a polysilicon layer in a heating step when an aluminum-based conductive layer is used in a source/drain electrode which is in contact with low-temperature polysilicon whereby the occurrence of defective display can be obviated. An aluminum-based conductive layer is used in a source/drain electrode and a barrier layer made of molybdenum or a molybdenum alloy layer is formed between the aluminum-based conductive layer and a polysilicon layer. Further, a molybdenum oxide nitride film formed by the rapid heat treatment (rapid heat annealing) in a nitrogen atmosphere is formed over a surface of the molybdenum or the molybdenum alloy which constitutes the barrier layer.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: January 20, 2009
    Assignee: Hitachi Displays, Ltd.
    Inventors: Yuichi Harano, Jun Gotoh, Toshiki Kaneko, Masanao Yamamoto
  • Patent number: 7009205
    Abstract: An image display device using transistors each having a polycrystalline semiconductor layer constructed so that drain and source regions are fully activated, and a manufacturing method thereof. The polycrystalline semiconductor layer is so provided that impurity concentrations are easy to control in LDD regions . The image display device further uses transistors having a gate electrode on an upper surface of the semiconductor layer with an insulating film therebetween, a drain region formed on one side of the gate electrode, and a source region formed on another side of the gate electrode. An activated P-type impurity is added to the area underlying the gate electrode, and an activated N-type impurity is added to the area excluding the area underlying the gate electrode.
    Type: Grant
    Filed: January 7, 2003
    Date of Patent: March 7, 2006
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Jun Gotoh, Katsutoshi Saito, Makoto Ohkura, Yukio Takasaki, Masanao Yamamoto
  • Publication number: 20050249525
    Abstract: An endless belt transports a recording medium through image forming sections and transfers toner images from corresponding ones of the image forming sections onto the recording medium. The endless belt has a surface resistivity and a volume resistivity. The surface resistivity and the volume resistivity are related such that 0.3 ?(log ? s?log ? v)?1.3 where ? s is the surface resistivity in ?/? measured after a voltage of substantially 500 V is applied to the endless belt for ten seconds and ? v is the volume resistivity in ?·cm ten after a voltage of substantially 250 V is applied to the endless belt for ten seconds.
    Type: Application
    Filed: July 13, 2005
    Publication date: November 10, 2005
    Inventors: Yuichi Harano, Jun Gotoh, Toshiki Kaneko, Masanao Yamamoto
  • Publication number: 20050250273
    Abstract: The present invention prevents the diffusion of an aluminum element into a polysilicon layer in a heating step when an aluminum-based conductive layer is used in a source/drain electrode which is in contact with low-temperature polysilicon whereby the occurrence of defective display can be obviated. An aluminum-based conductive layer is used in a source/drain electrode and a barrier layer made of molybdenum or a molybdenum alloy layer is formed between the aluminum-based conductive layer and a polysilicon layer. Further, a molybdenum oxide nitride film formed by the rapid heat treatment (rapid heat annealing) in a nitrogen atmosphere is formed over a surface of the molybdenum or the molybdenum alloy which constitutes the barrier layer.
    Type: Application
    Filed: July 14, 2005
    Publication date: November 10, 2005
    Inventors: Yuichi Harano, Jun Gotoh, Toshiki Kaneko, Masanao Yamamoto
  • Patent number: 6933525
    Abstract: The present invention prevents the diffusion of an aluminum element into a polysilicon layer in a heating step when an aluminum-based conductive layer is used in a source/drain electrode which is in contact with low-temperature polysilicon whereby the occurrence of defective display can be obviated. An aluminum-based conductive layer is used in a source/drain electrode and a barrier layer made of molybdenum or a molybdenum alloy layer is formed between the aluminum-based conductive layer and a polysilicon layer. Further, a molybdenum oxide nitride film formed by the rapid heat treatment (rapid heat annealing) in a nitrogen atmosphere is formed over a surface of the molybdenum or the molybdenum alloy which constitutes the barrier layer.
    Type: Grant
    Filed: December 23, 2003
    Date of Patent: August 23, 2005
    Assignee: Hitachi Displays, Ltd.
    Inventors: Yuichi Harano, Jun Gotoh, Toshiki Kaneko, Masanao Yamamoto