Patents by Inventor Masataka Ikeda

Masataka Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10050871
    Abstract: A communication system in which a plurality of communication networks are interconnected, the communication system including a plurality of inter-communication network connections that include an inter-communication network connection by a first circuit performing communication by a first protocol and an inter-communication network connection by a second circuit performing communication by a second protocol, including: a route selection apparatus that is provided in a communication network that is connected to another communication network by the first circuit, and that is connected to another communication network by the second circuit; and an address resolution apparatus that can communicate with the route selection apparatus, wherein the route selection apparatus sends an inquiry to the address resolution apparatus about an address corresponding to an incoming number in a connection request signal transmitted from a user apparatus in the communication network so as to determine whether to transmit the conn
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: August 14, 2018
    Assignee: NTT DOCOMO, INC.
    Inventors: Motohiro Abe, Shinichi Minamimoto, Mana Kaneko, Masataka Ikeda, Hiromasa Yamaguchi
  • Patent number: 10033549
    Abstract: An inter-network connection control device that is used for interconnecting a communication network and another communication network includes a request signal forwarding unit that forwards a connection request signal transmitted from originating user equipment in the communication network to the other communication network, and a response signal processor that receives, from the other communication network, a plurality of response signals with respect to the connection request signal, the plurality of response signals being forked in the other communication network receiving the connection request signal and being forwarded to a plurality of terminating user devices, and that forwards one response signal of the plurality of response signals to the originating user equipment.
    Type: Grant
    Filed: December 24, 2015
    Date of Patent: July 24, 2018
    Assignee: NTT DOCOMO, INC.
    Inventors: Hiromasa Yamaguchi, Subrata Biswas, Akihide Sasabe, Masataka Ikeda
  • Patent number: 9983702
    Abstract: A touch panel capable of performing display and sensing along a curved surface or a touch panel that maintains high detection sensitivity even when it is curved along a curved surface is provided. A flexible display panel is placed along a curved portion included in a surface of a support. A first film layer is attached along a surface of the display panel by a bonding layer. Second to n-th film layers (n is an integer of 2 or more) are sequentially attached along a surface of the first film layer by bonding layers. A flexible touch sensor is attached along a surface of the n-th film layer by a bonding layer.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: May 29, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Daiki Nakamura, Masataka Ikeda
  • Patent number: 9971440
    Abstract: To reduce power consumption. Included are a selection signal output circuit, a reset signal output circuit, and a plurality of photodetector circuits. After the selection signal output circuit outputs part of the selection signals, output of the other selection signals from the selection signal output circuit is stopped. After the reset signal output circuit outputs part of the reset signals, output of the other reset signals from the reset signal output circuit is stopped.
    Type: Grant
    Filed: March 8, 2011
    Date of Patent: May 15, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Hikaru Tamura, Masataka Ikeda
  • Patent number: 9846515
    Abstract: Influence of external light is suppressed. With a photodetector including a photodetector circuit which generates a data signal in accordance with illuminance of incident light and a light unit which overlaps with the photodetector circuit, a first data signal is generated by the photodetector circuit when the light unit is in an ON state, a second data signal is formed by the photodetector circuit when the light unit is in an OFF state, and the first data signal and the second data signal are compared, so that a difference data signal that is data of a difference between the two compared data signals is generated.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: December 19, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Hikaru Tamura, Munehiro Kozuma, Masataka Ikeda
  • Publication number: 20170195850
    Abstract: An inter-network connection control device used in an interconnected network includes a connection request signal forward unit that receives, from a call control device in a specific communication network, a connection request signal addressed to another communication network; an address query unit that queries an address resolution device for an address corresponding to a destination telephone number included in the connection request signal received from the connection request signal forward unit, and that obtains the address from the address resolution device; and a forward instruction unit that instructs the call control device to forward the connection request signal to the address obtained by the address query unit.
    Type: Application
    Filed: December 24, 2015
    Publication date: July 6, 2017
    Applicant: NTT DOCOMO, INC.
    Inventors: Hiromasa Yamaguchi, Subrata Biswas, Akihide Sasabe, Masataka Ikeda
  • Patent number: 9647525
    Abstract: A power supply device includes a first inverter that converts a first direct-current voltage into a first alternating-current voltage and outputs the first alternating-current voltage, and a second inverter that has an output connected in series with an output of the first inverter and converts a second direct-current voltage into a second alternating-current voltage synchronized with the first alternating-current voltage and outputs the second alternating-current voltage.
    Type: Grant
    Filed: March 21, 2013
    Date of Patent: May 9, 2017
    Assignees: Shindengen Electric Manufacturing Co., Ltd., Honda Motor Co., Ltd.
    Inventors: Naoya Imai, Masataka Ikeda, Yasukazu Yamaguchi, Hiroyuki Eguchi, Go Fujikawa
  • Publication number: 20170111263
    Abstract: A communication system in which a plurality of communication networks are interconnected, the communication system including a plurality of inter-communication network connections that include an inter-communication network connection by a first circuit performing communication by a first protocol and an inter-communication network connection by a second circuit performing communication by a second protocol, including: a route selection apparatus that is provided in a communication network that is connected to another communication network by the first circuit, and that is connected to another communication network by the second circuit; and an address resolution apparatus that can communicate with the route selection apparatus, wherein the route selection apparatus sends an inquiry to the address resolution apparatus about an address corresponding to an incoming number in a connection request signal transmitted from a user apparatus in the communication network so as to determine whether to transmit the conn
    Type: Application
    Filed: August 26, 2015
    Publication date: April 20, 2017
    Applicant: NTT DOCOMO, INC.
    Inventors: Motohiro Abe, Shinichi Minamimoto, Mana Kaneko, Masataka Ikeda, Hiromasa Yamaguchi
  • Publication number: 20170111185
    Abstract: A communication system in which a plurality of communication networks are interconnected, the communication system including a plurality of inter-communication network connections that include an inter-communication network connection by a first circuit performing communication by a first protocol and an inter-communication network connection by a second circuit performing communication by a second protocol, including: a route selection apparatus that is provided in a communication network that is connected to another communication network by the first circuit, and that is connected to another communication network by the second circuit; and a connection determination apparatus that is provided in a first circuit connection network that is the other communication network connected with the communication network by the first circuit, wherein, when the route selection apparatus receives a connection request signal transmitted from a user apparatus in the communication network, the route selection apparatus tran
    Type: Application
    Filed: August 26, 2015
    Publication date: April 20, 2017
    Applicant: NTT DOCOMO, INC.
    Inventors: Hiromasa Yamaguchi, Shinichi Minamimoto, Mana Kaneko, Masataka Ikeda
  • Publication number: 20170033948
    Abstract: An inter-network connection control device that is used for interconnecting a communication network and another communication network includes a request signal forwarding unit that forwards a connection request signal transmitted from originating user equipment in the communication network to the other communication network, and a response signal processor that receives, from the other communication network, a plurality of response signals with respect to the connection request signal, the plurality of response signals being forked in the other communication network receiving the connection request signal and being forwarded to a plurality of terminating user devices, and that forwards one response signal of the plurality of response signals to the originating user equipment.
    Type: Application
    Filed: December 24, 2015
    Publication date: February 2, 2017
    Applicant: NTT DOCOMO, INC.
    Inventors: Hiromasa Yamaguchi, Subrata Biswas, Akihide Sasabe, Masataka Ikeda
  • Patent number: 9515107
    Abstract: In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.
    Type: Grant
    Filed: December 31, 2015
    Date of Patent: December 6, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Hikaru Tamura, Munehiro Kozuma, Masataka Ikeda, Takeshi Aoki
  • Publication number: 20160293649
    Abstract: In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.
    Type: Application
    Filed: June 9, 2016
    Publication date: October 6, 2016
    Inventors: Yoshiyuki KUROKAWA, Takayuki IKEDA, Hikaru TAMURA, Munehiro KOZUMA, Masataka IKEDA, Takeshi AOKI
  • Publication number: 20160118426
    Abstract: In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.
    Type: Application
    Filed: December 31, 2015
    Publication date: April 28, 2016
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Hikaru Tamura, Munehiro Kozuma, Masataka Ikeda, Takeshi Aoki
  • Patent number: 9257567
    Abstract: In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: February 9, 2016
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Hikaru Tamura, Munehiro Kozuma, Masataka Ikeda, Takeshi Aoki
  • Publication number: 20160020684
    Abstract: A power supply device includes a first inverter that converts a first direct-current voltage into a first alternating-current voltage and outputs the first alternating-current voltage, and a second inverter that has an output connected in series with an output of the first inverter and converts a second direct-current voltage into a second alternating-current voltage synchronized with the first alternating-current voltage and outputs the second alternating-current voltage.
    Type: Application
    Filed: March 21, 2013
    Publication date: January 21, 2016
    Applicants: Honda Motor Co., Ltd., Shindengen Electric Manufacturing Co., Ltd.
    Inventors: Naoya IMAI, Masataka IKEDA, Yasukazu YAMAGUCHI, Hiroyuki EGUCHI, Go FUJIKAWA
  • Publication number: 20150357476
    Abstract: In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.
    Type: Application
    Filed: August 17, 2015
    Publication date: December 10, 2015
    Inventors: Yoshiyuki KUROKAWA, Takayuki IKEDA, Hikaru TAMURA, Munehiro KOZUMA, Masataka IKEDA, Takeshi AOKI
  • Patent number: 9153619
    Abstract: In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: October 6, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Hikaru Tamura, Munehiro Kozuma, Masataka Ikeda, Takeshi Aoki
  • Publication number: 20150153862
    Abstract: A touch panel capable of performing display and sensing along a curved surface or a touch panel that maintains high detection sensitivity even when it is curved along a curved surface is provided. A flexible display panel is placed along a curved portion included in a surface of a support. A first film layer is attached along a surface of the display panel by a bonding layer. Second to n-th film layers (n is an integer of 2 or more) are sequentially attached along a surface of the first film layer by bonding layers. A flexible touch sensor is attached along a surface of the n-th film layer by a bonding layer.
    Type: Application
    Filed: November 25, 2014
    Publication date: June 4, 2015
    Inventors: Daiki NAKAMURA, Masataka IKEDA
  • Publication number: 20150129944
    Abstract: In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.
    Type: Application
    Filed: January 20, 2015
    Publication date: May 14, 2015
    Inventors: Yoshiyuki KUROKAWA, Takayuki IKEDA, Hikaru TAMURA, Munehiro KOZUMA, Masataka IKEDA, Takeshi AOKI
  • Patent number: 8964085
    Abstract: In a CMOS image sensor in which a plurality of pixels is arranged in a matrix, a transistor in which a channel formation region includes an oxide semiconductor is used for each of a charge accumulation control transistor and a reset transistor which are in a pixel portion. After a reset operation of the signal charge accumulation portion is performed in all the pixels arranged in the matrix, a charge accumulation operation by the photodiode is performed in all the pixels, and a read operation of a signal from the pixel is performed per row. Accordingly, an image can be taken without a distortion.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: February 24, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Takayuki Ikeda, Hikaru Tamura, Munehiro Kozuma, Masataka Ikeda, Takeshi Aoki