Abstract: A pattern drawing apparatus for forming patterns, that have a mirror image relationship to each other with respect to a substrate, on both sides of the substrate forms the patterns on both sides of the substrate by drawing the patterns directly on both sides of the substrate in accordance with prescribed data by using a direct drawing means such as a maskless exposure means or an inkjet patterning means.

Abstract: A stereolithographic shaping method used for manufacturing a shaped article on a shaping table, and a stereolithographic shaping apparatus for implementing this stereolithographic shaping method are disclosed. The stereolithographic shaping method includes the steps of coating a liquid optically-curable resin onto the surface of a shaped article under manufacture, irradiating light onto the optically-curable resin to cure a required portion to form an optically-shaped resin layer, and repeating this process to sequentially laminate optically-shaped resin layers. After the shaping table is supported so as to be able to control a posture position of the shaping table in an optional three-dimensional direction, the optically-curable resin is blown onto a shaped article on the shaping table, thereby to coat the surface of the shaped article with the optically-curable resin in a predetermined film thickness.

Abstract: An object of the present invention is to make it possible to effect a reliable and compact configuration for a semiconductor device when mounting a plurality of semiconductor elements in a single package, and achieve higher integration and higher functionality more effectively. In a multi-layer wiring board 20 in which wiring patterns (conductor layers) 22, 24, and 26, and insulating layers 23, 25, and 27, are formed alternately in multiple layers on a base substrate, and electrically connections are made between the wiring patterns through via holes VH1 and VH2, semiconductor elements 30 are imbedded and mounted inside the insulating layers 23, 25, and 27, and the semiconductor elements 30 are deployed so that they are electrically connected to wiring patterns that are covered by the insulating layers, and so that they are stacked up in a direction perpendicular to the planar dimension of the multi-layer wiring board 20.

Abstract: A non-contact type IC card includes an insulating film having first and second surfaces. A plane coil is arranged on the first surface of the film. A semiconductor element is arranged on the first surface of the film. The film has through holes which expose terminals of the plane coil and electrode terminals of the semiconductor element to the second surface of the film. A wiring pattern consisting of conductive paste is filled in the through holes and extends therebetween along the second surface of the film so that the terminals of the plane coil are electrically connected to the electrode terminals of the semiconductor element by means of the wiring pattern.

Abstract: An apparatus 1 for fabricating a component-embedded board according to the present invention comprises: a detecting unit 11 for detecting, before the board 21 is covered with an insulating layer 23, the actual position of an electronic component 22 formed on the surface of the board 21; a holding unit 12 for calculating a displacement between the design position of the electronic component 22 and the actual position of the electronic component 22 on the surface of the board 21, and for holding the displacement as displacement data; and a correcting unit 13 for correcting, based on the displacement data, design data to be used for processing the board 21 after the board 21 is covered with the insulating layer 23.

Abstract: A wiring forming system comprises: maskless exposure unit which directly exposes an unexposed board by using exposure data generated based on design data relating to an wiring board; post-development inspect unit which tests the board after development, by using the exposure data and the image data of the board exposed and developed by the maskless exposure unit; etching unit which etches the developed board; and post-etching inspect unit which tests an etching pattern formed on the etched board, by using etching inspect data generated based on the design data and the image data of the board etched by the etching unit.

Abstract: An object is to make possible, in a semiconductor device, a compact configuration when mounting semiconductor elements in a package, with which, as necessary, a configuration wherein the semiconductor elements are arranged three-dimensionally and interconnected can be easily effected, thus permitting higher functionality to be achieved. The configuration is effected such that thin semiconductor chips having a thickness of 50 &mgr;m or so are imbedded and mounted inside the package, and such that multi-level stacking is facilitated by providing external connection terminals on both surfaces of the package, or, alternatively, exposing the terminal formation portions of the wiring pattern, to which the external connection terminals are to be connected, out of a solder resist layer.

Abstract: Semiconductor chips having a thickness of 50 &mgr;m or so are imbedded and mounted inside a package, such that multi-level stacking is facilitated by providing external connection terminals on both surfaces of the package, or, alternatively, exposing the terminal formation portions of the wiring pattern, to which the external connection terminals are to be connected, out of a solder resist layer.

Abstract: An optical exposure method and a device are used for forming patterns on a printed board wiring or semiconductor board. A single exposing region of a surface to be exposed is irradiated with a plurality of optical beams having different irradiating areas and different scanning speeds, such as, a peripheral area is irradiated with an optical beam having a smaller irradiating area and an inner area is irradiated with an optical beam having a larger irradiating area.

Abstract: A semiconductor device with an antenna including one or more antenna units for sending and receiving signals and a semiconductor element electrically connected to the antenna units, wherein the antenna units are formed by pressing or etching a thin metal sheet with substantially the same flat surface size as the semiconductor element, and the antenna units are integrally coupled to the surface of the semicondcutor element. The antenna units are formed in a plurality of layers separated by insulating layers, and the antenna units formed on the respective layers are connected electrically in series with each other.

Abstract: A non-contact type IC card comprises a core-sheet (12), made of resin, having first and second surfaces and a hole (14) penetrating from the first surface to the second surface; a plane coil (54) formed on the first surface of the core-sheet, the plane coil having respective terminals (54a, 54b) located at an opening region in the hole; a semiconductor element accommodated (56) in the hole, the semiconductor element having electrodes terminals (58) electrically connected to the respective terminals of the plane coil; and a pair of over-sheets (62), made of resin, for covering the first and second surfaces, respectively, to integrally cover the core-sheet with the plane coil and the semiconductor element.

Abstract: A non-contact type IC card includes an insulating film having first and second surfaces. A plane coil is arranged on the first surface of the film. A semiconductor element is arranged on the first surface of the film. The film has through holes which expose terminals of the plane coil and electrode terminals of the semiconductor element to the second surface of the film. A wiring pattern consisting of conductive paste is filled in the through holes and extends therebetween along the second surface of the film so that the terminals of the plane coil are electrically connected to the electrode terminals of the semiconductor element by means of the wiring pattern.

Abstract: A non-contact type IC card includes an insulating film having first and second surfaces. A plane coil is arranged on the first surface of the film. A semiconductor element is arranged on the first surface of the filmy The film has through holes which expose terminals of the plane coil and electrode terminals of the semiconductor element to the second surface of the film. A wiring pattern consisting of conductive paste is filled in the through holes and extends therebetween along the second surface of the film so that the terminals of the plane coil are electrically connected to the electrode terminals of the semiconductor element by means of the wiring pattern.

Abstract: An object of the present invention is to make it possible to effect a reliable and compact configuration for a semiconductor device when mounting a plurality of semiconductor elements in a single package, and achieve higher integration and higher functionality more effectively. In a multi-layer wiring board 20 in which wiring patterns (conductor layers) 22, 24, and 26, and insulating layers 23, 25, and 27, are formed alternately in multiple layers on a base substrate, and electrically connections are made between the wiring patterns through via holes VH1 and VH2, semiconductor elements 30 are imbedded and mounted inside the insulating layers 23, 25, and 27, and the semiconductor elements 30 are deployed so that they are electrically connected to wiring patterns that are covered by the insulating layers, and so that they are stacked up in a direction perpendicular to the planar dimension of the multi-layer wiring board 20.

Abstract: An IC card, which can be mass-produced at low cost, is composed of a plane coil formed by means of punching or etching.

Abstract: An IC card comprises: a plane coil having respective terminal sections; a semiconductor element arranged at a position not overlapping with the plane coil, the semiconductor element having electrode terminals; means for electrically connecting the respective terminal sections of the plane coil to the electrode terminals of the semiconductor element; and a reinforcing frame arranged on a face substantially the same as that of the semiconductor element so that the semiconductor element is surrounded by the reinforcing frame.

Abstract: A stereolithographic shaping method used for manufacturing a shaped article on a shaping table, and a stereolithographic shaping apparatus for implementing this stereolithographic shaping method are disclosed. The stereolithographic shaping method includes the steps of coating a liquid optically-curable resin onto the surface of a shaped article under manufacture, irradiating light onto the optically-curable resin to cure a required portion to form an optically-shaped resin layer, and repeating this process to sequentially laminate optically-shaped resin layers. After the shaping table is supported so as to be able to control a posture position of the shaping table in an optional three-dimensional direction, the optically-curable resin is blown onto a shaped article on the shaping table, thereby to coat the surface of the shaped article with the optically-curable resin in a predetermined film thickness.

Abstract: A non-contact type IC card comprises a core-sheet (12), made of resin, having first and second surfaces and a hole (14) penetrating from the first surface to the second surface; a plane coil (54) formed on the first surface of the core-sheet, the plane coil having respective terminals (54a, 54b) located at an opening region in the hole; a semiconductor element accommodated (56) in the hole, the semiconductor element having electrodes terminals (58) electrically connected to the respective terminals of the plane coil; and a pair of over-sheets (62), made of resin, for covering the first and second surfaces, respectively, to integrally cover the core-sheet with the plane coil and the semiconductor element.

Abstract: An object is to make possible, in a semiconductor device, a compact configuration when mounting semiconductor elements in a package, with which, as necessary, a configuration wherein the semiconductor elements are arranged three-dimensionally and interconnected can be easily effected, thus permitting higher functionality to be achieved. The configuration is effected such that thin semiconductor chips having a thickness of 50 &mgr;m or so are imbedded and mounted inside the package, and such that multi-level stacking is facilitated by providing external connection terminals on both surfaces of the package, or, alternatively, exposing the terminal formation portions of the wiring pattern, to which the external connection terminals are to be connected, out of a solder resist layer.

Abstract: An object of the present invention is to make it possible to effect a reliable and compact configuration for a semiconductor device when mounting a plurality of semiconductor elements in a single package, and achieve higher integration and higher functionality more effectively. In a multi-layer wiring board 20 in which wiring patterns (conductor layers) 22, 24, and 26, and insulating layers 23, 25, and 27, are formed alternately in multiple layers on a base substrate, and electrically connections are made between the wiring patterns through via holes VH1 and VH2, semiconductor elements 30 are imbedded and mounted inside the insulating layers 23, 25, and 27, and the semiconductor elements 30 are deployed so that they are electrically connected to wiring patterns that are covered by the insulating layers, and so that they are stacked up in a direction perpendicular to the planar dimension of the multi-layer wiring board 20.