Patents by Inventor Masatoshi Ishii

Masatoshi Ishii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180039881
    Abstract: A tunable resistance device and methods of forming the same include a magnetic fixed layer having a fixed magnetization, a magnetic free layer, and a non-magnetic conductive layer directly between the magnetic fixed layer and the magnetic free layer. The magnetic fixed layer, the magnetic free layer, and the non-magnetic conductive layer are formed in a lattice of wires, with each wire in the lattice being formed from a stack of the magnetic fixed layer, the magnetic free layer, and the non-magnetic conductive layer.
    Type: Application
    Filed: August 4, 2016
    Publication date: February 8, 2018
    Inventors: Martin M. Frank, Jin Ping Han, Masatoshi Ishii, Timothy Phung, Aakash Pushp
  • Publication number: 20170351279
    Abstract: An electronic device calculates a temperature index value of a temperature of a housing surface by using a temperature sensor and calculates a prediction reached value from change of the temperature index value. The electronic device calculates a rate parameter indicating a target of a decrease rate for decreasing the prediction reached value, on the basis of the prediction reached value calculated at a certain time point and a threshold value. The electronic device controls a clock frequency of a processor on the basis of the calculated rate parameter and correspondence information that associates a plurality of target values of the prediction reached value and a plurality of clock frequencies of the processor.
    Type: Application
    Filed: May 22, 2017
    Publication date: December 7, 2017
    Applicant: FUJITSU LIMITED
    Inventor: Masatoshi Ishii
  • Publication number: 20170344885
    Abstract: Methods and systems are provided for operating a neuromorphic system for generating neuron and synapse activities. The method includes: preparing at least one digital timer in the neuromorphic system, each of the at least one digital timers including multi-bit digital values; generating time signals using the at least one digital timer; emulating an analog waveform of a neuron spike; updating parameters of the neuromorphic system using the time signals and the current values of the parameters; presetting, using a processor, the digital values of the at least one digital timer to initial values when the spike input is provided to the node; and updating, using the processor, the digital values of the at least one digital timer with a specified amount when there is an absence of a spike input to the node.
    Type: Application
    Filed: May 31, 2016
    Publication date: November 30, 2017
    Inventors: Kohji Hosokawa, Masatoshi Ishii, Yutaka Nakamura, Junka Okazawa, Takeo Yasuda
  • Publication number: 20170185889
    Abstract: A method and system are provided for updating synapse weight values in neuromorphic system with Spike Time Dependent Plasticity model. The method includes selectively performing, by a hardware-based synapse weight incrementer or decrementer, one of a synapse weight increment function or decrement function, each using a respective lookup table, to generate updated synapse weight values responsive to spike timing data. The method further includes storing the updated synapse weight values in a memory. The method additionally includes performing, by a hardware-based processor, a learning process to integrate the updated synapse weight values stored in the memory into the Spike Time Dependent Plasticity model neuromorphic system for improved neuromorphic simulation.
    Type: Application
    Filed: December 28, 2015
    Publication date: June 29, 2017
    Inventors: Kohji Hosokawa, Masatoshi Ishii, Yutaka Nakamura, Junka Okazawa, Takeo Yasuda
  • Publication number: 20170185891
    Abstract: A method and system are provided for updating a neuron membrane potential in a spike time dependent plasticity model in a Neuromorphic system. The method includes approximating a shape of an analog spike signal from an axon input using a hardware-based digital axon timer. The method further includes generating a first intermediately updated neuron membrane potential value from a current axon timer value, a current synapse weight value and a current neuron membrane potential value using a first look-up table and an accumulator. The method also includes generating a second intermediately updated neuron membrane potential value with a leak decay effect using a second look-up table and the first intermediately updated neuron membrane potential value. The method additionally includes generating a final updated neuron membrane potential value based on a comparison of the second intermediately updated neuron membrane potential value with a neuron fire threshold level using a comparator.
    Type: Application
    Filed: December 28, 2015
    Publication date: June 29, 2017
    Inventors: Kohji Hosokawa, Masatoshi Ishii, Yutaka Nakamura, Junka Okazawa, Takeo Yasuda
  • Publication number: 20170185890
    Abstract: Described is a neuromorphic system implemented in hardware that implements neuron membrane potential update based on the leaky integrate and fire (LIF) model. The system further models synapse weights update based on the spike time-dependent plasticity (STDP) model. The system includes an artificial neural network in which the update scheme of neuron membrane potential and synapse weight are effectively defined and implemented.
    Type: Application
    Filed: December 28, 2015
    Publication date: June 29, 2017
    Inventors: Takeo Yasuda, Kohji Hosokawa, Yutaka Nakamura, Junka Okazawa, Masatoshi Ishii
  • Publication number: 20170147017
    Abstract: An electronic apparatus includes a housing; a substrate disposed on the inner side of the housing; a plurality of temperature sensors disposed on the substrate; and a processor. The processor performs a procedure including calculating heat source temperatures of a plurality of heat sources disposed on the substrate from temperatures measured by the temperature sensors by using a first heat transfer model not including a first parameter representing a transient response of heat transfer from the heat sources to the temperature sensors; and calculating a surface temperature of a surface of the housing from the heat source temperatures by using a second heat transfer model including the first parameter and a second parameter representing a transient response of heat transfer from the heat sources to the surface.
    Type: Application
    Filed: October 10, 2016
    Publication date: May 25, 2017
    Applicant: FUJITSU LIMITED
    Inventors: Masatoshi Ishii, YOSHIYASU NAKASHIMA, Hiroshi Nakao
  • Patent number: 9598636
    Abstract: A red phosphor in the form of a Mn-activated complex fluoride having the formula: A2MF6:Mn wherein M is one or more tetravalent elements selected from Si, Ti, Zr, Hf, Ge, and Sn, and A is one or more alkali metals selected from Li, Na, K, Rb, and Cs, and contains at least Na and/or K, is surface treated with a treating solution containing a surface treating agent selected from an organic amine, quaternary ammonium salt, alkyl betaine or fluorochemical surfactant, alkoxysilane, and fluorinated polymer.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: March 21, 2017
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Masami Kaneyoshi, Masatoshi Ishii
  • Publication number: 20170066964
    Abstract: The present invention relates to a method for producing a hexafluoromanganate(IV), said method being characterized by comprising: inserting an anode and a cathode into a reaction solution that contains a compound containing manganese having an atomic valence of less than 4 and/or manganese having an atomic valence of more than 4 and hydrogen fluoride; and then applying an electric current having an electric current density of 100 to 1000 A/m2 between the anode and the cathode. According to the present invention, it becomes possible to produce a hexafluoromanganate(IV) in which the content ratio of manganese having an atomic valence of 4 is high and the contamination with oxygen is reduced and which has high purity. When a complex fluoride red phosphor is produced using the hexafluoromanganate(IV) as a raw material, the phosphor produced has high luminescence properties, particularly high internal quantum efficiency.
    Type: Application
    Filed: January 15, 2015
    Publication date: March 9, 2017
    Applicant: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Masami KANEYOSHI, Masatoshi ISHII
  • Publication number: 20170047911
    Abstract: A pulse generator and a method of fabricating a pulse generator are described. The pulse generator includes an input node to receive an input voltage, a first capacitor, and a second capacitor. The first capacitor is positioned between the input node and the second capacitor. An output node outputs an output voltage with a pulse shape, and the pulse generator also includes at least one switch between the input node and the second capacitor. The at least one switch controls the pulse shape of the output voltage.
    Type: Application
    Filed: November 23, 2015
    Publication date: February 16, 2017
    Inventors: Kohji Hosokawa, Masatoshi Ishii, Mark B. Ritter, Takeo Yasuda
  • Publication number: 20170047914
    Abstract: A pulse generator and a method of fabricating a pulse generator are described. The pulse generator includes an input node to receive an input voltage, a first capacitor, and a second capacitor. The first capacitor is positioned between the input node and the second capacitor. An output node outputs an output voltage with a pulse shape, and the pulse generator also includes at least one switch between the input node and the second capacitor. The at least one switch controls the pulse shape of the output voltage.
    Type: Application
    Filed: August 12, 2015
    Publication date: February 16, 2017
    Inventors: Kohji Hosokawa, Masatoshi Ishii, Mark B. Ritter, Takeo Yasuda
  • Publication number: 20170002263
    Abstract: Provided is a method for producing a phosphor having a s chemical composition represented by formula (I), A2MF6:Mn (I) (A is one type or more of an alkali metal selected from Li, Na, K, Rb, and Cs, and includes at least Na and/or K, and M is one type or more of a tetravalent element selected from Si, Ti, Zr, Hf, Ge, and Sn.), the method comprising preparing a first hydrofluoric acid solution containing M and a second hydrofluoric acid solution containing A as well as either dissolving a compound containing Mn in either the first hydrofluoric acid solution or the second hydrofluoric acid solution or preparing a separate solution in which the compound containing Mn is dissolved. When the solutions are mixed to precipitate the phosphor of the formula (I), the solutions are mixed so that the concentration of M is 0.1 to 0.5 mol/liter when all the solutions are mixed. According to the present invention, a complex fluoride phosphor having excellent luminescence properties can be produced stably with high yield.
    Type: Application
    Filed: January 15, 2015
    Publication date: January 5, 2017
    Applicant: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Masami KANEYOSHI, Masatoshi ISHII
  • Publication number: 20160350643
    Abstract: A neuromorphic memory system including neuromorphic memory arrays. Each neuromorphic memory array includes rows and columns of neuromorphic memory cells. A column of postsynaptic circuits is electrically coupled to postsynaptic spike timing dependent plasticity (STDP) lines. Each postsynaptic STDP line is coupled to a row of neuromorphic memory cells. A column of summing circuits is electrically coupled to postsynaptic leaky integrate and fire (LIF) lines. Each postsynaptic LIF line is coupled to the row of neuromorphic memory cells at a respective memory array. Each summing circuit provides a sum of signals from the postsynaptic LIF lines to a respective postsynaptic circuit.
    Type: Application
    Filed: May 26, 2015
    Publication date: December 1, 2016
    Inventors: Kohji Hosokawa, Masatoshi Ishii, SangBum Kim, Chung H. Lam, Scott C. Lewis
  • Publication number: 20160350647
    Abstract: A neuromorphic memory system including neuromorphic memory arrays. The neuromorphic memory system includes a presynaptic neuron circuit coupled to a postsynaptic neuron circuit by a resistive memory cell. The method includes generating a presynaptic LIF pulse on a presynaptic LIF line at time t1. An activating operation activates an access transistor coupled to the presynaptic LIF line in response to the presynaptic LIF pulse. The access transistor enables LIF current to pass through the resistive memory cell to a postsynaptic LIF line. An integrating operation integrates the LIF current at the postsynaptic LIF line over time. A comparing operation compares a LIF voltage at the postsynaptic LIF line to a threshold voltage. A generating operation generates a postsynaptic spike timing dependent plasticity (STDP) pulse on a postsynaptic STDP line if the LIF voltage is beyond the threshold voltage.
    Type: Application
    Filed: June 24, 2015
    Publication date: December 1, 2016
    Inventors: Kohji Hosokawa, Masatoshi Ishii, SangBum Kim, Chung H. Lam, Scott C. Lewis
  • Patent number: 9508912
    Abstract: A thermoelectric conversion device includes a perovskite film over a substrate and formed with first and second electrodes on the perovskite film, wherein the perovskite film includes a domain having a crystal orientation different from a crystal orientation of a crystal that constitutes the perovskite film.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: November 29, 2016
    Assignee: FUJITSU LIMITED
    Inventors: John David Baniecki, Yasutoshi Kotaka, Masatoshi Ishii, Kazuaki Kurihara, Kazunori Yamanaka
  • Patent number: 9412151
    Abstract: This invention improves the image quality of areas that the user want sharply focused. Depth values representing positions in a depth direction of scenes including the photographed object are estimated to generate a depth map. The focus map generation unit, based on the virtual focus parameter 305 and the depth map, generates by an area dividing operation a focus map representing an area to be sharply focused (in-focus area) and an area to be blurred (out-of-focus area). The in-focus area image processing unit places greater importance on the in-focus area in the image processing to generate an in-focus area image. The out-of-focus area image processing unit puts greater importance on the out-of-focus area in the image processing to generate an out-of-focus area image. The image blending unit generates a refocused image by blending the in-focus area image and the out-of-focus area image.
    Type: Grant
    Filed: September 5, 2012
    Date of Patent: August 9, 2016
    Assignee: Canon Kabushiki Kaisha
    Inventor: Masatoshi Ishii
  • Publication number: 20160187272
    Abstract: A processor disposed over a substrate of an electronic apparatus acquires a first measured value from a temperature sensor disposed on the substrate, and calculates surface temperature of a surface of an enclosure of the electronic apparatus on the basis of a transfer function G(s) based on a first thermal resistance and a first thermal capacitance between a heat source over the substrate and the surface of the enclosure, a transfer function H(s) based on a second thermal resistance and a second thermal capacitance between the heat source and the temperature sensor, and the first measured value.
    Type: Application
    Filed: November 12, 2015
    Publication date: June 30, 2016
    Applicant: FUJITSU LIMITED
    Inventors: Masatoshi ISHII, Yoshiyasu Nakashima
  • Patent number: 9287854
    Abstract: A pulse stretching circuit having a pulse delay circuit for receiving an input pulse signal and for outputting a delay pulse signal, and a pulse adjustment circuit, connected to the pulse delay circuit, receiving the input pulse signal and the delay pulse signal and for outputting an output pulse signal having a pulse width longer than a pulse width of the input pulse signal. The pulse adjustment circuit causes a leading edge of the output pulse signal in response to a leading edge of the input pulse signal, keeps a state in which the output pulse signal is displaced with the leading edge thus caused longer than a total time of times for both pulse widths of the input pulse signal and the delay pulse signal, and causes a trailing edge of the output pulse signal in response to a trailing edge of the delay pulse signal.
    Type: Grant
    Filed: June 25, 2015
    Date of Patent: March 15, 2016
    Assignee: International Business Machines Corporation
    Inventors: Masatoshi Ishii, Hisatada Miyatake, Gen Yamada
  • Patent number: 9269883
    Abstract: A thermoelectric conversion device includes a stack in which a first perovskite dielectric film, which includes Sr and Ti and has a first bandgap, and a second perovskite dielectric film, which includes Sr and Ti and has a second bandgap smaller than the first bandgap, are stacked alternately, each of the first and second perovskite dielectric films being doped to have an electric conductivity, the first and the second perovskite dielectric films having respective compositions such that there appears a bandoffset of 0.54 eV in maximum between a conduction band of the first perovskite dielectric film and a conduction band of the second perovskite dielectric film.
    Type: Grant
    Filed: November 12, 2014
    Date of Patent: February 23, 2016
    Assignee: FUJITSU LIMITED
    Inventors: John David Baniecki, Masatoshi Ishii, Kazuaki Kurihara, Kazunori Yamanaka
  • Publication number: 20160027985
    Abstract: A thermoelectric generator includes a perovskite dielectric substrate containing Sr and Ti and having electric conductivity by being doped to n-type; an energy filter formed on a top surface of the perovskite dielectric substrate, the energy filter including a first perovskite dielectric film, which contains Sr and Ti, has electric conductivity by being doped to n-type, and has a conduction band at an energy level higher than that of the perovskite dielectric substrate; a first electrode formed in electrical contact with a bottom surface of the perovskite dielectric substrate; and a second electrode formed in electrical contact with a top surface of the energy filter. The thermoelectric generator produces a voltage between the first and second electrodes by the top surface of the energy filter being exposed to a first temperature and the bottom surface of the perovskite dielectric substrate being exposed to a second temperature.
    Type: Application
    Filed: October 8, 2015
    Publication date: January 28, 2016
    Inventors: John David Baniecki, Masatoshi Ishii, Kazuaki Kurihara