Abstract: A semiconductor integrated circuit is described. A transmitter-receiver transmits and receives data to and from outside by a first external terminal and transmits a first control signal by a second external terminal. When another data is transmitted after the data is transmitted and when a data transmission interval from a time when the data is transmitted to a time when the another data is transmitted is equal to or smaller than a first threshold, the transmitter-receiver continuously outputs, from the first external terminal, a potential level of about ½of a potential level obtained by adding a first potential level and a second potential level, during the data transmission interval, and changes the second potential level of the first control signal to the first potential level when the data transmission interval exceeds the first threshold.

Abstract: A semiconductor integrated circuit is described. A transmitter-receiver transmits and receives data to and from outside by a first external terminal and transmits a first control signal by a second external terminal. When another data is transmitted after the data is transmitted and when a data transmission interval from a time when the data is transmitted to a time when the another data is transmitted is equal to or smaller than a first threshold, the transmitter-receiver continuously outputs, from the first external terminal, a potential level of about 1/2 of a potential level obtained by adding a first potential level and a second potential level, during the data transmission interval, and changes the second potential level of the first control signal to the first potential level when the data transmission interval exceeds the first threshold.

Abstract: A semiconductor integrated circuit is described. A. transmitter-receiver transmits and receives data to and from outside by a first external terminal and transmits a first control signal by a second external terminal. When another data is transmitted after the data is transmitted and when a data transmission interval from a time when the data is transmitted to a time when the another data is transmitted is equal to or smaller than a first threshold, the transmitter-receiver continuously outputs, from the first external terminal, a potential level of about ½ of a potential level obtained by adding a first potential level and a second potential level, during the data transmission interval, and changes the second potential level of the first control signal to the first potential level when the data transmission interval exceeds the first threshold.

Abstract: A semiconductor integrated circuit is described. A. transmitter-receiver transmits and receives data to and from outside by a first external terminal and transmits a first control signal by a second external terminal. When another data is transmitted after the data is transmitted and when a data transmission interval from a time when the data is transmitted to a time when the another data is transmitted is equal to or smaller than a first threshold, the transmitter-receiver continuously outputs, from the first external terminal, a potential level of about ½ of a potential level obtained by adding a first potential level and a second potential level, during the data transmission interval, and changes the second potential level of the first control signal to the first potential level when the data transmission interval exceeds the first threshold.

Abstract: A semiconductor integrated circuit is described. A transmitter-receiver transmits and receives data to and from outside by a first external terminal and transmits a first control signal by a second external terminal. When another data is transmitted after the data is transmitted and when a data transmission interval from a time when the data is transmitted to a time when the another data is transmitted is equal to or smaller than a first threshold, the transmitter-receiver continuously outputs, from the first external terminal, a potential level of about ½ of a potential level obtained by adding a first potential level and a second potential level, during the data transmission interval, and changes the second potential level of the first control signal to the first potential level when the data transmission interval exceeds the first threshold.

Abstract: A data transmitting method used in a semiconductor device having a controller and a transmitter is described. A first write command is output by the controller and then a second write command is output by the controller. An interval time between the first write command and the second write command is calculated. The transmitter is activated by the controller and a first data is transmitted by the transmitter in accordance with the first write command, and then the transmitter is inactivated based on the interval time. Then the transmitter is activated when the transmitter is inactivated. Then, the second data is transmitted by the transmitter in accordance with the second write command.

Abstract: A data transmitting method used in a semiconductor device having a controller and a transmitter is described. A first write command is output by the controller and then a second write command is output by the controller. An interval time between the first write command and the second write command is calculated. The transmitter is activated by the controller and a first data is transmitted by the transmitter in accordance with the first write command, and then the transmitter is inactivated based on the interval time. Then the transmitter is activated when the transmitter is inactivated. Then, the second data is transmitted by the transmitter in accordance with the second write command.

Abstract: A semiconductor device and a highly reliable circuit are realized using the transistors having a lower withstand voltage. There are provided a differential pair including a first and a second transistor which respectively receive input signals having mutually reversed phases; a third and a fourth transistor respectively cascode-coupled to the first and the second transistor, and having the same conductivity type as the first and the second transistor; a first and a second output terminal coupled to respective drains of the third and the fourth transistor; and a voltage divider circuit which divides an intermediate potential between respective potentials of the first and the second output terminal and supplies the divided potential to gates of the third and the fourth transistor.

Abstract: Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including first and second transmitter-receivers that execute transmission and reception of data through a signal line. The first transmitter-receiver includes a first termination circuit that includes a first resistor and a first switch, the first resistor being provided between a first power supply terminal and the signal line, the first switch controlling a current flowing through the first resistor to be turned on and off, and a control circuit that outputs a first control signal to the first termination circuit so that the first switch is turned on when the first transmitter-receiver receives data, the first switch is turned off when the first transmitter-receiver transmits the data, and the first switch is continuously on during a first predetermined period after receiving the data when the first transmitter-receiver further receives another data after receiving the data.

Abstract: Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including first and second transmitter-receivers that execute transmission and reception of data through a signal line. The first transmitter-receiver includes a first termination circuit that includes a first resistor and a first switch, the first resistor being provided between a first power supply terminal and the signal line, the first switch controlling a current flowing through the first resistor to be turned on and off, and a control circuit that outputs a first control signal to the first termination circuit so that the first switch is turned on when the first transmitter-receiver receives data, the first switch is turned off when the first transmitter-receiver transmits the data, and the first switch is continuously on during a first predetermined period after receiving the data when the first transmitter-receiver further receives another data after receiving the data.

Abstract: Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit and a data receiving circuit that receives data transmitted from the data transmitting circuit. The data transmitting circuit includes a data output circuit that outputs the data or sets an output to a high impedance state, and a control circuit that outputs a control signal to the data output circuit so that the data output circuit outputs the data when the data transmitting circuit transmits the data, and the data output circuit keeps outputting data last output in the previous data transmission, during a predetermined period after the previous data transmission when the data transmitting circuit further transmits another data after transmitting the data.

Abstract: Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit that transmits data in parallel through a plurality of signal lines and a data receiving circuit that receives the data. The data transmitting circuit includes a plurality of data output circuits that output the data in a data transmission mode or set an output to a high impedance state in a HiZ mode, a plurality of data selection circuits that select one of the data and fixed data and output the selected data to the data output circuits, and a control circuit that controls the data output circuits to output the fixed data during a period between a time when a mode is switched from the HiZ mode to the data transmission mode and a time when the data output circuits start to output the data.

Abstract: A semiconductor device and a highly reliable circuit are realized using the transistors having a lower withstand voltage. There are provided a differential pair including a first and a second transistor which respectively receive input signals having mutually reversed phases; a third and a fourth transistor respectively cascode-coupled to the first and the second transistor, and having the same conductivity type as the first and the second transistor; a first and a second output terminal coupled to respective drains of the third and the fourth transistor; and a voltage divider circuit which divides an intermediate potential between respective potentials of the first and the second output terminal and supplies the divided potential to gates of the third and the fourth transistor.

Abstract: Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit and a data receiving circuit that receives data transmitted from the data transmitting circuit. The data transmitting circuit includes a data output circuit that outputs the data or sets an output to a high impedance state, and a control circuit that outputs a control signal to the data output circuit so that the data output circuit outputs the data when the data transmitting circuit transmits the data, and the data output circuit keeps outputting data last output in the previous data transmission, during a predetermined period after the previous data transmission when the data transmitting circuit further transmits another data after transmitting the data.

Abstract: Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit that transmits data in parallel through a plurality of signal lines and a data receiving circuit that receives the data. The data transmitting circuit includes a plurality of data output circuits that output the data in a data transmission mode or set an output to a high impedance state in a HiZ mode, a plurality of data selection circuits that select one of the data and fixed data and output the selected data to the data output circuits, and a control circuit that controls the data output circuits to output the fixed data during a period between a time when a mode is switched from the HiZ mode to the data transmission mode and a time when the data output circuits start to output the data.

Abstract: A highly reliable circuit is realized using the transistors having a lower withstand voltage. There are provided a differential pair including a first and a second transistor which respectively receive input signals having mutually reversed phases; a third and a fourth transistor respectively cascode-coupled to the first and the second transistor, and having the same conductivity type as the first and the second transistor; a first and a second output terminal coupled to respective drains of the third and the fourth transistor; and a voltage divider circuit which divides an intermediate potential between respective potentials of the first and the second output terminal and supplies the divided potential to gates of the third and the fourth transistor.

Abstract: Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including first and second transmitter-receivers that execute transmission and reception of data through a signal line. The first transmitter-receiver includes a first termination circuit that includes a first resistor and a first switch, the first resistor being provided between a first power supply terminal and the signal line, the first switch controlling a current flowing through the first resistor to be turned on and off, and a control circuit that outputs a first control signal to the first termination circuit so that the first switch is turned on when the first transmitter-receiver receives data, the first switch is turned off when the first transmitter-receiver transmits the data, and the first switch is continuously on during a first predetermined period after receiving the data when the first transmitter-receiver further receives another data after receiving the data.

Abstract: Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit that transmits data in parallel through a plurality of signal lines and a data receiving circuit that receives the data. The data transmitting circuit includes a plurality of data output circuits that output the data in a data transmission mode or set an output to a high impedance state in a HiZ mode, a plurality of data selection circuits that select one of the data and fixed data and output the selected data to the data output circuits, and a control circuit that controls the data output circuits to output the fixed data during a period between a time when a mode is switched from the HiZ mode to the data transmission mode and a time when the data output circuits start to output the data.

Abstract: Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including first and second transmitter-receivers that execute transmission and reception of data through a signal line. The first transmitter-receiver includes a first termination circuit that includes a first resistor and a first switch, the first resistor being provided between a first power supply terminal and the signal line, the first switch controlling a current flowing through the first resistor to be turned on and off, and a control circuit that outputs a first control signal to the first termination circuit so that the first switch is turned on when the first transmitter-receiver receives data, the first switch is turned off when the first transmitter-receiver transmits the data, and the first switch is continuously on during a first predetermined period after receiving the data when the first transmitter-receiver further receives another data after receiving the data.

Abstract: Provided is a semiconductor integrated circuit according to an exemplary aspect of the present invention including a data transmitting circuit that transmits data in parallel through a plurality of signal lines and a data receiving circuit that receives the data. The data transmitting circuit includes a plurality of data output circuits that output the data in a data transmission mode or set an output to a high impedance state in a HiZ mode, a plurality of data selection circuits that select one of the data and fixed data and output the selected data to the data output circuits, and a control circuit that controls the data output circuits to output the fixed data during a period between a time when a mode is switched from the HiZ mode to the data transmission mode and a time when the data output circuits start to output the data.