Patents by Inventor Massimo Iaculo

Massimo Iaculo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110271030
    Abstract: In accordance with some embodiments, wear leveling may be done based on the difference in age of discarded blocks and engaged blocks. Data is moved to an older discarded block from a younger engaged block. Two wear leveling bits may be used for each logical block, such that the wear leveling bits are used in alternating cycles.
    Type: Application
    Filed: December 30, 2008
    Publication date: November 3, 2011
    Inventors: Massimo Iaculo, Ornella Vitale, Antonino Pollio
  • Patent number: 7603593
    Abstract: A method for managing bad memory blocks of a nonvolatile-memory device, in which the available memory blocks are divided into a first set, formed by addressable memory blocks that are to be used by a user, and a second set, formed by spare memory blocks that are to replace bad addressable memory blocks, and in which the bad addressable memory blocks are re-mapped into corresponding spare memory blocks. The re-mapping of the bad addressable memory blocks envisages: seeking bad spare memory blocks; storing the logic address of each bad spare memory block in a re-directing vector in a position corresponding to that of the bad spare memory block in the respective set; seeking bad addressable memory blocks; and storing the logic address of each bad addressable memory block in a free position in the re-directing vector.
    Type: Grant
    Filed: February 19, 2008
    Date of Patent: October 13, 2009
    Inventors: Massimo Iaculo, Nicola Guida, Andrea Ruggiero
  • Publication number: 20080158962
    Abstract: A method for managing bad memory blocks of a nonvolatile-memory device, in which the available memory blocks are divided into a first set, formed by addressable memory blocks that are to be used by a user, and a second set, formed by spare memory blocks that are to replace bad addressable memory blocks, and in which the bad addressable memory blocks are re-mapped into corresponding spare memory blocks. The re-mapping of the bad addressable memory blocks envisages: seeking bad spare memory blocks; storing the logic address of each bad spare memory block in a re-directing vector in a position corresponding to that of the bad spare memory block in the respective set; seeking bad addressable memory blocks; and storing the logic address of each bad addressable memory block in a free position in the re-directing vector.
    Type: Application
    Filed: February 19, 2008
    Publication date: July 3, 2008
    Applicant: STMicroelectronics S.R.L.
    Inventors: Massimo Iaculo, Nicola Guida, Andrea Ruggiero
  • Publication number: 20060018166
    Abstract: A method for managing bad memory blocks of a nonvolatile-memory device, in which the available memory blocks are divided into a first set, formed by addressable memory blocks that are to be used by a user, and a second set, formed by spare memory blocks that are to replace bad addressable memory blocks, and in which the bad addressable memory blocks are re-mapped into corresponding spare memory blocks. The re-mapping of the bad addressable memory blocks envisages: seeking bad spare memory blocks; storing the logic address of each bad spare memory block in a re-directing vector in a position corresponding to that of the bad spare memory block in the respective set; seeking bad addressable memory blocks; and storing the logic address of each bad addressable memory block in a free position in the re-directing vector.
    Type: Application
    Filed: June 14, 2005
    Publication date: January 26, 2006
    Applicant: STMicroelectronics S.r.l.
    Inventors: Massimo Iaculo, Nicola Guida, Andrea Ruggiero
  • Publication number: 20050021904
    Abstract: The mass memory device includes a flash memory (205) having a plurality of physical sectors, suitable to be erased individually, each one including a plurality of physical blocks and a method for emulating a random-access logical memory space having a plurality of logical sectors each one including a plurality of logical blocks, the logical sectors being grouped into at least one group.
    Type: Application
    Filed: June 4, 2004
    Publication date: January 27, 2005
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Massimo Iaculo, Nicola Guida, Antonino Pollio, Angelo Dellamonica, Pietro Baggi, Stefano Ghezzi