Abstract: A radio frequency chip package is formed by assembling a connecting element such as a circuit board or flexible circuit tape having chips thereon with a bottom plane element such as a lead frame incorporating a large thermally-conductive plate and leads projecting upwardly from the plane of the plate. The assembly step places the rear surfaces of the chips on the bottom side of the connecting element into proximity with the thermal conductor and joins the conductive traces on the connecting element with the leads. The resulting assembly is encapsulated, leaving terminals at the bottom ends of the leads exposed. The encapsulated assembly may be surface-mounted to a circuit board. The leads provide robust electrical connections between the connecting element and the circuit board.

Abstract: A microelectronic assembly includes a first microelectronic element having a contact bearing face and at least one contact accessible at the contact bearing face, and a second microelectronic element opposing the first microelectronic element, the second microelectronic element having a first surface including at least one lead extending over the first surface. The microelectronic assembly includes the first fusible material engaging the at least one contact of the first microelectronic element, and a second fusible material engaging the at least one lead, whereby one of the first and second fusible materials has a higher melting temperature and one of the first and second fusible materials has a lower melting temperature.

Abstract: A microelectronic assembly includes a microelectronic package having a microelectronic element with faces and contacts, a flexible substrate spaced from and overlying a first face of the microelectronic element, and a plurality of conductive posts extending from the flexible substrate and projecting away from the first face of the microelectronic element, at least some of the conductive posts being electrically interconnected with the microelectronic element. The package includes a plurality of support elements disposed between the microelectronic element and the substrate and supporting the flexible substrate over the microelectronic element. At least some of the conductive posts are offset from the support elements. The assembly includes a circuitized substrate having conductive pads confronting the conductive posts of the microelectronic package, whereby the conductive posts are electrically interconnected with the conductive pads.

Abstract: A microelectronic package includes a microelectronic element having faces and contacts and a flexible substrate spaced from and overlying a first face of the microelectronic element. The package also includes a plurality of conductive posts extending from the flexible substrate and projecting away from the first face of the microelectronic element, wherein at least some of the conductive posts are electrically interconnected with the microelectronic element, and a plurality of support elements supporting the flexible substrate over the microelectronic element. The conductive posts are offset from the support elements to facilitate flexure of the substrate and movement of the posts relative to the microelectronic element.

Abstract: A radio frequency chip package is formed by assembling a connecting element such as a circuit board or flexible circuit tape having chips thereon with a bottom plane element such as a lead frame incorporating a large thermally-conductive plate and leads projecting upwardly from the plane of the plate. The assembly step places the rear surfaces of the chips on the bottom side of the connecting element into proximity with the thermal conductor and joins the conductive traces on the connecting element with the leads. The resulting assembly is encapsulated, leaving terminals at the bottom ends of the leads exposed. The encapsulated assembly may be surface-mounted to a circuit board. The leads provide robust electrical connections between the connecting element and the circuit board.

Abstract: A flexible sheet used in manufacture of microelectronic components is held on a frame formed from a rigid material so that the frame maintains the sheet under tension during processing and thereby stabilizes the dimensions of the sheet. The frame may be formed from a rigid, light-transmissive material such as a glass, and the bond between the frame and sheet may be made or released by light transmitted through the frame. Preferred features of the framed sheet minimize entrapment of processing liquids such as etch solutions, thereby minimizing carryover of processing solutions between steps. The frame may have contact openings which permit engagement of a metallic layer on the sheet by an electrode carrying electroplating or etching current without disturbing the main portion of the sheet where features are to be formed or treated.

Abstract: A building unit for constructing a wall, a ceiling, a floor, or a roof includes a metal rail, and insulating panel, and an elongated linear stud. The metal rail has a flat surface and at least one flange extending from the flat surface. The insulating panel has a front surface and a back surface bounded by opposing edges. It is made of rigid foamed plastic and it has at least one primary linear passageway extending through it between and perpendicular to two opposing edges. At least one of the opposing edges can be attached to the metal rail. The elongated linear stud has two ends that can be fixed to the rail. The stud fits into the primary linear passageway and is at least as long as the primary linear passageway. Another similar metal rail may be attached to the other end of the stud. The panel may include a second linear passageway that is at right angles to the primary linear passageway. A linear metal strap fits into the second linear passageway.

Abstract: A microelectronic assembly includes a first microelectronic element having a first face and contacts accessible at the first face, and a layer of a dielectric material having a bottom surface contacting the first microelectronic element, a top surface facing away from the first microelectronic element and holes extending between the top and bottom faces in alignment with the contacts on the first microelectronic element. The assembly includes conductive protrusions extending through the holes to the contacts, the conductive protrusions projecting beyond the top surface of the dielectric layer.

Abstract: A method is disclosed for making a microelectronic package. A material is applied to a first major surface of a microelectronic element to reduce the heights of protrusions projecting from the first major surface. The microelectronic element is assembled to a microelectronic component. A method of forming protrusions and an assembly incorporating the microelectronic element having protrusions is also disclosed.

Abstract: In a surface mounting operation for connecting a semiconductor chip and connection component, at least one of the chip or the component has a plurality of elongated pads having a length being greater than the width. The elongated pads are preferably parallel to each other on the chip or component. A solder mask layer may be placed over a selected number of the pads before a bonding operation. The solder mask layer preferably has elongated apertures which are arranged in a perpendicular fashion to the elongated pads. A slight misalignment of the solder mask will not affect the surface area of the pad that shows through the elongated apertures of the solder mask.

Abstract: A substrate is provided having a plurality of sheets. Each sheet has a first major surface containing a plurality of electrically conductive regions and a second major surface that opposes the first major surface. The sheets are arranged such that the first major surface of a sheet faces the second major surface of another. At least one electrically conductive region of each sheet is partially or fully exposed. At least one electrically conductive region of a sheet is partially or fully covered, e.g., by one or more electrically conductive regions of another sheet. A method for forming such a substrate is also provided.

Abstract: Inductors are provided in chip assemblies such as in packaged semiconductor chips. The inductors may be incorporated in a chip carrier which forms part of the package, and may include, for example, spiral or serpentine inductors formed from traces on the chip carrier. The chip carrier may include a flap bearing the inductive element, and this flap may be bent to tilt the inductive element out of the plane of the chip carrier to reduce electromagnetic interaction between the inductive element and surrounding electrical components. Other inductors include solenoids formed in part by leads on the chip carrier as, for example, by displacing leads out of the plane of the chip carrier to form loops in vertically-extensive planes transverse to the plane of the chip carrier. Additional features provide trimming of the inductor to a desired inductance value during by breaking or connecting leads during assembly.

Abstract: A microelectronic subassembly includes a substrate having a first surface, and one or more microelectronic elements positioned above the first surface of the substrate, each microelectronic element having a contact bearing face confronting the first surface of the substrate and a back surface remote therefrom. The subassembly includes a substantially rigid plate attached to the back surfaces of the microelectronic elements, an array of flexible leads extending between the substrate and the microelectronic elements, the leads having first ends attached to the substrate and second ends attached to the contacts of the microelectronic elements, and an at least partially cured spacer material sandwiched between the substantially rigid plate and the substrate for holding the contact bearing faces of the microelectronic elements at a precise height above the substrate.

Abstract: Inductors are provided in chip assemblies such as in packaged semiconductor chips. The inductors may be incorporated in a chip carrier which forms part of the package, and may include, for example, spiral or serpentine inductors formed from traces on the chip carrier. The chip carrier may include a flap bearing the inductive element, and this flap may be bent to tilt the inductive element out of the plane of the chip carrier to reduce electromagnetic interaction between the inductive element and surrounding electrical components. Other inductors include solenoids formed in part by leads on the chip carrier as, for example, by displacing leads out of the plane of the chip carrier to form loops in vertically-extensive planes transverse to the plane of the chip carrier. Additional features provide trimming of the inductor to a desired inductance value during by breaking or connecting leads during assembly.

Abstract: Provided are connection structures for a microelectronic device and methods for forming the structure. A substrate is included having opposing surfaces and a plurality of holes extending through the surfaces. Also included is a plurality of electrically conductive posts. Each post extends from a base to a tip located within a corresponding hole of the substrate. An additional substrate may be provided such that the base of each post is located on a surface thereof. Additional electrically conductive posts may be provided having tips in corresponding holes of the additional substrate. Optionally, a dielectric material may be placed between the substrate and the posts.

Abstract: As disclosed herein, structures and methods are provided for forming capped chips. As provided by the disclosed method, a metal base pattern is formed on a chip insulated from wiring of the chip, and a cap is formed including a metal. The cap is joined to the metal base pattern on the chip to form the capped chip. In one embodiment, a front surface of the chip is exposed which extends from a contact of the chip to an edge of the chip. In another embodiment, a conductive connection is formed to the contact, the conductive connection extending from the contact to a terminal at an exposed plane above the front surface of the chip.

Abstract: A microelectronic package includes a microelectronic element having faces and contacts, and a flexible substrate spaced from and overlying a first face of the microelectronic element, the flexible substrate having conductive pads facing away from the first face of the microelectronic element. The package includes a plurality of spheres attached to the conductive pads of the flexible substrate and projecting away from the first face of the microelectronic element, each sphere having a contact surface remote from the conductive pads, the contact surfaces of the spheres including a contact metal devoid of solder. The package also includes a plurality of support elements disposed between the microelectronic element and the substrate for supporting the flexible substrate over the microelectronic element, the spheres being offset from the support elements.

Abstract: A method of making a capacitor structure having an enhanced plate surface area is provided. In such method, a mandrel is provided which has a major surface having an array of features including at least one of: a plurality of first features protruding upward or a plurality of second features extending downward from said surface. A conformal first conductive layer is formed over the mandrel, the first conductive layer conforming to contours of the major surface. A conformal capacitor dielectric layer is formed over the conformal first conductive layer. When the capacitor is an electrolytic capacitor, the conformal capacitor dielectric layer is contacted by an electrolyte. When the capacitor is a plate capacitor, a second plate including a second conformal conductive layer is formed over the conformal capacitor dielectric layer.

Abstract: An array of chips spaced apart from one another by chip spacing distances, as, for example, an array of chips on a wafer dicing tape is juxtaposed with an array of chip receiving elements spaced apart from one another by receiving element spacing distances different from the chip spacing distances, as, for example, an array of substrates or fixtures spaced apart from one another at distances substantially larger than the chip spacing distances. The juxtaposing step is performed so that a set of chips including less than all of the chips in the array of chips is aligned with a set of the chip receiving elements. This set of chips is transferred to the set of chip receiving elements while the arrays are aligned with one another. The cycle may be repeated using the same or different array of chips, and using the same or different array of chip receiving elements.

Abstract: A microelectronic package includes a microelectronic element having faces, contacts and an outer perimeter, and a flexible substrate overlying and spaced from a first face of the microelectronic element, an outer region of the flexible substrate extending beyond the outer perimeter of the microelectronic element. The package includes a plurality of conductive posts exposed at a surface of the flexible substrate and being electrically interconnected with the microelectronic element, wherein at least one of the conductive posts is disposed in the outer region of the flexible substrate, and a compliant layer disposed between the first face of the microelectronic element and the flexible substrate, wherein the compliant layer overlies the at least one of the conductive posts that is disposed in the outer region of the flexible substrate.