Patents by Inventor Masumi Kasahara

Masumi Kasahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7278577
    Abstract: An image input system includes a solid state image pickup device and a preprocessor for performing correlated double sampling amplification on an output of the image pickup device and outputting a video signal. The preprocessor has a correlated double sampling amplifier for outputting signal information corresponding to a difference voltage between the black level in a feedthrough period of the image pickup device and a signal level in a charge signal output period; and an offset cancelling circuit for cancelling an offset voltage corresponding to the difference voltage in a state where the image pickup device is optically interrupted to the input terminal of the correlated double sampling amplifier. The correlated double sampling amplifier cancels out the offset voltage and the offset cancelling voltage as signal components of polarities opposite to each other, so that circuits following the correlated double sampling amplifier are not influenced by the offset voltage.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: October 9, 2007
    Assignees: Renesas Technology Corp., Hitachi Tohbu Semiconductor, Ltd.
    Inventors: Kouichi Yahagi, Masumi Kasahara, Hiroki Nakajima
  • Patent number: 7269402
    Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: September 11, 2007
    Assignees: Renesas Technology Corp., TTP Com Limited
    Inventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Astle Henshaw
  • Patent number: 7263340
    Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: August 28, 2007
    Assignees: Renesas Technology Corporation, TTP Com Limited
    Inventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Astle Henshaw
  • Patent number: 7242916
    Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.
    Type: Grant
    Filed: September 12, 2006
    Date of Patent: July 10, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Hirotaka Oosawa, Masumi Kasahara, Noriyuki Kurakami, Toshiya Uozumi
  • Patent number: 7224948
    Abstract: There are provided a transmitter and a wireless communication terminal apparatus using the same for solving a problem of undesired spurs due to harmonics of an output signal of a frequency synthesizer, and further solving a problem of the undesired spurs occurring when the harmonics of an output signal of a crystal oscillator are mixed into a VCO to facilitate to design a circuit or a mounting substrate. The transmitter has a relationship between an output frequency of a PLL frequency conversion circuit (5) and output frequencies of frequency synthesizers (1, 2) stored therein, and the output frequencies of the frequency synthesizers (1, 2) input into the PLL frequency conversion circuit (5) are controlled on the basis of the relationship so that the undesired spurs are suppressed.
    Type: Grant
    Filed: January 11, 2000
    Date of Patent: May 29, 2007
    Assignees: Hitachi, Ltd., TTP Communications Limited
    Inventors: Taizo Yamawaki, Satoshi Tanaka, Masaru Kokubo, Kazuo Watanabe, Masumi Kasahara, Kazuaki Hori, Julian Hildersley
  • Publication number: 20070087716
    Abstract: A wireless communication system, which is provided with a PLL circuit having a plurality of oscillators and is capable of processing two or more transmit and receive signal different in frequency band from one another according to the switching between the oscillators, has a reset means which resets a voltage applied to each of filter capacitors lying within the PLL circuit to a predetermined voltage when the switching between the oscillators is performed.
    Type: Application
    Filed: December 13, 2006
    Publication date: April 19, 2007
    Inventors: Masumi Kasahara, Koichi Yahagi
  • Publication number: 20070052488
    Abstract: In a communication semiconductor integrated circuit device, an oscillator (VCO 10) of a PLL circuit can operate in a plurality of frequency bands. With a control voltage (Vc) of the oscillator fixed to a predetermined value (VDC), an oscillation frequency of the oscillator is measured for each band to be stored in a storage (18). When the PLL operates, a setting value to specify a band is compared with the measured frequency values stored in the storage. As a result of the comparison, a band to be actually used by the oscillator is determined.
    Type: Application
    Filed: November 6, 2006
    Publication date: March 8, 2007
    Inventors: Masumi Kasahara, Hirotaka Osawa, Robert Henshaw
  • Publication number: 20070010225
    Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.
    Type: Application
    Filed: September 12, 2006
    Publication date: January 11, 2007
    Inventors: Hirotaka Oosawa, Masumi Kasahara, Noriyuki Kurakami, Toshiya Uozumi
  • Publication number: 20070007347
    Abstract: An image input system comprises a solid state image pickup device and a preprocessor (3) for performing correlated double sampling amplification on an output signal of the solid state image pickup device and outputting a video signal. The preprocessor comprises: a correlated double sampling amplifier (30) for outputting signal information corresponding to a difference voltage between the black level in a feedthrough period of the solid state image pickup device and a signal level in a charge signal output period; and offset cancelling means (38) for applying an offset cancelling voltage for cancelling an offset voltage corresponding to the difference voltage between the black level and the signal level in a state where the solid state image pickup device is optically interrupted to the input terminal of the correlated double sampling amplifier. The correlated double sampling amplifier cancels out the offset voltage and the offset cancelling voltage as signal components of polarities opposite to each other.
    Type: Application
    Filed: May 16, 2006
    Publication date: January 11, 2007
    Inventors: Kouichi Yahagi, Masumi Kasahara, Hiroki Nakajima
  • Patent number: 7162216
    Abstract: A wireless communication system, which is provided with a PLL circuit having a plurality of oscillators and is capable of processing two or more transmit and receive signal different in frequency band from one another according to the switching between the oscillators, has a reset means which resets a voltage applied to each of filter capacitors lying within the PLL circuit to a predetermined voltage when the switching between the oscillators is performed.
    Type: Grant
    Filed: February 17, 2004
    Date of Patent: January 9, 2007
    Assignee: Renesas Technology Corp.
    Inventors: Masumi Kasahara, Koichi Yahagi
  • Patent number: 7148764
    Abstract: In a communication semiconductor integrated circuit device, an oscillator (VCO 10) of a PLL circuit can operate in a plurality of frequency bands. With a control voltage (Vc) of the oscillator fixed to a predetermined value (VDC), an oscillation frequency of the oscillator is measured for each band to be stored in a storage (18). When the PLL operates, a setting value to specify a band is compared with the measured frequency values stored in the storage. As a result of the comparison, a band to be actually used by the oscillator is determined.
    Type: Grant
    Filed: November 13, 2002
    Date of Patent: December 12, 2006
    Assignees: Renesas Technology Corp., TTPCom Limited
    Inventors: Masumi Kasahara, Hirotaka Osawa, Robert Astle Henshaw
  • Patent number: 7146143
    Abstract: The invention provides a communication semiconductor integrated circuit device (RF IC) capable of pulling in the frequency of a PLL circuit to a desired set frequency at high speed even in the case where a frequency settable range of the PLL circuit is wide without providing a current source other than a current source for charging and discharging in an normal operation. An oscillator as a component of a PLL circuit is constructed so as to be operative in a plurality of bands. In a state where a control voltage of the oscillator is fixed to a predetermined value, an oscillation frequency of the oscillator is measured in each of bands and stored in a storing circuit. A set value for designating a band supplied at the time of PLL operation is compared with the stored measured frequency value. From a result of comparison, a band to be actually used in the oscillator is determined, and a frequency difference between the maximum frequency of the selected band and the set frequency is obtained.
    Type: Grant
    Filed: April 16, 2003
    Date of Patent: December 5, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Hirotaka Oosawa, Masumi Kasahara, Noriyuki Kurakami, Toshiya Uozumi
  • Publication number: 20060258313
    Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
    Type: Application
    Filed: July 25, 2006
    Publication date: November 16, 2006
    Inventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Henshaw
  • Publication number: 20060258312
    Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
    Type: Application
    Filed: July 25, 2006
    Publication date: November 16, 2006
    Inventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Henshaw
  • Patent number: 7103337
    Abstract: A semiconductor integrated circuit device for communication is provided with a PLL circuit or the like formed therein, the PLL circuit which is capable of realizing the compensation of fluctuation due to temperature change, the inhibition of increase in the chip area and the ensurement of the performance margin, and which controls a VCO having multiple oscillation frequency bands. In the case where automatic calibration is performed by switching a switch to a side of a DC voltage source in the PLL circuit using a VCO having multiple oscillation bands, a tuning voltage (Vtune) of an RFVCO is fixed to a voltage value of a DC voltage source. However, since a temperature characteristic of canceling a VCO oscillation frequency is given to the DC voltage source, it is possible to minimize the influence on the band selection when a calibration table comes to no optimum one.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: September 5, 2006
    Assignees: Hitachi, Ltd., TTP Com Limited
    Inventors: Toshiya Uozumi, Satoshi Tanaka, Masumi Kasahara, Hirotaka Oosawa, Yasuyuki Kimura, Robert Astle Henshaw
  • Publication number: 20060148416
    Abstract: The present invention supplies a stable power supply voltage from small output currents to large output currents, regardless of operation states of a semiconductor integrated circuit device. When an output current of the regulator is small (idle mode), all switches go off. Thereby, power is supplied to a transistor via resistors, a load of a transistor becomes large, and current consumption of the regulator can be reduced. Since a transistor goes off, parasitic capacitance can be reduced, and a sufficient phase margin can be ensured between output of a differential voltage comparator and an output signal of the regulator. In normal operation, all the switches go on, load resistance is reduced to reduce noise, and driving capability is improved to supply stable power supply voltages.
    Type: Application
    Filed: January 4, 2006
    Publication date: July 6, 2006
    Inventors: Yoshiaki Harasawa, Masumi Kasahara
  • Publication number: 20060121858
    Abstract: A ?? transmitter that permits setting of a loop filter LF, a charge pump current and other factors to the same conditions even if it is operated in a plurality of frequency bands, therefore allows the number of components to be reduced and at the same time enables the angle between the phases of local signals for reception use to be close to exactly 90°, which is a feature ensuring robustness against inter-element variations and accordingly suitable for large scale integration, is to be provided. The oscillation frequency of a VCO is set to an even-number multiple of the transmit frequency, and generates transmit signals via a divider. A device that varies the gain according to the amplitude component of modulating signals is added to an amplifier whose input is signals from the VCO, and the transmission of modulating signals involving amplitude modulation, such as EDGE, is thereby made possible.
    Type: Application
    Filed: August 19, 2005
    Publication date: June 8, 2006
    Inventors: Satoshi Tanaka, Kazuyuki Hori, Manabu Kawabe, Yukinori Akamine, Masumi Kasahara, Kazuo Watanabe
  • Publication number: 20060114074
    Abstract: A semiconductor integrated circuit for communication has a reference oscillator with high frequency control accuracy. The oscillator has a capacitive load circuit including a plurality of fixed capacitance elements, a plurality of variable capacitance elements, and switch elements connected to the capacitance elements, and is configured such that it can oscillate at a frequency corresponding to a synthesized capacitance value of the fixed capacitance elements, variable capacitance elements, and external oscillation elements. Through a control circuit that can generate a signal for controlling the switch elements, a combination of the variable capacitance element and the fixed capacitance element can be selected, in which the slopes of the characteristics of the frequency to control voltage are equalized, and intervals between the respective characteristic lines are equalized by the synthesized capacitance value of the capacitive load circuit and the oscillation elements.
    Type: Application
    Filed: November 30, 2005
    Publication date: June 1, 2006
    Inventors: Toshiki Matsui, Masumi Kasahara, Norio Hayashi
  • Patent number: 7035069
    Abstract: Into an internal circuit to operate in a high-frequency band, there is incorporated a protective circuit of a multistage connection which is constructed to include a plurality of diode-connected transistors having a low parasitic capacity and free from a malfunction even when an input signal higher than the power supply voltage is applied. Into an internal circuit to operate in a low-frequency band, there is incorporated a protective circuit which is constructed to include one diode-connected transistor. The protective circuits include two lines of protective circuit, in which the directions of electric currents are so reversed as to protect the internal circuits against positive/negative static electricities.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: April 25, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Kumiko Takikawa, Satoshi Tanaka, Masumi Kasahara
  • Patent number: 7020444
    Abstract: A communication semiconductor integrated circuit has an oscillator circuit forming part of a transmission PLL circuit fabricated on a single semiconductor chip together with an oscillator circuit forming part of a reception PLL circuit and an oscillator circuit for an intermediate frequency. The oscillator circuit for the transmission PLL circuit is configured to be operable in a plurality of bands. The communication semiconductor integrated circuit also comprises a circuit for measuring the oscillating frequency of the oscillator circuit for the transmission PLL circuit, and a storage circuit for storing the result of measurement made by the measuring circuit. A band to be used by the oscillator circuit for the transmission PLL circuit is determined based on values for setting the oscillating frequencies of the oscillator circuit forming part of the reception PLL circuit and the intermediate frequency oscillator circuit, and the result of measurement stored in the storage circuit.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: March 28, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Jiro Shinbo, Hirotaka Oosawa, Noriyuki Kurakami, Masumi Kasahara, Robert Astle Henshaw