Patents by Inventor Matthew Nowak

Matthew Nowak has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11971936
    Abstract: Implementations are described herein for analyzing existing interactive web sites to facilitate automatic engagement with those web sites, e.g., by automated assistants or via other user interfaces, with minimal effort from the hosts of those websites. For example, in various implementations, techniques described herein may be used to extract, validate, maintain, generalize, extend and/or distribute individual actions and “traces” of actions that are useable to navigate through various interactive websites. Additionally, techniques are described herein for leveraging these actions and/or traces to automate aspects of interaction with a third party website.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: April 30, 2024
    Assignee: GOOGLE LLC
    Inventors: Gökhan Bakir, Andre Elisseeff, Torsten Marek, João Paulo Pagaime da Silva, Mathias Carlen, Dana Ritter, Lukasz Suder, Ernest Galbrun, Matthew Stokes, Marcin Nowak-Przygodzki, Mugurel-Ionut Andreica, Marius Dumitran
  • Publication number: 20240095679
    Abstract: In some implementations described herein, a system may receive resume data associated with a resume of a candidate. The system may identify, from the resume data, one or more resume attributes. The system may determine interview questions based on the resume attribute(s). The system may transmit, to an interview device, the interview questions. An interview question may be transmitted after receiving a response to a preceding interview question. The system may receive, from the interview device, response data corresponding to responses to the interview questions. For a particular response, the response data may include a video feed from the interview device of the candidate providing the particular response. The system may identify, from the response data, one or more response attributes. The system may determine, based on the response attribute(s) and historical response data associated with historical responses, a recommendation associated with the candidate.
    Type: Application
    Filed: September 19, 2022
    Publication date: March 21, 2024
    Inventors: Matthew NOWAK, Mohamed SECK, Louis BUELL
  • Patent number: 11880819
    Abstract: A system may receive, via an NFC tag disposed proximate a vehicle fuel tank, a fuel transaction request from a third-party POS NFC reader positioned proximate a fuel pump. The system may detect a user device being paired with a vehicle communication device of the vehicle to enable a short-range wireless communication. The system may determine that the user device is associated with an authorized user of the vehicle. The system may unlock the NFC tag to enable the NFC tag to communicate with the third-party POS NFC reader for a predefined time limit responsive to determining that the user device is associated with the authorized user. Responsive to unlocking the NFC tag, the system may retrieve account payment information associated with the authorized user, and may transmit, via the NFC tag, the account payment information to the third-party POS NFC reader to complete the fuel transaction.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: January 23, 2024
    Assignee: CAPITAL ONE SERVICES, LLC
    Inventor: Matthew Nowak
  • Publication number: 20230150049
    Abstract: Systems and methods for setting welding parameters are provided. For example, in certain embodiments, a method includes receiving an input relating to a change in a parameter of welding power of a welding system via a welding system interface. The method also includes displaying a graphical representation of an acceptable range of values for the parameter of the welding power on a display device of the welding system interface, wherein the acceptable range of values is based on other parameters of a welding process being performed by the welding system. The method further includes constraining subsequent manual inputs relating to changes in the parameter of the welding power to the acceptable range of values.
    Type: Application
    Filed: January 12, 2023
    Publication date: May 18, 2023
    Inventors: Craig Steven Knoener, John Carmen Granato, JR., Albert Matthew Nowak, Megan Katherine Parker, Benjamin D. Romenesko, Joshua Thomas Stiever, Ronald Dewayne Woodward
  • Publication number: 20230137137
    Abstract: A system may receive, via an NFC tag disposed proximate a vehicle fuel tank, a fuel transaction request from a third-party POS NFC reader positioned proximate a fuel pump. The system may detect a user device being paired with a vehicle communication device of the vehicle to enable a short-range wireless communication. The system may determine that the user device is associated with an authorized user of the vehicle. The system may unlock the NFC tag to enable the NFC tag to communicate with the third-party POS NFC reader for a predefined time limit responsive to determining that the user device is associated with the authorized user. Responsive to unlocking the NFC tag, the system may retrieve account payment information associated with the authorized user, and may transmit, via the NFC tag, the account payment information to the third-party POS NFC reader to complete the fuel transaction.
    Type: Application
    Filed: October 29, 2021
    Publication date: May 4, 2023
    Inventor: Matthew Nowak
  • Patent number: 11554439
    Abstract: Systems and methods for setting welding parameters are provided. For example, in certain embodiments, a method includes receiving an input relating to a change in a parameter of welding power of a welding system via a welding system interface. The method also includes displaying a graphical representation of an acceptable range of values for the parameter of the welding power on a display device of the welding system interface, wherein the acceptable range of values is based on other parameters of a welding process being performed by the welding system. The method further includes constraining subsequent manual inputs relating to changes in the parameter of the welding power to the acceptable range of values.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: January 17, 2023
    Assignee: Illinois Tool Works Inc.
    Inventors: Craig Steven Knoener, John Carmen Granato, Jr., Albert Matthew Nowak, Megan Katherine Parker, Benjamin D. Romenesko, Joshua Thomas Stiever, Ronald Dewayne Woodward
  • Patent number: 9572532
    Abstract: A hermetically sealed electronic closure device, or button, includes a self-renewing power source, a sensor for measuring a metric, a memory storing information, a data processing circuit for controlling operations of the device, and a transceiver for sending and receiving information. The device is a standard part of a clothing item that is inconspicuous to a wearer of the clothing item.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: February 21, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Barry Alan Matsumori, Kenneth Kaskoun, Matthew Nowak, Nicholas Yu
  • Patent number: 9190201
    Abstract: An integrated magnetic film enhanced inductor and a method of forming an integrated magnetic film enhanced inductor are disclosed. The integrated magnetic film enhanced inductor includes an inductor metal having a first portion and a second portion, a top metal or bottom metal coupled to the inductor metal, and an isolation film disposed one of in, on, and adjacent to at least one of the first portion and the second portion of the inductor metal. The isolation film includes a magnetic material, such as a magnetic film.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: November 17, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Xia Li, Matthew Nowak, Seung H. Kang, Brian Matthew Henderson
  • Patent number: 8988130
    Abstract: An apparatus includes a first die having a first bus, a second die having a second bus stacked on the first die, a plurality of through silicon vias connecting the first bus to the second bus, and first control logic for sending data to identified ones of the plurality of through silicon vias. Also, optionally, second control logic for determining a first set of the plurality of through silicon vias that are nonfunctional, wherein the second control logic is configured to send information to the first control logic identifying the first set of the plurality of through silicon vias or identifying a second set of through silicon vias that are functional. Also a method of sending signals through a plurality of through silicon vias.
    Type: Grant
    Filed: May 20, 2009
    Date of Patent: March 24, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Jonghae Kim, Feng Wang, Matthew Nowak
  • Patent number: 8889431
    Abstract: Magnetic tunnel junctions (MTJs) and methods of forming same are disclosed. A pinned layer is disposed in the MTJ such that a free layer of the MTJ can couple to a drain of an access transistor when provided in a magnetic random access memory (MRAM) bitcell. This structure alters the write current flow direction to align the write current characteristics of the MTJ with write current supply capability of an MRAM bitcell employing the MTJ. As a result, more write current can be provided to switch the MTJ from a parallel (P) to anti-parallel (AP) state. An anti-ferromagnetic material (AFM) layer is provided on the pinned layer to fix pinned layer magnetization. To provide enough area for depositing the AFM layer to secure pinned layer magnetization, a pinned layer having a pinned layer surface area greater than a free layer surface area of the free layer is provided.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: November 18, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Xiaochun Zhu, Matthew Nowak, Xia Li, Seung H. Kang
  • Publication number: 20140306349
    Abstract: Some implementations provide an interposer that includes a substrate, a via in the substrate, and an oxidation layer. The via includes a metal material. The oxidation layer is between the via and the substrate. In some implementations, the substrate is a silicon substrate. In some implementations, the oxidation layer is a thermal oxide formed by exposing the substrate to heat. In some implementations, the oxidation layer is configured to provide electrical insulation between the via and the substrate. In some implementations, the interposer also includes an insulation layer. In some implementations, the insulation layer is a polymer layer. In some implementations, the interposer also includes at least one interconnect on the surface of the interposer. The at least one interconnect is positioned on the surface of the interposer such that the oxidation layer is between the interconnect and the substrate.
    Type: Application
    Filed: April 11, 2013
    Publication date: October 16, 2014
    Applicant: QUALCOMM Incorporated
    Inventors: Shiqun Gu, Urmi Ray, Roawen Chen, Brian Matthew Henderson, Ratibor Radojcic, Matthew Nowak, Nicholas Yu
  • Patent number: 8847360
    Abstract: An electrostatic discharge (ESD) protection device is fabricated in a vertical space between active layers of stacked semiconductor dies thereby utilizing space that would otherwise be used only for communication purposes. The vertical surface area of the through silicon vias (TSVs) is used for absorbing large voltages resulting from ESD events. In one embodiment, an ESD diode is created in a vertical TSV between active layers of the semiconductor dies of a stacked device. This ESD diode can be shared by circuitry on both semiconductor dies of the stack thereby saving space and reducing die area required by ESD protection circuitry.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: September 30, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Kenneth Kaskoun, Shiqun Gu, Matthew Nowak
  • Patent number: 8618670
    Abstract: A system and method prevent corrosive elements (or at least the oxidizing agent) from making contact with metal connections at the interface between two layers of a stacked IC device. When layers are positioned in proximity to each other, a cavity is formed at the boundary of the planar surfaces of the layers. This cavity is bounded by a peripheral seal between the layers. In one embodiment, a vacuum is created within the cavity thereby reducing the corrosive atmosphere within the cavity. In another embodiment, the cavity is filled with an inert gas, such as argon. Once the cavity has oxidizing elements reduced, the peripheral seal can be encapsulated to prevent seepage of contaminants into the cavity.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: December 31, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Shiqun Gu, Matthew Nowak
  • Patent number: 8598700
    Abstract: Thermal conductivity in a stacked IC device can be improved by constructing one or more active temperature control devices within the stacked IC device. In one embodiment, the control devices are thermal electric (TE) devices, such as Peltier devices. The TE devices can then be selectively controlled to remove or add heat, as necessary, to maintain the stacked IC device within a defined temperature range. The active temperature control elements can be P-N junctions created in the stacked IC device and can serve to move the heat laterally and/or vertically, as desired.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: December 3, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Shiqun Gu, Matthew Nowak, Thomas R. Toms
  • Patent number: 8508301
    Abstract: A three dimensional on-chip radio frequency amplifier is disclosed that includes first and second transformers and a first transistor. The first transformer includes first and second inductively coupled inductors. The second transformer includes third and fourth inductively coupled inductors. Each inductor includes multiple first segments in a first metal layer; multiple second segments in a second metal layer; first and second inputs, and multiple through vias coupling the first and second segments to form a continuous path between the first and second inputs. The first input of the first inductor is coupled to an amplifier input; the first input of the second inductor is coupled to the first transistor gate; the first input of the third inductor is coupled to the first transistor drain, the first input of the fourth inductor is coupled to an amplifier output. The second inductor inputs and the first transistor source are coupled to ground.
    Type: Grant
    Filed: November 11, 2011
    Date of Patent: August 13, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Jonghae Kim, Shiqun Gu, Brian Matthew Henderson, Thomas R. Toms, Lew G. Chua-Eoan, Seyfollah S. Bazarjani, Matthew Nowak
  • Patent number: 8502373
    Abstract: By filling an air gap between tiers of a stacked IC device with a thermally conductive material, heat generated at one or more locations within one of the tiers can be laterally displaced. The lateral displacement of the heat can be along the full length of the tier and the thermal material can be electrically insulating. Through silicon-vias (TSVs) can be constructed at certain locations to assist in heat dissipation away from thermally troubled locations.
    Type: Grant
    Filed: May 5, 2008
    Date of Patent: August 6, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Kenneth Kaskoun, Shiqun Gu, Matthew Nowak
  • Patent number: 8483997
    Abstract: A computer program product estimates performance of a back end of line (BEOL) structure of a semiconductor integrated circuit (IC). Code executes on a computer to dynamically predict an electrical resistance of the BEOL structure based on input data specific to multiple layers of the BEOL structure. The BEOL structure can be a contact or a via. The layers of the contact/via include an inner filling material and an outer liner. The code accounts for a width scatter effect of the inner filling material, as well as a slope profile of the contact/via.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: July 9, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Xia Li, Wei Zhao, David Bang, Yu Cao, Seung H. Kang, Matthew Nowak
  • Patent number: 8471643
    Abstract: Electromechanical systems resonator structures, devices, circuits, and systems are disclosed. In one aspect, an oscillator includes an active component and a passive component connected in a feedback configuration. The passive component includes one or more contour mode resonators (CMR). A CMR includes a piezoelectric layer disposed between a first conductive layer and a second conductive layer. The conductive layers include an input electrode and an output electrode. The passive component is configured to output a first resonant frequency and a second resonant frequency, which is an odd integer harmonic of the first resonant frequency. The active component is configured to output a signal including the first resonant frequency and the second resonant frequency. This output signal can be a substantially square wave signal, which can serve as a clock in various applications.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: June 25, 2013
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventors: Jonghae Kim, Je-Hsiung Lan, Changhan Yun, Chi Shun Lo, Matthew Nowak
  • Patent number: 8429577
    Abstract: A computer program product estimates performance of an interconnect structure of a semiconductor integrated circuit (IC). The program product includes code executing on a computer to calculate at least one electrical characteristic of the interconnect structure based on input data accounting for multiple layers of the interconnect structure. The electrical characteristics can be capacitance, resistance, and/or inductance. The capacitance may be based upon multiple components, including a fringe capacitance component, a terminal capacitance component, and a coupling capacitance component.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: April 23, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Xia Li, Wei Zhao, Yu Cao, Shiqun Gu, Seung H. Kang, Matthew Nowak
  • Patent number: 8350639
    Abstract: Methods and apparatuses for transformer signal coupling for flip-chip circuit assemblies are presented. A device for coupling dies in flip-chip circuit assembly may include a first die associated with a first fabrication process and a first inductor physically coupled to the first die, where the first inductor receives an RF input signal. The device may further include a second die associated with a second fabrication process, and a second inductor physically coupled to the second die, where the second inductor is positioned so the first inductor can inductively couple the RF signal in the second inductor. A method for providing an inductive coupling between dies may include fabricating a first inductor on a first die using a passive process, fabricating a second inductor on a second die using a semiconductor process, and assembling each die so the first and second inductor are configured as a transformer.
    Type: Grant
    Filed: August 26, 2009
    Date of Patent: January 8, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Jonghae Kim, Feng Wang, Matthew Nowak