Patents by Inventor Matthew S. Doyle
Matthew S. Doyle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11765825Abstract: In an example, an article of manufacture includes a composite material. The composite material includes hollow glass filaments that are encapsulated within a polymeric matrix material. The hollow glass filaments are at least partially filled with the polymeric matrix material.Type: GrantFiled: January 2, 2019Date of Patent: September 19, 2023Assignee: International Business Machines CorporationInventors: Matthew S. Doyle, Joseph Kuczynski, Timothy J. Tofil
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Patent number: 11412612Abstract: Methods and structures are provided for implementing embedded wire repair for printed circuit board (PCB) constructs. A repair wire layer is provided within the PCB stack with reference planes on opposite sides of the repair wire layer. When a repair connection is required, an appropriate plated through hole (PTH) is drilled to form the repair connection using the repair wire layer.Type: GrantFiled: July 11, 2019Date of Patent: August 9, 2022Assignee: International Business Machines CorporationInventors: Samuel Connor, Stuart B. Benefield, Matthew S. Doyle, Joseph Kuczynski, Jonathan Jackson
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Patent number: 11300605Abstract: The present disclosure describes printed circuit board performance evaluation techniques. In some cases, a printed circuit board performance evaluation process may include determining a first set of electrical properties associated with an interface between components of a printed circuit board, where the interface is disposed on an internal or external layer of the printed circuit board. After selective application of a sheet of dielectric material to a portion of a transmission line in the interface, a second set of electrical properties associated with the interface may be determined. The first set of electrical properties may be compared to the second set of electrical properties to evaluate printed circuit board performance. In other cases, the interface may include a trace inductor, and electrical properties of the interface before and after application of a ferrous material may be compared to evaluate printed circuit board performance.Type: GrantFiled: May 22, 2018Date of Patent: April 12, 2022Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Layne A. Berge, Matthew S. Doyle, Manuel Orozco, John R. Dangler, Thomas W. Liang, Jason J. Bjorgaard
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Patent number: 11235625Abstract: A method, system and computer program product are provided for implementing tire tread depth and wear patterns monitoring. A radio frequency identification (RFID) tag is provided with an associated tire to be monitored. A dipole antenna structure is coupled to the RFID tag and routed within a position in the tire tread and routed substantially circumferentially in the associated tire. A resonant frequency of the dipole antenna structure is detected to monitor tire tread wear.Type: GrantFiled: October 29, 2018Date of Patent: February 1, 2022Assignee: International Business Machines CorporationInventors: Matthew S. Doyle, Layne A. Berge, Jason J. Bjorgaard, John R. Dangler, Thomas W. Liang, Manuel Orozco
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Patent number: 11205016Abstract: An optical electromagnetic radiation (EM) emitter and receiver are located upon a printed circuit board (PCB) layer and are optically connected to an optical security pathway that is between a pair of signal traces. A predetermined reference flux is determined, the reference flux being the expected EM transmitted by the optical security pathway and received by the receiver. When the PCB is subject to an unauthorized access thereof (e.g., drilled, sawed, cut, etc.), the optical EM transferred by optical security pathway is altered. An optical monitoring device that monitors the flux of the optical EM received by the receiver detects a change in flux, in relation to the reference flux, and passes a tamper signal to one or more computer system devices to respond to the unauthorized access. For example, one or more cryptographic adapter card or computer system functions or secured crypto components may be disabled.Type: GrantFiled: May 30, 2019Date of Patent: December 21, 2021Assignee: International Business Machines CorporationInventors: Layne A. Berge, John R. Dangler, Matthew S. Doyle, Thomas W. Liang, Manuel Orozco
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Patent number: 11181549Abstract: A method of probing printed circuit boards that includes providing a circuit board design including a plurality of probe points, and selecting a probe point including a location ink from the plurality of probe points in the circuit board design to be probed on a physical printed circuit board design. The method continues with probing at least one probe point of the plurality of probe points with a probe that activates the location ink. Activation of the location ink by the probe indicates the selected probe point including the locating ink.Type: GrantFiled: June 7, 2019Date of Patent: November 23, 2021Assignee: International Business Machines CorporationInventors: Jason T. Albert, Matthew S. Doyle, Christopher J. Engel, Kahn C. Evans, Steven B. Janssen, Matt K. Light
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Patent number: 11177595Abstract: Disclosed aspects relate to connector structures and a card. A first connector structure is to join a first subset of a set of electrical connections. A second connector structure is to join a second subset of the set of electrical connections. The card manages the set of electrical connections and is located between the first and second connector structures to connect with the first and second connector structures.Type: GrantFiled: August 29, 2019Date of Patent: November 16, 2021Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson, Mark O. Maxson
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Patent number: 11080222Abstract: An optical electromagnetic radiation (EM) emitter and receiver are located upon a printed circuit board (PCB) glass security layer. A predetermined reference flux or interference pattern, respectively, is an expected flux or reflection pattern of EM emitted from the EM emitter, transmitted by the glass security layer, and received by the EM receiver. When the PCB is subject to an unauthorized access thereof the optical EM transmitted by glass security layer is altered. An optical monitoring device that monitors the flux or interference pattern of the optical EM received by the EM receiver detects a change in flux or interference pattern, in relation to the reference flux or reference interference pattern, respectively, and passes a tamper signal to one or more computer system devices to respond to the unauthorized access. For example, one or more cryptographic adapter card or computer system functions or secured crypto components may be disabled.Type: GrantFiled: January 4, 2018Date of Patent: August 3, 2021Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson, Mark O. Maxson
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Patent number: 11061846Abstract: A security matrix layer between a first and second conductive shorting layers are located within a printed circuit board (PCB). The security matrix layer includes at least two types of microcapsules with each type of microcapsule containing a different reactant. When the security matrix layer is accessed, drilled, or otherwise damaged, the microcapsules rupture and the reactants react to form at least an electrically conductive material. The electrically conductive material may contact and short the first and second conductive shorting layers.Type: GrantFiled: December 5, 2018Date of Patent: July 13, 2021Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Joseph Kuczynski, Timothy J. Tofil
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Patent number: 11064616Abstract: A method and structure are provided for implementing stub-less printed circuit board (PCB) vias and custom interconnect through laser-excitation conductive track structures. Stub-less printed PCB vias are formed which terminate at desired signal layers by controlled laser excitation without stubs or the need to back-drill to remove such stubs.Type: GrantFiled: April 24, 2019Date of Patent: July 13, 2021Assignee: International Business Machines CorporationInventors: Layne A. Berge, John R. Dangler, Matthew S. Doyle, Joseph Kuczynski, Thomas W. Liang, Manuel Orozco
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Patent number: 11017124Abstract: An optical electromagnetic radiation (EM) emitter and receiver are located upon a printed circuit board (PCB) layer and are connected to an optical security pathway. A predetermined reference flux is determined, the reference flux being the expected EM transmitted by the optical security pathway and received by the receiver. When the PCB is subject to an unauthorized access thereof (e.g., drilled, sawed, cut, etc.), the optical EM transferred by optical security pathway is altered. An optical monitoring device that monitors the flux of the optical EM received by the receiver detects a change in flux, in relation to the reference flux, and passes a tamper signal to one or more computer system devices to respond to the unauthorized access. For example, one or more cryptographic adapter card or computer system functions or secured crypto components may be disabled.Type: GrantFiled: May 30, 2019Date of Patent: May 25, 2021Assignee: International Business Machines CorporationInventors: Layne A. Berge, John R. Dangler, Matthew S. Doyle, Thomas W. Liang, Manuel Orozco
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Patent number: 10832497Abstract: A process of evaluating performance of a positive crankcase ventilation (PCV) valve is disclosed. The process includes utilizing an optical sensor coupled to the PCV valve to collect baseline valve position data during a calibration phase. The baseline valve position data represents satisfactory PCV valve performance. The process also includes utilizing the optical sensor to collect operational valve position data during an operational phase. The process further includes determining whether a deviation of the operational valve position data from the baseline valve position data satisfies a performance threshold associated with unsatisfactory PCV valve performance. When the deviation satisfies the performance threshold, the process includes communicating an error code to an alert indicator.Type: GrantFiled: April 4, 2018Date of Patent: November 10, 2020Assignee: International Business Machines CorporationInventors: Matthew S. Doyle, Joseph Kuczynski, Jeffrey N. Judd, Timothy J. Tofil
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Patent number: 10834829Abstract: Embodiments herein describe a variable inductor containing a capillary. The capillary includes an eutectic conductive liquid (e.g., EGaIn) containing suspended magnetic particles and an electrolyte (e.g., NaOH). In one embodiment, the variable inductor has a pair of electrodes (e.g., negative and positive electrodes) at the respective ends of the capillary to seal the eutectic conductive liquid and the electrolyte. The variable inductor also includes an inductor coil disposed around the capillary, and the inductor coil is connected to a circuit and provides inductance for the connected circuit. Using a DC voltage between the pair of electrodes, the eutectic conductive liquid can extend inside the capillary, which in turn, causes the variable inductor to have a desired inductance.Type: GrantFiled: August 26, 2019Date of Patent: November 10, 2020Assignee: International Business Machines CorporationInventors: Stuart B. Benefield, Samuel R. Connor, Matthew S. Doyle
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Patent number: 10834830Abstract: Creating in-via routing with a light pipe is disclosed. A resist layer is applied over a layer of conductive material provided in a via. A light pipe is inserted into the via. The surface of the light pipe includes at least one masked portion and at least one unmasked portion. A portion of the resist layer is exposed with light emitted from the unmasked portions of the light pipe. Portions of the conductive layer corresponding to the exposed portion of the resist layer are then removed to create the in-via routing.Type: GrantFiled: February 13, 2019Date of Patent: November 10, 2020Assignee: International Business Machines CorporationInventors: Mark J. Jeanson, Darryl Becker, Gerald Bartley, Matthew S. Doyle
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Patent number: 10831909Abstract: In an example, an apparatus includes a biological analysis component and a control component. The biological analysis component is configured to obtain an expected biological sample value. The expected biological sample value indicates an expected concentration of a material biologically processed by a courier. The biological analysis component is further configured to determine whether a measured biological sample value is associated with the courier based on a comparison of the expected biological sample value to the measured biological sample value. The control component is configured to perform a first set of operations based on the result of the comparison indicating that the measured biological sample value is associated with the courier. The control component is configured to perform a second set of operations based on the result of the comparison indicating that the measured biological sample value is outside an acceptable range of the biological sample value.Type: GrantFiled: June 9, 2015Date of Patent: November 10, 2020Assignee: International Business Machines CorporationInventors: Matthew S. Doyle, Joseph Kuczynski, Kevin A. Splittstoesser, Timothy J. Tofil
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Patent number: 10806026Abstract: A fusible via is disclosed. The fusible via includes an upper contact. The fusible via further includes a handle portion having a first end and a second end. The upper contact is disposed on the first end of the handle portion. The handle portion comprises an alloy and a blowing agent. The alloy melts above a predefined solder reflow temperature but below a thermal degradation temperature of the blowing agent. The fusible via further includes a lower contact disposed on the second end of the handle portion.Type: GrantFiled: September 9, 2019Date of Patent: October 13, 2020Assignee: International Business Machines CorporationInventors: Matthew S. Doyle, Joseph Kuczynski, Jeffrey N. Judd, Scott D. Strand, Timothy J. Tofil
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Patent number: 10798829Abstract: A method and structure are provided for implementing enhanced via creation without creating a via barrel stub. The need to backdrill vias during printed circuit board (PCB) manufacturing is eliminated. After the vias have been drilled, but before plating, a plug is inserted into each via and the plug is lowered to a depth just below a desired signal trace layer. A thin anti-electroplate coating is applied onto the walls of the via below the signal trace. Then the plugs are removed and a standard board plating process for the PCB is performed.Type: GrantFiled: November 22, 2017Date of Patent: October 6, 2020Assignee: International Business Machines CorporationInventors: Matthew S. Doyle, Joseph Kuczynski, Phillip V. Mann, Kevin M. O'Connell
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Patent number: 10750623Abstract: A method and associated apparatus are disclosed for forming a conductive via that extends partly through a multi-layer assembly, wherein the method comprises forming a cavity from a surface of the multi-layer assembly to a first depth. The cavity extends through a plurality of layers of the multi-layer assembly. The plurality of layers comprises a healing layer comprising a plurality of microcapsules. Forming the cavity ruptures some of the plurality of microcapsules to release encapsulated material into the cavity. The released encapsulated material defines a second depth from the surface, the second depth being closer to the surface than the first depth. The method further comprises depositing conductive material within the cavity to form the conductive via that extends to the second depth.Type: GrantFiled: May 12, 2017Date of Patent: August 18, 2020Assignee: International Business Machines CorporationInventors: Matthew S. Doyle, Joseph Kuczynski, Phillip V. Mann, Kevin M. O'Connell
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Publication number: 20200260594Abstract: Creating in-via routing with a light pipe is disclosed. A resist layer is applied over a layer of conductive material provided in a via. A light pipe is inserted into the via. The surface of the light pipe includes at least one masked portion and at least one unmasked portion. A portion of the resist layer is exposed with light emitted from the unmasked portions of the light pipe. Portions of the conductive layer corresponding to the exposed portion of the resist layer are then removed to create the in-via routing.Type: ApplicationFiled: February 13, 2019Publication date: August 13, 2020Inventors: MARK J. JEANSON, DARRYL BECKER, GERALD BARTLEY, MATTHEW S. DOYLE
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Patent number: 10715337Abstract: A conductor on glass security layer may be located within a printed circuit board (PCB) of a crypto adapter card or within a daughter card upon the crypto adapter card. The conductor on glass security layer includes a glass dielectric layer that remains intact in the absence of point force loading and shatters when a point load punctures or otherwise contacts the glass dielectric layer. The conductor on glass security layer also includes a conductive security trace upon the glass dielectric layer. A physical access attempt shatters a majority of the glass dielectric layer, which in turn fractures the security trace. A monitoring circuit that monitors the resistance of the conductive security trace detects the resultant open circuit or change in security trace resistance and initiates a tamper signal that which may be received by one or more computer system devices to respond to the unauthorized attempt of physical access.Type: GrantFiled: November 13, 2017Date of Patent: July 14, 2020Assignee: International Business Machines CorporationInventors: Gerald K. Bartley, Darryl J. Becker, Matthew S. Doyle, Mark J. Jeanson, Mark O. Maxson