Abstract: A method of demodulating multi-standard TV signals consists of providing a plurality of signals at a frequency which is a multiple of a reference frequency whose value is a common submultiple of the frequencies of the multi-standard signals. Thereafter, the signal to be demodulated is multiplied by one of said plural signals having a frequency which differs therefrom by a value equal to the reference frequency; by filtering the result of the multiplication, a signal is obtained at the reference frequency but corresponding in amplitude to the one to be demodulated.

Abstract: A temperature independent, dynamically compressed, DC control voltage is obtained by converting by means of a converter circuit employing a current mirror, a linear variation of the voltage across a control potentiometer, external to the integrated circuit, in a logarithmic differential voltage between two output voltage terminals, respectively on a first and a second branch of the converter circuit, the voltage signal taken from the first branch of the converter circuit being fed to the input of a unitary gain stage biased by a current generator with a temperature coefficient corresponding to the reciprocal of the temperature coefficient of integrated resistances and the corresponding output signal of the unitary gain stage being fed to a first input of a differential stage, to the second input of which is fed the signal taken from the second branch of the converter circuit.

Abstract: A method, and related device, for automatically selecting the demodulation standard of a video signal, useful with an intermediate frequency demodulator, which has an output for the demodulated signal and a so-called standard selecting input pin, consists of detecting the polarity of the demodulated signal at the output of the demodulator and comparing that polarity with the polarity of the input signal to the demodulator. The voltage value on the standard selecting pin is changed over on detecting a different modulation polarity between the input and output video signals to/from the demodulator to enable the latter to operate to the correct standard at all times.

Abstract: A voltage-controlled variable oscillator, in particular for phase-lock loops, comprising a differential stage formed by a pair of transistors and collectors whereof define the output terminals between which an external resonating circuit is connected, a voltage generator which is connected between the two output terminals and is suitable for generating a voltage which is proportional to the terminal voltage which exists across the resonating circuit, and a pair of capacitors connected between a respective output terminal and the voltage source.

Abstract: This variable-current source comprises a differential stage and a pair of voltage buffers which respectively receive, at the input, a variable input voltage and a reference voltage and are connected at the output to the differential stage. Both buffers comprise a resistor flown by a current which varies only as a function of the respective input voltage and of its resistance and therefore depends thermally exclusively on this resistance, and provide output voltages which depend upon these currents, so that the output current generated by the differential stage is temperature-independent.

Abstract: During an automatic search scan of a broacasting station of a video receiver's tuner, the AFC signal generated by an existing automatic frequency control circuit of the receiver is applied to an input of four comparators. A first, switched threshold comparator commutes when the AFC signal is greater than the two switched threshold valuesVA'<AFC>VA";and enables a second comparator with a fixed threshold V1 comprised between the two switched threshold values of the first comparator. When the second comparator commutes causes the generation by an output buffer of a signal suitable for arresting the automatic search scan having thus detected on the AFC characteristic the presence of a carrier.

Abstract: A device for minimizing parasitic junction capacitances in an isolated collector vertical PNP transistor, having a terminal N connected to an epitaxial n layer, comprises a bootstrap circuit including an emitter follower vertical PNP transistor having its emitter and base respectively connected to the terminal of the epitaxial n layer and the collector of the isolated collector transistor; further, a bias resistance is connected between the emitter and one pole of a voltage supply to the emitter follower.

Abstract: Described is an improved NPN equivalent structure with a breakdown voltage higher than the intrinsic breakdown voltage of the NPN transistor utilizing a complementary PNP transistor and a JFET transistor with the gate connected to ground, the drain connected to the base of the PNP and the source connected to the collectors of the complementary pair. An integrated form of the structure is particularly advantageous and the equivalent NPN transistor is substantially exempt from Early effect and has improved output current capacity.