Patents by Inventor Michael J. Cadigan, Jr.

Michael J. Cadigan, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120300790
    Abstract: The method includes creating a master copy of a header for all packets of a data transmission event, the master copy including a plurality of intact constant header information, the plurality of intact constant header information being constant for all packets of the data transmission event, storing unique header information for all packets of the data transmission event, the unique header information including information unique to at least one packet of the data transmission event, tokenizing identities of each packet of the data transmission event to create a tokenized packet ID for each packet, and indexing the stored unique header information based on the tokenizing. A computer program product for directing a computer processor to perform a method. According to the method, at packet read-time, unique header information associated with the packet is overlayed onto the master copy to create a unique packet.
    Type: Application
    Filed: May 27, 2011
    Publication date: November 29, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael J. Cadigan, JR., Nihad Hadzic, Jeffrey M. Turner, Raymond Wong
  • Publication number: 20120020214
    Abstract: A method, computer program product, and device are provided for transparent separation of traffic. A communication interface is configured to transmit and receive traffic over a network. A stack is configured to dynamically identify the traffic as interactive traffic and non-interactive traffic. When the stack identifies the non-interactive traffic, the stack is configured to move the non-interactive traffic to a non-interactive queue.
    Type: Application
    Filed: July 22, 2010
    Publication date: January 26, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Patrick G. Brown, Michael J. Cadigan, JR., Thomas D. Moore, Bruce H. Ratcliff, Jerry W. Stevens, Jeffrey M. Turner
  • Patent number: 7843919
    Abstract: A method of Ethernet virtualization using network packet alteration. The method comprises receiving network packets from a host destined for transmission over a network, checking whether the network packets have headers, if the packets do not have headers, forming a first portion of the header using firmware, storing the formed packet and header to a first memory; and forming a second portion of the header using programmable logic.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: November 30, 2010
    Assignee: International Business Machines Corporation
    Inventors: Michael J. Cadigan, Jr., Joel Goldman, Howard M. Haynie, Bruce H. Ratcliff, Jeffrey M. Turner
  • Patent number: 7836198
    Abstract: A method of Ethernet virtualization using hardware control flow override. The method comprises providing, at a first logical entity of a first programmable logic device, control signals used for performing control-flow, selectively routing the control signals to a second programmable logic device that is external to the first programmable logic device, receiving processed control signals from the second programmable logic device, and forwarding the processed control signals to a second logic entity of the first programmable logic device.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: November 16, 2010
    Assignee: International Business Machines Corporation
    Inventors: Michael J. Cadigan, Jr., Howard M. Haynie, Jeffrey M. Turner
  • Patent number: 7823108
    Abstract: An integrated circuit chip is made using Genie, a described computer chip design tool which can analyze the data contained within an entire endpoint report, compute relationships between paths based on shared segments, and display this information graphically to the designer. Specifically, Genie groups failing paths into Timing Islands. A timing island is a group of paths which contain at least one shared segment. The most frequently shared segment is sifted to the top of the priority list for each island, and is labeled as the Hub. Thinking of timing islands as a tree, the hub of the island would be the trunk. If you chop the tree down by the trunk, all of the branches, limbs and twigs will fall down too. This is analogous to fixing the timing failures in the hub, and the fix trickling out to each of the segments that dangle off the hub.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: October 26, 2010
    Assignee: International Business Machines Corporation
    Inventors: James J. Curtin, Michael J. Cadigan, Jr., Edward J. Hughes, Kevin M. Mcllvain, Jose L. Neves, Ray Raphy, Douglas S. Search
  • Patent number: 7814182
    Abstract: A method of Ethernet virtualization using automatic self-configuration of logic of a data router. The method comprising maintaining control parameters at a master device, accessing, by a slave device, the control parameters at the master devices, and configuring the slave device based on the accessed control parameters.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: October 12, 2010
    Assignee: International Business Machines Corporation
    Inventors: Michael J. Cadigan, Jr., Howard M. Haynie, Jeffrey M. Turner
  • Publication number: 20090238190
    Abstract: A method of Ethernet virtualization using network packet alteration. The method comprises receiving network packets from a host destined for transmission over a network, checking whether the network packets have headers, if the packets do not have headers, forming a first portion of the header using firmware, storing the formed packet and header to a first memory; and forming a second portion of the header using programmable logic.
    Type: Application
    Filed: March 20, 2008
    Publication date: September 24, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael J. Cadigan, JR., Joel Goldman, Howard M. Haynie, Bruce H. Ratcliff, Jeffrey M. Turner
  • Publication number: 20090240788
    Abstract: A method of Ethernet virtualization using automatic self-configuration of logic of a data router. The method comprising maintaining control parameters at a master device, accessing, by a slave device, the control parameters at the master devices, and configuring the slave device based on the accessed control parameters.
    Type: Application
    Filed: March 20, 2008
    Publication date: September 24, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael J. Cadigan, JR., Howard M. Haynie, Jeffrey M. Turner
  • Publication number: 20090240346
    Abstract: A method of Ethernet virtualization using hardware control flow override. The method comprises providing, at a first logical entity of a first programmable logic device, control signals used for performing control-flow, selectively routing the control signals to a second programmable logic device that is external to the first programmable logic device, receiving processed control signals from the second programmable logic device, and forwarding the processed control signals to a second logic entity of the first programmable logic device.
    Type: Application
    Filed: March 20, 2008
    Publication date: September 24, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael J. Cadigan, JR., Howard M. Haynie, Jeffrey M. Turner
  • Publication number: 20090238197
    Abstract: A method for Ethernet virtualization using assisted frame correction. The method comprises receiving at a host adapter data packets from a network, storing the received data packets in host memory, storing the received data packets in a hardware queue located on the host adapter, setting a status indicator reflecting the status of the data packets based on results of the checking, and sending the status indicator to the host memory.
    Type: Application
    Filed: March 20, 2008
    Publication date: September 24, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael J. Cadigan, JR., Jeffrey M. Turner, Stephen R. Valley
  • Patent number: 7356793
    Abstract: Genie is a described computer chip design tool which can analyze the data contained within an entire endpoint report, compute relationships between paths based on shared segments, and display this information graphically to the designer. Specifically, Genie groups failing paths into Timing Islands. A timing island is a group of paths which contain at least one shared segment. The most frequently shared segment is sifted to the top of the priority list for each island, and is labeled as the Hub. Thinking of timing islands as a tree, the hub of the island would be the trunk. If you chop the tree down by the trunk, all of the branches, limbs and twigs will fall down too. This is analogous to fixing the timing failures in the hub, and the fix trickling out to each of the segments that dangle off the hub.
    Type: Grant
    Filed: May 16, 2005
    Date of Patent: April 8, 2008
    Assignee: International Business Machines Corporation
    Inventors: James J. Curtin, Michael J. Cadigan, Jr., Edward J. Hughes, Kevin M. McIlvain, Jose L. Neves, Ray Raphy, Douglas S. Search