Patents by Inventor Michael K. Wong
Michael K. Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20090083392Abstract: A server interconnect system for sending data includes a first server node and a second server node. Each server node is operable to send and receive data. The interconnect system also includes a first and second interface unit. The first interface unit is in communication with the first server node and has one or more RDMA doorbell registers. Similarly, the second interface unit is in communication with the second server node and has one or more RDMA doorbell registers. The system also includes a communication switch that is operable to receive and route data from the first or second server nodes using a RDMA read and/or an RDMA write when either of the first or second RDMA doorbell registers indicates that data is ready to be sent or received.Type: ApplicationFiled: September 25, 2007Publication date: March 26, 2009Applicant: Sun Microsystems, Inc.Inventors: Michael K. Wong, Rabin A. Sugumar, Stephen E. Phillips, Hugh Kurth, Suraj Sudhir, Jochen Behrens
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Patent number: 7507767Abstract: There are disclosed compounds of the formula a prodrug thereof, or a pharmaceutically acceptable salt, solvate or stereoisomer of the compound or of said prodrug; which exhibit anti-inflammatory and immunodulatory activity. Also disclosed are pharmaceutical compositions containing said compounds and methods of using the compounds for the treatment of various diseases and conditions.Type: GrantFiled: February 6, 2002Date of Patent: March 24, 2009Assignee: Schering CorporationInventors: Joseph A. Kozlowski, Neng-Yang Shih, Brian J. Lavey, Razia K. Rizvi, Bandarpalle B. Shankar, James M. Spitler, Ling Tong, Ronald L. Wolin, Michael K. Wong
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Patent number: 7392399Abstract: A method and system of processing a cryptographic packet includes receiving a first cryptographic packet in a host CPU. A first set of data required to execute the first cryptographic packet is identified. The first cryptographic packet and the required first set of data is transferred to a cryptographic co-processor. The first cryptographic packet is executed in the cryptographic co-processor. The host CPU is notified that the execution of the first cryptographic packet is complete. The executed first cryptographic packet is received in the host CPU.Type: GrantFiled: May 5, 2003Date of Patent: June 24, 2008Assignee: Sun Microsystems, Inc.Inventors: Gregory F. Grohoski, Paul J. Jordan, Michael K. Wong, Leslie D. Kohn
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Patent number: 7248585Abstract: In one embodiment, a method for efficiently classifying packets for a multi-processor/mutli-thread environment is provided. The method initiates with receiving a packet. Then, header information is extracted form the received packet. Next, a first hash value is calculated. Then, a field of interest in a lookup table is determined from the first hash value. Next, a second hash value is calculated. Then, the second hash value is compared to stored hash values in the field of interest of the lookup table to determine a match between the second hash value and one of the values in the field of interest of the lookup table. If there is a match, the received packet is transmitted to a processor corresponding to the one of the values in the row location of the lookup table. A network interface card and a system for efficiently classifying packets in a multicore/multithread environment are also provided.Type: GrantFiled: October 16, 2002Date of Patent: July 24, 2007Assignee: Sun Microsystems, Inc.Inventors: Leslie D. Kohn, Michael K. Wong
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Patent number: 7209996Abstract: In one embodiment, a processor is provided. The processor includes at least two cores, where each of the cores include a first level cache memory. Each of the cores are multi-threaded. In another embodiment, each of the cores includes four threads. In another embodiment a crossbar is included. A plurality of cache bank memories in communication with the at cores through the crossbar is provided. Each of the plurality of cache bank memories are in communication with a main memory interface. In another embodiment a buffer switch core in communication with each of the plurality of cache bank memories is also included. A server and a method for optimizing the utilization of a multithreaded processor core are also provided.Type: GrantFiled: October 16, 2002Date of Patent: April 24, 2007Assignee: Sun Microsystems, Inc.Inventors: Leslie D. Kohn, Kunle A. Olukotun, Michael K. Wong
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Patent number: 7200790Abstract: A microchip configured to reliably transmit data is provided. The microchip includes a memory region and a selection module configured to select a portion of the data from the memory region. An error checking module configured to calculate a value derived from the selected portion of the data is provided. A pointer region including a plurality of object pointers is included. One of the object pointers is associated with an address of the portion of the data. The object pointer associated with the address is configured to receive a signal indicating an error associated with the transmission of the data. A scheduler module in communication with each of the plurality of object pointers is provided. The scheduler module is configured to schedule re-transmission of the selected portion of the data. A system and a method for reliably transmitting data between microchips are also provided.Type: GrantFiled: July 8, 2003Date of Patent: April 3, 2007Assignee: Sun Microsystems, Inc.Inventors: Anup K. Sharma, Michael K. Wong
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Patent number: 7067539Abstract: The invention relates to compounds of the formula a prodrug thereof, or a pharmaceutically acceptable salt, solvate or stereoisomer of the compound or of said prodrug; which exhibit anti-inflammatory and immunodulatory activity. Also disclosed are pharmaceutical compositions containing said compounds and methods of using the compounds for the treatment of various diseases and conditions.Type: GrantFiled: August 7, 2002Date of Patent: June 27, 2006Assignee: Schering CorporationInventors: Joseph A. Kozlowski, Neng-Yang Shih, Brian J. Lavey, Razia K. Rizvi, Bandarpalle B. Shankar, James M. Spitler, Ling Tong, Ronald L. Wolin, Michael K. Wong
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Patent number: 6974791Abstract: Peptide motifs which define specificity of tumor-derived endothelial cells. These peptides possess a charge motif of positive-positive-hydrophobic which is important in determining the specificity of binding to tumor-derived endothelium. The specific molecular peptide motifs will facilitate diverse therapeutic and diagnostic applications including: anti-angiogenic therapies to be used in alone or in conjunction with standard therapies; imaging tools for both detection of very small metastasis that are undetectable by current techniques; for monitoring tumor response; for targeting and directing chemotherapy drugs to the tumor; for treatment of chronic inflammatory diseases such as rheumatoid arthritis and psoriasis, for treating some forms of blindness; as well as other diagnostic and therapeutic applications.Type: GrantFiled: March 16, 2001Date of Patent: December 13, 2005Assignee: The University of PittsburghInventors: Michael K. Wong, Ruth A. Modzelewski, Charles Komen Brown, Candace S. Johnson, Donald L. Trump
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Patent number: 6938119Abstract: A system and method for limiting power consumption of a computer memory system. The system and method includes selecting a memory access rate. The selected memory access rate corresponds to a desired average memory power consumption rate. A first time interval is started as a current time interval. A memory system is accessed. If the memory access rate has not been exceeded, then the access is applied to the memory system. Alternatively, if the memory access rate has been exceeded, then the access is delayed until the current time interval has expired and a subsequent time interval is started as the current time interval and the access is applied to the memory system.Type: GrantFiled: October 18, 2002Date of Patent: August 30, 2005Assignee: Sun Microsystems, Inc.Inventors: Leslie D. Kohn, Kunle A. Olukotun, Michael K. Wong
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Patent number: 6901491Abstract: In one embodiment, a server is provided. The server includes multiple application processor chips. Each of the multiple application processor chips includes multiple processing cores. Multiple memories corresponding to the multiple processor chips are included. The multiple memories are configured such that one processor chip is associated with one memory. A plurality of fabric chips enabling each of the multiple application processor chips to access any of the multiple memories are included. The data associated with one of the multiple application processor chips is stored across each of the multiple memories. In one embodiment, the application processor chips include a remote direct memory access (RDMA) and striping engine. The RDMA and striping engine is configured to store data in a striped manner across the multiple memories. A method for allowing multiple processors to exchange information through horizontal scaling is also provided.Type: GrantFiled: October 16, 2002Date of Patent: May 31, 2005Assignee: Sun Microsystems, Inc.Inventors: Leslie D. Kohn, Michael K. Wong
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Publication number: 20040225885Abstract: A method and system of processing a cryptographic packet includes receiving a first cryptographic packet in a host CPU. A first set of data required to execute the first cryptographic packet is identified. The first cryptographic packet and the required first set of data is transferred to a cryptographic co-processor. The first cryptographic packet is executed in the cryptographic co-processor. The host CPU is notified that the execution of the first cryptographic packet is complete. The executed first cryptographic packet is received in the host CPU.Type: ApplicationFiled: May 5, 2003Publication date: November 11, 2004Applicant: Sun Microsystems, IncInventors: Gregory F. Grohoski, Paul J. Jordan, Michael K. Wong, Leslie D. Kohn
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Patent number: 6721796Abstract: Multi-level buffer system dynamically allocates storage for data units arriving at network gateway, and retrieves stored data units according to hierarchical schedule. Minimum and maximum thresholds associated with system resource and storage availability determine acceptance and storage of data units. Data units are accepted preferably if all threshold criteria are met. Threshold criteria may be determined from reserved minimum buffer length, calculated maximum buffer length, or random early discard-type algorithm applied separately to each buffer level. Optionally, buffer management applies to non-hierarchical storage systems.Type: GrantFiled: July 22, 1999Date of Patent: April 13, 2004Assignee: Cisco Technology, Inc.Inventor: Michael K. Wong
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Publication number: 20030232859Abstract: The invention relates to compounds of the formula 1Type: ApplicationFiled: August 7, 2002Publication date: December 18, 2003Applicant: Schering CorporationInventors: Joseph A. Kozlowski, Neng-Yang Shih, Brian J. Lavey, Razia K. Rizvi, Bandarpalle B. Shankar, James M. Spitler, Ling Tong, Ronald L. Wolin, Michael K. Wong
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Publication number: 20030105907Abstract: A system and method includes a server that includes a processor and a memory system coupled that are coupled to a bus system. A network interface is coupled to the processor and an egress buffer is coupled to the processor and the network interface by an egress bus.Type: ApplicationFiled: October 17, 2002Publication date: June 5, 2003Applicant: Sun Microsystems, Inc.Inventors: Leslie D. Kohn, Michael K. Wong
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Publication number: 20030097518Abstract: In one embodiment, a server is provided. The server includes multiple application processor chips. Each of the multiple application processor chips includes multiple processing cores. Multiple memories corresponding to the multiple processor chips are included. The multiple memories are configured such that one processor chip is associated with one memory. A plurality of fabric chips enabling each of the multiple application processor chips to access any of the multiple memories are included. The data associated with one of the multiple application processor chips is stored across each of the multiple memories. In one embodiment, the application processor chips include a remote direct memory access (RDMA) and striping engine. The RDMA and striping engine is configured to store data in a striped manner across the multiple memories. A method for allowing multiple processors to exchange information through horizontal scaling is also provided.Type: ApplicationFiled: October 16, 2002Publication date: May 22, 2003Applicant: Sun Microsystems, Inc.Inventors: Leslie D. Kohn, Michael K. Wong
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Publication number: 20030096844Abstract: There are disclosed compounds of the formula 1Type: ApplicationFiled: February 6, 2002Publication date: May 22, 2003Applicant: Schering CorporationInventors: Joseph A. Kozlowski, Neng-Yang Shih, Brian J. Lavey, Razia K. Rizvi, Bandarpalle B. Shankar, James M. Spitler, Ling Tong, Ronald L. Wolin, Michael K. Wong
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Publication number: 20030093614Abstract: A system and method for limiting power consumption of a computer memory system. The system and method includes selecting a memory access rate. The selected memory access rate corresponds to a desired average memory power consumption rate. A first time interval is started as a current time interval. A memory system is accessed. If the memory access rate has not been exceeded, then the access is applied to the memory system.Type: ApplicationFiled: October 18, 2002Publication date: May 15, 2003Applicant: SUN MicrosystemsInventors: Leslie D. Kohn, Kunle A. Olukotun, Michael K. Wong
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Publication number: 20030088610Abstract: In one embodiment, a processor is provided. The processor includes at least two cores, where each of the cores include a first level cache memory. Each of the cores are multi-threaded. In another embodiment, each of the cores includes four threads. In another embodiment a crossbar is included. A plurality of cache bank memories in communication with the at cores through the crossbar is provided. Each of the plurality of cache bank memories are in communication with a main memory interface. In another embodiment a buffer switch core in communication with each of the plurality of cache bank memories is also included. A server and a method for optimizing the utilization of a multithreaded processor core are also provided.Type: ApplicationFiled: October 16, 2002Publication date: May 8, 2003Applicant: Sun Microsystems, Inc.Inventors: Leslie D. Kohn, Kunle A. Olukotun, Michael K. Wong
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Publication number: 20030081615Abstract: In one embodiment, a method for efficiently classifying packets for a multi-processor/mutli-thread environment is provided. The method initiates with receiving a packet. Then, header information is extracted form the received packet. Next, a first hash value is calculated. Then, a field of interest in a lookup table is determined from the first hash value. Next, a second hash value is calculated. Then, the second hash value is compared to stored hash values in the field of interest of the lookup table to determine a match between the second hash value and one of the values in the field of interest of the lookup table. If there is a match, the received packet is transmitted to a processor corresponding to the one of the values in the row location of the lookup table. A network interface card and a system for efficiently classifying packets in a multicore/multithread environment are also provided.Type: ApplicationFiled: October 16, 2002Publication date: May 1, 2003Applicant: Sun Microsystems, Inc.Inventors: Leslie D. Kohn, Michael K. Wong
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Publication number: 20020058615Abstract: Peptide motifs which define specificity of tumor-derived endothelial cells. These peptides possess a charge motif of positive-positive-hydrophobic which is important in determining the specificity of binding to tumor-derived endothelium. The specific molecular peptide motifs will facilitate diverse therapeutic and diagnostic applications including: anti-angiogenic therapies to be used in alone or in conjunction with standard therapies; imaging tools for both detection of very small metastasis that are undetectable by current techniques; for monitoring tumor response; for targeting and directing chemotherapy drugs to the tumor; for treatment of chronic inflammatory diseases such as rheumatoid arthritis and psoriasis, for treating some forms of blindness; as well as other diagnostic and therapeutic applications.Type: ApplicationFiled: March 16, 2001Publication date: May 16, 2002Inventors: Michael K. Wong, Ruth A. Modzelewski, Charles Komen Brown, Candace S. Johnson, Donald L. Trump