Abstract: Method for translating a sequence of instructions is disclosed herein. In one embodiment, the method includes recognizing a candidate multi-instruction sequence, determining that the multi-instruction sequence corresponds to a single instruction, and executing the multi-instruction sequence by executing the single instruction.

Abstract: Techniques are disclosed for managing vector element ordering. One technique includes setting one or more control bits that determine a vector element ordering and a vector element numbering, where the one or more control bits are stored in a machine status register or in a page table entry. The vector element ordering includes one of a big-endian mode and a little-endian mode, and the vector element numbering includes one of a big-endian mode and a little-endian mode. The technique includes reading the one or more control bits to determine a big-endian or a little-endian mode for the vector element ordering and for the vector element numbering. The technique also includes performing a vector operation in the determined mode for the vector element ordering and the determined mode for the vector element numbering.

Abstract: Modifying prefetch request processing. A prefetch request is received by a local computer from a remote computer. The local computer responds to a determination that execution of the prefetch request is predicted to cause an address conflict during an execution of a transaction of the local processor by comparing a priority of the prefetch request with a priority of the transaction. Based on a result of the comparison, the local computer modifies program instructions that govern execution of the program instructions included in the prefetch request to include program instruction to perform one or both of: (i) a quiesce of the prefetch request prior to execution of the prefetch request, and (ii) a delay in execution of the prefetch request for a predetermined delay period.

Abstract: In a transactional memory environment including a first processor and one or more additional processors, a computer-implemented method includes identifying a memory location and sending a probe request from the first processor to the additional processors. The probe request includes the memory location. The computer implemented method further includes generating, by each additional processor, an indication including whether the memory location is in use for a transaction by the additional processor. The computer-implemented method further includes sending the indication from each additional processor to the first processor and proceeding, by the first processor, based on the indication.

Abstract: Embodiments relate to using a local entry point with an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler determines and indicates, in the program code, that the function pointer value resulting from a non-call reference of a function symbol is solely used to perform indirect calls in the same module, e.g. local-use-only. A linker or loader can read the indication the compiler made in the program code. The linker or loader use the local entry point associated with the target function if the target function is defined in the same module as the reference and is local-use-only.

Abstract: Embodiments relate to using a local entry point with an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler is provided to identify potential target functions and indicate the potential target functions in the program code. A linker can read the indication the compiler made in the program code. The linker optimizes an indirect call site if the potential target functions are defined in the same module.

Abstract: A method includes receiving, by a controller, a request for a recipe from a user. The method also includes determining, by the controller, at least one characteristic of the user. The method also includes retrieving, by the controller, the recipe from a stored collection of recipes. The method also includes dynamically adapting the recipe based on the at least one characteristic of the user. The recipe is adapted based on a comparison of possible adaptations using a subjective logic model. The method also includes generating output recommendation data that communicates the dynamically adapted recipe to the user.

Abstract: In a transactional memory environment including a first processor and one or more additional processors, a computer-implemented method includes identifying a memory location and sending a probe request from the first processor to the additional processors. The probe request includes the memory location. The computer implemented method further includes generating, by each additional processor, an indication including whether the memory location is in use for a transaction by the additional processor. The computer-implemented method further includes sending the indication from each additional processor to the first processor and proceeding, by the first processor, based on the indication.

Abstract: Embodiments relate to using a local entry point with an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler determines and indicates, in the program code, that the function pointer value resulting from a non-call reference of a function symbol is solely used to perform indirect calls in the same module, e.g. local-use-only. A linker or loader can read the indication the compiler made in the program code. The linker or loader use the local entry point associated with the target function if the target function is defined in the same module as the reference and is local-use-only.

Abstract: A computer system includes transactional memory to implement a nested transaction. The computer system generates a plurality of speculative identification numbers (IDs), identifies at least one of a software thread executed by a hardware processor and a memory operation performed in accordance with an application code. The computer system assigns at least one speculative cache version to a requested transaction based on a corresponding software thread. The speculative ID of the corresponding software thread identifies the speculative cache version. The computer system also identifies a nested transaction in the memory unit, assigns a cache version to the nested transaction, detects a conflict with the nested transaction, determines a conflicted nesting level of the nested transaction, and determines a cache version corresponding to the conflicted nesting level. The computer system also invalidates the cache version corresponding to the conflicted nesting level.

Abstract: An apparatus includes a processor and a virtual address transformation unit coupled with the processor. The virtual address transformation unit includes a register. The virtual address transformation unit is configured to receive an indication of a virtual address and read, from the register, a current page size of a plurality of available page sizes. The virtual address transformation unit is also configured to determine a shift amount based, at least in part, on the current page size and perform a bit shift of the virtual address, wherein the virtual address is bit shifted by, at least, the determined shift amount.

Abstract: Embodiments relate to lightweight interrupts for condition checking. An aspect includes determining, by a condition checker in a computer system, that a condition occurs for an application executing on the computer system. Another aspect includes, based on determining that the condition occurs for the application, determining whether lightweight interrupts are enabled. Yet another aspect includes based on determining that lightweight interrupts are enabled, issuing a lightweight interrupt to the application and handling the instruction by the application.

Abstract: Techniques relate to fingerprint-based processor malfunction detection. A determination is made whether a fingerprint is present in software that is currently executing on the processor of the computer system. The fingerprint includes a representation of a sequence of behavior that occurs on the processor while the software is executing. The fingerprint corresponds to a type of malfunction. In response to determining that the fingerprint is not present in the software currently executing on the processor, monitoring of the software executing on the processor to determine whether the fingerprint is present continues. In response to determining that the fingerprint is present in the software executing on the processor, it is determined that the malfunction has occurred according to a type of the fingerprint that is present.

Abstract: Autonomous recovery from a transient hardware failure by executing portions of a stream of program instructions as a transaction. A start of a transaction is created in a stream of program instructions executing on a first processor of a multi-processor computer. A snapshot of a system state information is saved when the transaction begins. When the transaction ends, store data of the transaction is committed. If a transient hardware failure occurs, the transaction is aborted without notifying the computer software application that initiated the stream of program instructions. The transaction is re-executed on a second processor of the multi-processors, based on the saved snapshot of the system state information.

Abstract: Embodiments relate to using a local entry point with an indirect call function. More specifically, an indirect call function configuration comprises a first application module having a target function of the indirect function call, a second application module with a symbolic reference to the target function of the indirect function call, and a third application module to originate an indirect function call. A compiler determines and indicates, in the program code, that the function pointer value resulting from a non-call reference of a function symbol is solely used to perform indirect calls in the same module, e.g. local-use-only. A linker or loader can read the indication the compiler made in the program code. The linker or loader use the local entry point associated with the target function if the target function is defined in the same module as the reference and is local-use-only.

Abstract: A method, system, and computer product for detecting a virtual object include transmitting a probe signal to objects, receiving an echo signal reflected by at least one object of the objects, generating scan data based on the echo signal, capturing one or more images of the objects, generating image data corresponding to the captured images, computing the scan data to identify each of the objects, computing the image data to identify each of the objects, and determining another object of the objects as a virtual object, responsive to determining that the another object is identified by the computation on the image data and is not identified by the computation on the scan data.

Abstract: Embodiments relate to lightweight interrupts for floating point exceptions. An aspect includes, based on an exception occurring in a floating point unit of a processor during execution of an application, sending a lightweight interrupt corresponding to the exception to the application; and handling the exception by an exception handler of the application.

Abstract: Autonomous recovery from a transient hardware failure by executing portions of a stream of program instructions as a transaction. A start of a transaction is created in a stream of executing program instructions. A snapshot of a system state information is saved when the transaction begins. When a predefined number of program instructions in the stream are executed, the transaction ends, and store data of the transaction is committed. A new transaction then begins. If a transient hardware failure occurs, the transaction is aborted without notifying the computer software application that initiated the stream of program instructions. The transaction is re-executed, based on the saved snapshot of the system state information.

Abstract: A method for allocating memory includes an operation that determines whether a prototype of a callee function is within a scope of a caller. The caller is a module containing a function call to the callee function. In addition, the method includes determining whether the function call includes one or more unnamed parameters when a prototype of the callee function is within the scope of the caller. Further, the method may include inserting instructions in the caller to allocate a register save area in a memory when it is determined that the function call includes one or more unnamed parameters.

Abstract: When executed, a transaction-hint instruction specifies a transaction-count-to-completion (CTC) value for a transaction. The CTC value indicates how far a transaction is from completion. The CTC may be a number of instructions to completion or an amount of time to completion. The CTC value is adjusted as the transaction progresses. When a disruptive event associated with inducing transactional aborts, such as an interrupt or a conflicting memory access, is identified while processing the transaction, processing of the disruptive event is deferred if the adjusted CTC value satisfies deferral criteria. If the adjusted CTC value does not satisfy deferral criteria, the transaction is aborted and the disruptive event is processed.