Patents by Inventor Michael R. Seacrist

Michael R. Seacrist has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Process for fabricating isolated vertical bipolar and JFET transistors
    Patent number: 4939099
    Abstract: A unified process flow for the fabrication of an isolated vertical PNP (VPNP) transistor, a junction field effect transistor (JFET) and a metal/nitride/polysilicon capacitor includes the simultaneous fabrication of deep junction isolation regions (36, 121) and a VPNP buried collector (28). Junction isolation is completed by the doping and diffusion of shallow junction isolation regions (46, 122) at the same time that deep collector regions (48) are formed. A JFET source region (74) and a drain region (76) are formed simultaneously with a VPNP emitter region (70). A JFET gate contact region (88) is formed simultaenously with a VPNP base contact region (84), a VPNP buried region contact (86) and optionally with the doping of a capacitor electrode (124).
    Type: Grant
    Filed: September 21, 1989
    Date of Patent: July 3, 1990
    Assignee: Texas Instruments Incorporated
    Inventors: Michael R. Seacrist, Joe R. Trogolo, Kenneth M. Bell