Patents by Inventor Min Dai

Min Dai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170196984
    Abstract: Protein polymer-gold nanoparticles, compositions comprising protein polymer-gold nanoparticles, and uses of protein polymer-gold nanoparticles. A protein polymer-gold nanoparticle comprises a gold core and a plurality of protein polymer molecules coordinated to the gold core via a poly-histidine tag present on each protein polymer molecule. A protein polymer molecule comprises one or more elastin-like polypeptide domain and a coiled-coil region of Cartilage Oligomeric Matrix Protein domain or a variant thereof. For example, the protein polymer-gold nanoparticles can be used in methods of small molecule delivery to an individual.
    Type: Application
    Filed: January 6, 2017
    Publication date: July 13, 2017
    Inventors: Jin Kim Montclare, Joseph Frezzo, Min Dai, Raymond Chen
  • Patent number: 9691662
    Abstract: Selective deposition of a silicon-germanium surface layer on semiconductor surfaces can be employed to provide two types of channel regions for field effect transistors. Anneal of an adjustment oxide material on a stack of a silicon-based gate dielectric and a high dielectric constant (high-k) gate dielectric can be employed to form an interfacial adjustment oxide layer contacting a subset of channel regions. Oxygen deficiency can be induced in portions of the high-k dielectric layer overlying the interfacial adjustment oxide layer by deposition of a first work function metallic material layer and a capping layer and a subsequent anneal. Oxygen deficiency can be selectively removed by physically exposing portions of the high-k dielectric layer. A second work function metallic material layer and a gate conductor layer can be deposited and planarized to form gate electrodes that provide multiple effective work functions.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: June 27, 2017
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Takashi Ando, Min Dai, Balaji Kannan, Siddarth A. Krishnan, Unoh Kwon
  • Publication number: 20170170077
    Abstract: A method of manufacturing a semiconductor structure, and the resultant structure. The method includes forming an oxide layer above a substrate. The method includes forming a metal layer above the oxide layer. The method includes forming a first capping layer above the metal layer. A material forming the first capping layer may be titanium oxide, or titanium oxynitride. The method includes annealing the semiconductor structure. Annealing the semiconductor structure may result in diffusing a metal from the metal layer into the oxide layer.
    Type: Application
    Filed: December 14, 2015
    Publication date: June 15, 2017
    Inventors: Michael P. Chudzik, Min Dai, Dominic J. Schepis, Shahab Siddiqui
  • Patent number: 9673108
    Abstract: A method of manufacturing a semiconductor structure, and the resultant structure. The method includes forming an oxide layer above a substrate. The method includes forming a metal layer above the oxide layer. The method includes forming a first capping layer above the metal layer. A material forming the first capping layer may be titanium oxide, or titanium oxynitride. The method includes annealing the semiconductor structure. Annealing the semiconductor structure may result in diffusing a metal from the metal layer into the oxide layer.
    Type: Grant
    Filed: December 14, 2015
    Date of Patent: June 6, 2017
    Assignee: International Business Machines Corporation
    Inventors: Michael P. Chudzik, Min Dai, Dominic J. Schepis, Shahab Siddiqui
  • Patent number: 9639920
    Abstract: In an example, a method for image processing may include inputting a first pixel value corresponding to a first pixel of an image into a LUT. The LUT may map one or more LUT input values to one or more LUT output values. The first pixel value may correspond to a first LUT input value that maps to a first LUT output value in the LUT. The first pixel may include one or more pixel values. The method may include generating a noise value for the first LUT input value. The method may include generating a first interpolated LUT output value for the first LUT input value based on the noise value. The method may include transforming the image into a transformed image using the first interpolated LUT output value.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: May 2, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Min Dai, Ike Ikizyan, Ai-Mei Huang
  • Publication number: 20170076431
    Abstract: In an example, a method for image processing may include inputting a first pixel value corresponding to a first pixel of an image into a LUT. The LUT may map one or more LUT input values to one or more LUT output values. The first pixel value may correspond to a first LUT input value that maps to a first LUT output value in the LUT. The first pixel may include one or more pixel values. The method may include generating a noise value for the first LUT input value. The method may include generating a first interpolated LUT output value for the first LUT input value based on the noise value. The method may include transforming the image into a transformed image using the first interpolated LUT output value.
    Type: Application
    Filed: November 12, 2015
    Publication date: March 16, 2017
    Inventors: Min Dai, Ike Ikizyan, Ai-Mei Huang
  • Publication number: 20170047255
    Abstract: Selective deposition of a silicon-germanium surface layer on semiconductor surfaces can be employed to provide two types of channel regions for field effect transistors. Anneal of an adjustment oxide material on a stack of a silicon-based gate dielectric and a high dielectric constant (high-k) gate dielectric can be employed to form an interfacial adjustment oxide layer contacting a subset of channel regions. Oxygen deficiency can be induced in portions of the high-k dielectric layer overlying the interfacial adjustment oxide layer by deposition of a first work function metallic material layer and a capping layer and a subsequent anneal. Oxygen deficiency can be selectively removed by physically exposing portions of the high-k dielectric layer. A second work function metallic material layer and a gate conductor layer can be deposited and planarized to form gate electrodes that provide multiple effective work functions.
    Type: Application
    Filed: October 31, 2016
    Publication date: February 16, 2017
    Inventors: Takashi Ando, Min Dai, Balaji Kannan, Siddarth A. Krishnan, Unoh Kwon
  • Patent number: 9484427
    Abstract: Selective deposition of a silicon-germanium surface layer on semiconductor surfaces can be employed to provide two types of channel regions for field effect transistors. Anneal of an adjustment oxide material on a stack of a silicon-based gate dielectric and a high dielectric constant (high-k) gate dielectric can be employed to form an interfacial adjustment oxide layer contacting a subset of channel regions. Oxygen deficiency can be induced in portions of the high-k dielectric layer overlying the interfacial adjustment oxide layer by deposition of a first work function metallic material layer and a capping layer and a subsequent anneal. Oxygen deficiency can be selectively removed by physically exposing portions of the high-k dielectric layer. A second work function metallic material layer and a gate conductor layer can be deposited and planarized to form gate electrodes that provide multiple effective work functions.
    Type: Grant
    Filed: July 1, 2014
    Date of Patent: November 1, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Takashi Ando, Min Dai, Balaji Kannan, Siddarth A. Krishnan, Unoh Kwon
  • Patent number: 9478425
    Abstract: A method of manufacturing a semiconductor structure, and the resultant structure. The method includes forming an oxide layer above a substrate. The method includes forming a metal layer above the oxide layer. The method includes forming a first capping layer above the metal layer. A material forming the first capping layer may be titanium oxide, or titanium oxynitride. The method includes annealing the semiconductor structure. Annealing the semiconductor structure may result in diffusing a metal from the metal layer into the oxide layer.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: October 25, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael P. Chudzik, Min Dai, Dominic J. Schepis, Shahab Siddiqui
  • Patent number: 9478173
    Abstract: The techniques of this disclosure are applicable to backlight display devices. For such devices, the backlight may have different backlight intensity settings in order to promote power conservation. The techniques of this disclosure may apply different adjustments to the display, depending on the backlight intensity setting. In one example, different color correction matrices may be applied for different backlight settings in order to achieve desirable adjustments in the device at the different backlight settings. The adjustments described herein may address chrominance shifts due to different backlight settings as well as cross-talk between color channels. The techniques may also be applicable to organic light emitting diode (OLED) displays that have different luminance settings, and some described techniques may be applicable to displays that have static or fixed luminance output.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: October 25, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Reza Safaee-Rad, Min Dai, Milivoje Aleksic
  • Patent number: 9426414
    Abstract: This disclosure describes selection of reference video units to be used for interpolation or extrapolation of a video unit, such as a video frame. A decoder may apply a quality-focused mode to select a reference frame based on quality criteria. The quality criteria may indicate a level of quality likely to be produced by a reference frame. If no reference frames satisfy the quality criteria, interpolation or extrapolation may be disabled. Display of an interpolated or extrapolated frame may be selectively enabled based on a quality analysis. A decoder may apply a resource-focused frame interpolation mode to enable or disable frame interpolation or extrapolation for some frames based on power and quality considerations. In one mode, frame interpolation may be disabled to conserve power when reference frames are not likely to produce satisfactory quality. In another mode, the threshold may be adjustable as a function of power saving requirements.
    Type: Grant
    Filed: April 29, 2008
    Date of Patent: August 23, 2016
    Assignee: Qualcomm Incorporated
    Inventors: Gokce Dane, Khaled Helmi El-Maleh, Min Dai, Chia-Yuan Teng
  • Patent number: 9373501
    Abstract: A surface of a semiconductor-containing dielectric material/oxynitride/nitride is treated with a basic solution in order to provide hydroxyl group termination of the surface. A dielectric metal oxide is subsequently deposited by atomic layer deposition. The hydroxyl group termination provides a uniform surface condition that facilitates nucleation and deposition of the dielectric metal oxide, and reduces interfacial defects between the oxide and the dielectric metal oxide. Further, treatment with the basic solution removes more oxide from a surface of a silicon germanium alloy with a greater atomic concentration of germanium, thereby reducing a differential in the total thickness of the combination of the oxide and the dielectric metal oxide across surfaces with different germanium concentrations.
    Type: Grant
    Filed: April 16, 2013
    Date of Patent: June 21, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Takashi Ando, Michael P. Chudzik, Min Dai, Martin M. Frank, David F. Hilscher, Rishikesh Krishnan, Barry P. Linder, Claude Ortolland, Joseph F. Shepard, Jr.
  • Patent number: 9357233
    Abstract: A video decoder performs a sequential error handling process to detect and conceal errors within a corrupted data segment of video data units. The decoder sequentially decodes a current data unit. Upon detecting an error, the decoder sets an error flag and resynchronizes decoding at the start of the next unit. If the error flag is set, the video decoder identifies the end of the corrupted data segment based on the start of the later unit. The decoder conceals data between the start of the current unit and the end of the corrupted data segment. If the error flag is not set, the decoder may decode the remainder of the current unit and proceed to decode the next available unit without performing error handling and concealment for the current unit. The decoder also may address reference unit mismatches caused by lost video data units.
    Type: Grant
    Filed: July 10, 2008
    Date of Patent: May 31, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Yen-Chi Lee, Min Dai, Chia-Yuan Teng
  • Publication number: 20160063951
    Abstract: A device includes a memory and at least one processor coupled to the memory. The at least one processor is configured to: generate, an original image for display, store the original image in the memory, adjust color tone of the original image by suppressing blue energy of a color spectrum of the original image to produce an adjusted image, store the adjusted image in the memory, and output the adjusted image for display.
    Type: Application
    Filed: August 26, 2014
    Publication date: March 3, 2016
    Inventors: Ike Ikizyan, Min Dai
  • Publication number: 20160044308
    Abstract: A method and apparatus for video coding with spatial prediction mode for multi-mode video coding is disclosed. In one aspect, the method includes coding a slice of video data, the slice including a plurality of pixels organized into a first line and a plurality of non-first lines. The coding of the slice further includes coding a current pixel of the first line in a spatial prediction mode using a previous pixel of the first line as a predictor and coding another pixel of a non-first line in a coding mode other than the spatial prediction mode.
    Type: Application
    Filed: August 5, 2015
    Publication date: February 11, 2016
    Inventors: Natan Haim Jacobson, Vijayaraghavan Thirumalai, Rajan Laxman Joshi, Min Dai
  • Patent number: 9257519
    Abstract: A semiconductor device is disclosed. The semiconductor device includes a substrate; and a gate structure disposed directly on the substrate, the gate structure including: a graded region with a varied material concentration profile; and a metal layer disposed on the graded region.
    Type: Grant
    Filed: November 15, 2013
    Date of Patent: February 9, 2016
    Assignee: GlobalFoundries, Inc.
    Inventors: Michael P. Chudzik, Min Dai, Jinping Liu, Joseph F. Shepard, Jr., Keith K. H. Wong
  • Publication number: 20160027640
    Abstract: A surface of a semiconductor-containing dielectric material/oxynitride/nitride is treated with a basic solution in order to provide hydroxyl group termination of the surface. A dielectric metal oxide is subsequently deposited by atomic layer deposition. The hydroxyl group termination provides a uniform surface condition that facilitates nucleation and deposition of the dielectric metal oxide, and reduces interfacial defects between the oxide and the dielectric metal oxide. Further, treatment with the basic solution removes more oxide from a surface of a silicon germanium alloy with a greater atomic concentration of germanium, thereby reducing a differential in the total thickness of the combination of the oxide and the dielectric metal oxide across surfaces with different germanium concentrations.
    Type: Application
    Filed: October 3, 2015
    Publication date: January 28, 2016
    Inventors: Takashi Ando, Michael P. Chudzik, Min Dai, Martin M. Frank, David F. Hilscher, Rishikesh Krishnan, Barry P. Linder, Claude Ortolland, Joseph F. Shepard, JR.
  • Publication number: 20160005831
    Abstract: Selective deposition of a silicon-germanium surface layer on semiconductor surfaces can be employed to provide two types of channel regions for field effect transistors. Anneal of an adjustment oxide material on a stack of a silicon-based gate dielectric and a high dielectric constant (high-k) gate dielectric can be employed to form an interfacial adjustment oxide layer contacting a subset of channel regions. Oxygen deficiency can be induced in portions of the high-k dielectric layer overlying the interfacial adjustment oxide layer by deposition of a first work function metallic material layer and a capping layer and a subsequent anneal. Oxygen deficiency can be selectively removed by physically exposing portions of the high-k dielectric layer. A second work function metallic material layer and a gate conductor layer can be deposited and planarized to form gate electrodes that provide multiple effective work functions.
    Type: Application
    Filed: July 1, 2014
    Publication date: January 7, 2016
    Applicant: International Business Machines Corporation
    Inventors: Takashi Ando, Min Dai, Balaji Kannan, Siddarth A. Krishnan, Unoh Kwon
  • Publication number: 20150304668
    Abstract: A system and method for coding video data in pattern mode for display stream compression (DSC) is disclosed. In one aspect, the method includes determining that a first pattern in a current block of video data is not in a pattern database comprising a plurality of patterns, and adding the first pattern to the pattern database. The first pattern may be associated with a first index identifying a location of the first pattern in the pattern database. The method further includes coding the current block in pattern mode at least in part via signaling (i) the first pattern determined not to be in the pattern database and (ii) the first index identifying the location of the first pattern in the first database.
    Type: Application
    Filed: April 20, 2015
    Publication date: October 22, 2015
    Inventors: Natan Haim JACOBSON, Vijayaraghavan THIRUMALAI, Rajan Laxman JOSHI, Min DAI
  • Publication number: 20150304675
    Abstract: A system and method for coding a block of video data in block prediction mode for display stream compression (DSC) is disclosed. In one aspect, the method includes determining a candidate block to be used for predicting a current block in a current slice. The candidate block may be within a range of locations defined by one or more block prediction parameters. The method further includes determining, based on the candidate block and the current block, a prediction vector identifying a location of the candidate block with respect to the current block, and coding the current block in block prediction mode at least in part via signaling the prediction vector identifying the location of the candidate block with respect to the current block.
    Type: Application
    Filed: April 20, 2015
    Publication date: October 22, 2015
    Inventors: Natan Haim JACOBSON, Vijayaraghavan THIRUMALAI, Rajan Laxman JOSHI, Min DAI