Patents by Inventor Ming Hou
Ming Hou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240153257Abstract: A monitoring system based on a digital converter station includes a first monitoring terminal deployed at a first-level monitoring side, a second monitoring terminal deployed at a second-level monitoring side, and a third monitoring terminal deployed at a third-level monitoring side; the monitoring terminal at each level includes a communication module, a human-machine interaction module, a device status monitoring module, a device alarm management module, a video fusion processing module, and a data transmission adjustment and control module.Type: ApplicationFiled: January 11, 2024Publication date: May 9, 2024Applicants: STATE GRID CORPORATION OF CHINA, STATE GRID ECONOMIC AND TECHNOLOGICAL RESEARCH INSTITUTE CO., LTD, NR ELECTRIC CO., LTD., XJ GROUP CORPORATION, NARI TECHNOLOGY CO., LTD, BEIJING SGITG ACCENTURE INFORMATION TECHNOLOGY CENTER CO., LTD., HUAWEI TECHNOLOGY CO., LTDInventors: Wei JIN, Qing WANG, Xianshan GUO, Jun LYU, Siyuan LIU, Xiang ZHANG, Yanguo WANG, Zhanguo ZHANG, Haifeng WANG, Chong TONG, Ming LI, Wei CHENG, Ning ZHAO, Zhou CHEN, Xiaojun HOU, Hanqing ZHAO
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Publication number: 20240153861Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, a molding compound and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The at least one semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The molding compound is disposed over the interposer and laterally encapsulates the at least one semiconductor die. The molding compound laterally wraps around the interposer and the molding compound at least physically contacts a portion of the sidewalls of the interposer. The connectors are disposed on the second surface of the interposer, and are electrically connected with the at least one semiconductor die through the interposer.Type: ApplicationFiled: January 14, 2024Publication date: May 9, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chi-Ming Huang, Ping-Kang Huang, Sao-Ling Chiu, Shang-Yun Hou
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Patent number: 11977947Abstract: The present invention provides an electronic shelf label communication system, method and apparatus.Type: GrantFiled: August 9, 2019Date of Patent: May 7, 2024Assignee: Hanshow Technology Co., Ltd.Inventors: Shiguo Hou, Liangyan Li, Yunliang Feng, Bo Gao, Jun Chen, Qi Jiang, Ming Shen
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Publication number: 20240136423Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.Type: ApplicationFiled: December 25, 2023Publication date: April 25, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
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Publication number: 20240130050Abstract: An embedded circuit board, made without gas bubbles or significant internal gaps according to a manufacturing method which is provided, includes an inner layer assembly, an embedded element, and first and second insulating elements. The inner layer assembly comprises a first main portion with opposing first and second surfaces and a first groove not extending to the second surface is positioned at the first surface. A first opening penetrates the second surface, and the first opening and the first groove are connected. The first groove carries electronic elements for embedment. The first insulating element covers the first surface and a surface of the embedded element away from the second surface. The second insulating element covers the second surface and extends into the first opening to be in contact with the embedded element.Type: ApplicationFiled: December 28, 2023Publication date: April 18, 2024Inventors: Cheng-Yi Yang, Hao-Wen Zhong, Biao Li, Ming-Jaan Ho, Ning Hou
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Publication number: 20240128353Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a first barrier layer on the buffer layer; forming a first hard mask on the first barrier layer; removing the first hard mask and the first barrier layer to form a recess; forming a second barrier layer in the recess; and forming a p-type semiconductor layer on the second barrier layer.Type: ApplicationFiled: December 25, 2023Publication date: April 18, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chun-Ming Chang, Che-Hung Huang, Wen-Jung Liao, Chun-Liang Hou
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Patent number: 11935947Abstract: An enhancement mode high electron mobility transistor (HEMT) includes a group III-V semiconductor body, a group III-V barrier layer and a gate structure. The group III-V barrier layer is disposed on the group III-V semiconductor body, and the gate structure is a stacked structure disposed on the group III-V barrier layer. The gate structure includes a gate dielectric and a group III-V gate layer disposed on the gate dielectric, and the thickness of the gate dielectric is between 15 nm to 25 nm.Type: GrantFiled: October 8, 2019Date of Patent: March 19, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Chih-Tung Yeh, Chun-Ming Chang, Bo-Rong Chen, Shin-Chuan Huang, Wen-Jung Liao, Chun-Liang Hou
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Publication number: 20240078833Abstract: The fingerprint sensing circuit includes a photo detector, a capacitor, a current mirror and a switch circuit. The capacitor has a first terminal electrically connected to the first terminal of the photo detector. The current mirror has an input terminal electrically connected to the first terminal of the photo detector and an output terminal electrically connected to a sensing line. In an exposure period, the switch circuit turns off the current mirror. In a sensing period, the switch circuit turns on the current mirror to generate a current on the sensing line, and the detecting circuit is configured to generate a fingerprint signal according to the current.Type: ApplicationFiled: September 5, 2022Publication date: March 7, 2024Inventors: Yaw-Guang CHANG, Jia-Ming HE, Zong-You HOU
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Patent number: 11922848Abstract: Provided is a method for compensating a displayed picture in a display screen. The display screen includes a plurality of regions, each of the plurality of regions including a plurality of pixels; the method includes: determining transformation matrices corresponding to pixels in the plurality of regions based on texture complexities of pictures to be displayed in the plurality of regions; acquiring compensated grayscales by compensating grayscales of pixel points in the pictures to be displayed in the plurality of regions based on the transformation matrices corresponding to the pixels in the plurality of regions.Type: GrantFiled: August 5, 2021Date of Patent: March 5, 2024Assignees: Beijing BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Tiankuo Shi, Yifan Hou, Xiangjun Peng, Chenxi Zhao, Xiaomang Zhang, Minglei Chu, Xin Duan, Wei Sun, Ming Chen, Lingyun Shi
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Patent number: 11923205Abstract: A method for manufacturing a semiconductor device includes: providing a wafer-bonding stack structure having a sidewall layer and an exposed first component layer; forming a photoresist layer on the first component layer; performing an edge trimming process to at least remove the sidewall layer; and removing the photoresist layer. In this way, contaminant particles generated from the blade during the edge trimming process may fall on the photoresist layer but not fall on the first component layer, so as to protect the first component layer from being contaminated.Type: GrantFiled: December 17, 2021Date of Patent: March 5, 2024Assignee: UNITED MICROELECTRONICS CORPORATIONInventors: Kun-Ju Li, Ang Chan, Hsin-Jung Liu, Wei-Xin Gao, Jhih-Yuan Chen, Chun-Han Chen, Zong-Sian Wu, Chau-Chung Hou, I-Ming Lai, Fu-Shou Tsai
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Patent number: 11916009Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes at least one semiconductor die, an interposer, a molding compound and connectors. The interposer has a first surface, a second surface opposite to the first surface and sidewalls connecting the first and second surfaces. The at least one semiconductor die is disposed on the first surface of interposer and electrically connected with the interposer. The molding compound is disposed over the interposer and laterally encapsulates the at least one semiconductor die. The molding compound laterally wraps around the interposer and the molding compound at least physically contacts a portion of the sidewalls of the interposer. The connectors are disposed on the second surface of the interposer, and are electrically connected with the at least one semiconductor die through the interposer.Type: GrantFiled: May 30, 2022Date of Patent: February 27, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chi-Ming Huang, Ping-Kang Huang, Sao-Ling Chiu, Shang-Yun Hou
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Publication number: 20230207672Abstract: An insulated gate bipolar transistor includes a P-type group III-V nitride compound layer. An N-type group III-V nitride compound layer contacts a side of the P-type group III-V nitride compound layer. An HEMT is disposed on the N-type group III-V nitride compound layer. The HEMT includes a first group III-V nitride compound layer disposed on the N-type group III-V nitride compound layer. A second group III-V nitride compound layer is disposed on the first group III-V nitride compound layer. A source is embedded within the second group III-V nitride compound layer and the first group III-V nitride compound layer, wherein the source includes an N-type group III-V nitride compound body and a metal contact. A drain contacts another side of the P-type group III-V nitride compound layer. A gate is disposed on the second group III-V nitride compound layer.Type: ApplicationFiled: January 17, 2022Publication date: June 29, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventor: Hsin-Ming Hou
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Publication number: 20230207679Abstract: A complementary high electron mobility transistor includes an N-type HEMT and an P-type HEMT disposed on the substrate. The N-type HEMT includes a first undoped gallium nitride layer, a first quantum confinement channel, a first undoped group III-V nitride compound layer and an N-type group III-V nitride compound layer disposed from bottom to top. A first gate is disposed on the N-type group III-V nitride compound layer. A first source and a first drain are disposed at two sides of the first gate. The P-type HEMT includes a second undoped gallium nitride layer, a second quantum confinement channel, a second undoped group III-V nitride compound layer and a P-type group III-V nitride compound layer disposed from bottom to top. A second gate is disposed on the P-type group III-V nitride compound layer. A second source and a second drain are disposed at two sides of the second gate.Type: ApplicationFiled: January 17, 2022Publication date: June 29, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventor: Hsin-Ming Hou
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Publication number: 20220237451Abstract: A method and an apparatus for semiconductor manufacturing process prediction based on heterogeneous data are provided. The method includes the following steps. Several equipment recipe data of several pieces of equipment are obtained. The equipment recipe data are inputted into a first Neural Network model to obtain a first prediction result. Several equipment sensing data are obtained. The equipment sensing data are inputted into a second Neural Network model to obtain a second prediction result. Several metrology inspection data are obtained. The equipment recipe data, the equipment sensing data and the metrology inspection data are heterogeneous data. The metrology inspection data are inputted into a third Neural Network model to obtain a third prediction result. According to the first prediction result, the second prediction result and the third prediction result, a total prediction result is obtained.Type: ApplicationFiled: March 26, 2021Publication date: July 28, 2022Inventor: Hsin-Ming HOU
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Publication number: 20220237450Abstract: A semiconductor process prediction method and a semiconductor process prediction apparatus considering overall features and local features are provided. The semiconductor manufacturing process prediction method includes the following steps. Several equipment sensing curves are obtained. The equipment sensing curves are filtered to reduce the co-linearity of the equipment sensing curves. A Dynamic Time Warping (DTW) procedure is performed to align the equipment sensing curves. The equipment sensing curves which are aligned are inputted into a Convolutional Neural Network (CNN) model to obtain a first prediction result considering the local features. A statistical analysis procedure is performed on the equipment sensing curves to obtain several statistical data. The statistical data are inputted into an Artificial Neural Network (ANN) model to obtain a second prediction result considering the overall features.Type: ApplicationFiled: March 26, 2021Publication date: July 28, 2022Inventor: Hsin-Ming HOU
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Patent number: 11085045Abstract: The present invention provides functional aptamer-comprising tRNA molecules, useful in the study of tRNA and ribosomal activity.Type: GrantFiled: November 16, 2016Date of Patent: August 10, 2021Assignees: Anima Biotech Inc., Thomas Jefferson UniversityInventors: Iris Alroy, Ya-Ming Hou, Howard Gamper
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Patent number: 10677311Abstract: Disclosed is a vibration-damping support device, including a housing, and a core shaft having one end passing through the housing to connect with a vibration source. The vibration-damping support device further includes two elastic members arranged within the housing and spaced apart from each other. Each elastic member includes an inner hole, so that it can be mounted on the core shaft. Each elastic member includes an elastic rubber body, and a plurality of metal plates that are embedded in the elastic rubber body and parallel to each other. The elastic rubber body extends beyond the metal plates in a radial direction. With this vibration-damping support device, a variable stiffness can be achieved.Type: GrantFiled: September 17, 2018Date of Patent: June 9, 2020Assignee: ZHUZHOU TIMES NEW MATERIAL TECHNOLOGY CO. LTD.Inventors: Tao Yue, Weihui Hu, Sheng Lin, Zetao Su, Pengfei Yuan, Chao Yang, Congcong Chen, Ming Hou, Hui Zeng
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Patent number: 10538626Abstract: A transparent and colorless polyimide resin is provided. The polyimide resin is derived from at least two dianhydride monomers and at least two diamine monomers. At least one monomer in the dianhydride and diamine monomers includes structure of formula (1). The monomer with structure of formula (1) has an amount of moles accounting for 10-50% of total moles of the dianhydride or diamine monomers. In formula (1), X is SO2,C(CH3)2 or C(CF3)2, Y is oxygen.Type: GrantFiled: July 10, 2017Date of Patent: January 21, 2020Assignee: Microcosm Technology Co., LtdInventors: Bo-Hung Lai, Wei-Ming Hou, Tang-Chieh Huang
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Patent number: 10348778Abstract: A communication system, method, and components are described. Specifically, a communication system having the ability to enable a media server to provide audio substitution during a dynamic device pairing scenario is disclosed. The media server may be included in the call topology, for instance, by way of a dynamic device pairing server or application that facilitates the dynamic pairing of a media device and a control device for a communication session.Type: GrantFiled: February 8, 2013Date of Patent: July 9, 2019Assignee: Avaya Inc.Inventors: Joel M. Ezell, Ming Hou, Zlatan Dedic
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Publication number: 20190085932Abstract: Disclosed is a vibration-damping support device, including a housing, and a core shaft having one end passing through the housing to connect with a vibration source. The vibration-damping support device further includes two elastic members arranged within the housing and spaced apart from each other. Each elastic member includes an inner hole, so that it can be mounted on the core shaft. Each elastic member includes an elastic rubber body, and a plurality of metal plates that are embedded in the elastic rubber body and parallel to each other. The elastic rubber body extends beyond the metal plates in a radial direction. With this vibration-damping support device, a variable stiffness can be achieved.Type: ApplicationFiled: September 17, 2018Publication date: March 21, 2019Applicant: Zhuzhou Times New Material Technology Co., LtdInventors: Tao YUE, Weihui HU, Sheng LIN, Zetao SU, Pengfei YUAN, Chao YANG, Congcong CHEN, Ming HOU, Hui ZENG