Abstract: The present disclosure relates to a plasma treatment (under atmospheric conditions or under vacuum conditions) of a jacketed cable comprising a cable jacket and a heat shrink tubing. The plasma treatment improves retention properties of an optical fiber cable assembly by imparting a permanent change on a polymer surface of the cable jacket by cross-linking, leading to eventual graphitization, that can result in a diffusion barrier layer at an interface of the cable jacket and the heat shrink tubing, which prevents or minimizes plasticizer migration and results in an environmental seal (e.g., a long-term water tight seal).

Abstract: An invention disclosure discloses a composite structure. The composite structure includes a substrate layer (120), a conductive layer (140) and an overlayer (160). The substrate has a first face (124) and a second face (122). The conductive layer has a first face (148) and a second face (149). The first face of the conductive layer is disposed on the at least a part of the second face of the substrate layer. A portion (144) of the conductive layer has a resistivity at least about ten times higher than an adjacent region (146) on the conductive layer. The overlayer may have a first face (162) and a second face (166). The first face of the overlayer is disposed on at least a part of the second face of the conductive layer such that the conductive layer is disposed between the overlayer and the substrate layer. The substrate layer comprises a material that is optically transparent over at least a part of the electromagnetic spectrum from about 180 nm to about 20 ?m.

Abstract: Atomic layer deposition methods for coating an optical substrate with magnesium fluoride. The methods include two primary processes. The first process includes the formation of a magnesium oxide layer over a surface of a substrate. The second process includes converting the magnesium oxide layer to a magnesium fluoride layer. These two primary processes may be repeated a plurality of times to create multiple magnesium fluoride layers that make up a magnesium fluoride film. The magnesium fluoride film may serve as an antireflective coating layer for an optical substrate, such as an optical lens.

Abstract: A thin film transistor (TFT) liquid crystal display (LCD) comprises a plurality of image pixels demarcated between an overlying liquid crystal display layer and an underlying glass substrate. Each image pixel comprises a dedicated top-gate TFT disposed over the glass substrate. Each top-gate thin film transistor comprises a process sensitive semiconductor layer disposed over the glass substrate, and a source electrode and a drain electrode disposed over the process sensitive semiconductor layer. The process sensitive semiconductor layer forms a process sensitive semiconductor active layer between the source electrode and the drain electrode and an active layer protection film is disposed over the process sensitive semiconductor active layer. A gate dielectric layer is disposed over the active layer protection film between the source electrode and the drain electrode and a gate electrode is disposed over the gate dielectric layer.

Abstract: An electrical component package includes a glass substrate, an interposer panel positioned on the glass substrate, the interposer panel comprising a device cavity, a wafer positioned on the interposer panel such that the device cavity is enclosed by the glass substrate, the interposer panel, and the wafer. The electrical component package further includes a metal seed layer disposed between the interposer panel and the wafer, and a dielectric coating. The dielectric coating hermetically seals the interposer panel to the glass substrate, the interposer panel to the metal seed layer and the wafer, and the interposer panel hermetically seals the metal seed layer to the glass substrate such that the device cavity is hermetically sealed from ambient atmosphere.

Abstract: A multi-layer and method of making the same are provided. The multi-layer, such as a sensor, can include a high strength glass overlay and a lamination layer on a substrate layer. The overlay can be less than 250 micrometers thick and have at least one tempered surface incorporating a surface compression layer of at least 5 micrometers deep and a surface compressive stress of at least 200 MPa. The overlay can exhibit a puncture factor of at least 3000 N/?m2 at B10 (10thpercentile of the probability distribution of failure) in a multi-layer structure, an apparent thickness of less than 0.014 mm, and a pencil hardness greater than 6H. The method can include ion-exchange tempering at least one major surface of a glass sheet, light etching the major surface to remove flaws and laminating the glass sheet on the tempered and lightly etched major surface to a substrate layer.

Abstract: Described herein are apparatuses for holding a substrate in a near vertical position, wherein the design minimizes substrate sag while allowing the substrate to expand and contract under varying thermal conditions. The apparatus minimizes the stress on the substrate, preventing breakage of or damage to the substrate while it undergoes coating and other thermal processes.

Abstract: An optical element including an optically transparent lens which defines a curved surface having a steepness given by an R/# of from about 0.5 to about 1.0. A film is positioned on the curved surface. The film includes an index layer. A composite layer is positioned on the curved surface having a refractive index greater than the index layer. The composite layer includes HfO2 and Al2O3. The composite layer has a mole fraction X of HfO2, wherein X is from about 0.05 to about 0.95 and a mole fraction of Al2O3 in the composite layer is 1-X.

Abstract: Described herein are apparatuses and methods for holding a substrate in a position that minimizes particle contamination of the substrate when the substrate is being coated. Along with the apparatus, processes for reducing particle reduction on substrates are provided. The articles and processes described herein are useful in making coated glass substrates, such as used in electrochromic, photochromic, or photovoltaic technologies.

Abstract: A glass forming apparatus and method include a cooling mechanism in a wall of the apparatus that enhances radiation heat transfer between the glass and the wall of the apparatus and is tunable in both the vertical and horizontal directions. The apparatus and method also include a heating mechanism that affects radiation heat transfer between the glass and the wall of the apparatus, is tunable in both the vertical and horizontal directions, and is independently operable from the cooling mechanism.

Abstract: A coated glass article and of a system and method for forming a coated glass article are provided. The process includes applying a first coating precursor material to the first surface of the glass article and supporting the glass article via a gas bearing. The process includes heating the glass article and the coating precursor material to above a glass transition temperature of the glass article while the glass article is supported by the gas bearing such that during heating, a property of the first coating precursor material changes forming a coating layer on the first surface of the glass article from the first precursor material. The high temperature and/or non-contact coating formation may form a coating layer with one or more new physical properties, such as a deep diffusion layer within the glass, and may form highly consistent coatings on multiple sides of the glass.

Abstract: A method for forming a field effect transistor (FET) includes the following steps. A well region of a first conductivity type is formed in a semiconductor region of a second conductivity type. A gate electrode is formed adjacent to but insulated from the well region. A source region of the second conductivity type is formed in the well region. A heavy body recess is formed extending into and terminating within the well region adjacent the source region. The heavy body recess is at least partially filled with a heavy body material having a lower energy gap than the well region.

Abstract: A method for forming a field effect transistor (FET) includes the following steps. A well region of a first conductivity type is formed in a semiconductor region of a second conductivity type. A gate electrode is formed adjacent to but insulated from the well region. A source region of the second conductivity type is formed in the well region. A heavy body recess is formed extending into and terminating within the well region adjacent the source region. The heavy body recess is at least partially filled with a heavy body material having a lower energy gap than the well region.

Abstract: A field effect transistor (FET) includes a semiconductor region of a first conductivity type and a well region of a second conductivity type extending over the semiconductor region. A gate electrode is adjacent to but insulated from the well region, and a source region of the first conductivity type is in the well region. A heavy body region is in electrical contact with the well region, and includes a material having a lower energy gap than the well region.

Abstract: A field effect transistor (FET) includes a semiconductor region of a first conductivity type and a well region of a second conductivity type extending over the semiconductor region. A gate electrode is adjacent to but insulated from the well region, and a source region of the first conductivity type is in the well region. A heavy body region is in electrical contact with the well region, and includes a material having a lower energy gap than the well region.

Abstract: A heat dissipator assembly for a surveillance camera having a casing includes an L-shaped, integrally formed heat dissipator slidably received and adapted to be in direct contact with the casing. The heat dissipator is divided into a vertical portion and a horizontal portion and the horizontal portion has multiple connecting bosses formed thereon for connection with a circuit board. A brass plate is securely mounted on a side face of the vertical portion for connection with light emitting diodes.

Abstract: A lens assembly in a camera includes a first meniscus lens (10) and a second meniscus lens (11) respectively having a first radius of curvature (A,A?) and a second radius of curvature (B,B?) larger than that of the first radius of curvature A,A?), a concave lens (12) having a first radius of curvature (C) and a second radius of curvature (C?) smaller than the first radius of curvature (C), and a convex lens (13) having two opposite sides with a radius of curvature so that after a distance between the lens to the object is determined, a clear image is presented.

Abstract: A lens assembly in a camera includes a first meniscus lens (10) and a second meniscus lens (11) respectively having a first curvature (A,A?) and a second curvature (B,B?) larger than that of the first curvature A,A?), a concave lens (12) having a first curvature (C) and a second curvature (C?) smaller than the first curvature (C), and a convex lens (13) having two opposite sides with a curvature so that after a distance between the lens to the object is determined, a clear image is presented.

Abstract: An uninterruptible power supply having a programmable power output is provided. The uninterruptible power supply having a programmable power output includes: a communication interface, a microprocessor, a schedule recorder, a clock generator, a input voltage/current detecting circuit, a DC/AC converter, a battery, a charging circuit, a transfer switch, and a output power control switch. Through the components described above, an user can set the power output schedule through the communication interface by employing a computer, a PDA or other equipments, and then the schedule can be stored in the schedule recorder by the microprocessor, so that the output power control switch can be controlled to decide whether a power is outputted or not through a cooperation between a time data produced by the clock generator and the schedule stored in the schedule recorder (FIG. 1).

Abstract: A crystal oscillator circuit includes an oscillator gain stage, an intermediate amplifier, a high frequency noise filter, an output buffer and a power supply noise filter. The oscillator gain stage has a voltage reduction circuit for adjusting the voltage swing level of a generated clock signal. The generated clock signal is amplified by the intermediate amplifier and the high frequency noise filter filters the amplified signal. The power supply noise filter removes noise in the power supplied to the oscillator gain stage and the intermediate amplifier. The high frequency noise filter has two noise filtering circuits and a time-delay circuit. The time-delay circuit prevents two transistors in the output buffer from being turned on simultaneously to avoid large short circuit current and save power.