Patents by Inventor Mitsuhiko Sugane
Mitsuhiko Sugane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11158964Abstract: An electronic component includes: a first terminal that is inserted into a first through hole in a substrate; and a second terminal that is inserted into a second through hole in the substrate, wherein a length of the first terminal from a first end that is inserted into the first through hole to a second end is longer than a length of the second terminal from a third end that is inserted into the second through hole to a fourth end, and a cross sectional area of a portion of the first terminal positioned on a side of the second end with respect to a first joined portion is larger than a cross sectional area of a portion of the second terminal positioned on a side of the fourth end with respect to a second joined portion.Type: GrantFiled: June 8, 2020Date of Patent: October 26, 2021Assignee: FUJITSU LIMITEDInventors: Takahide Mukoyama, Tetsuro Yamada, Mitsuhiko Sugane, Yoshiyuki Hiroshima, Kohei Choraku, Kazuki Takahashi, Akiko Matsui, Shigeo Iriguchi
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Publication number: 20200303849Abstract: An electronic component includes: a first terminal that is inserted into a first through hole in a substrate; and a second terminal that is inserted into a second through hole in the substrate, wherein a length of the first terminal from a first end that is inserted into the first through hole to a second end is longer than a length of the second terminal from a third end that is inserted into the second through hole to a fourth end, and a cross sectional area of a portion of the first terminal positioned on a side of the second end with respect to a first joined portion is larger than a cross sectional area of a portion of the second terminal positioned on a side of the fourth end with respect to a second joined portion.Type: ApplicationFiled: June 8, 2020Publication date: September 24, 2020Applicant: FUJITSU LIMITEDInventors: Takahide Mukoyama, Tetsuro Yamada, Mitsuhiko Sugane, YOSHIYUKI HIROSHIMA, Kohei Choraku, Kazuki TAKAHASHI, AKIKO MATSUI, Shigeo Iriguchi
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Patent number: 10714849Abstract: An electronic component includes: a first terminal that is inserted into a first through hole in a substrate; and a second terminal that is inserted into a second through hole in the substrate, wherein a length of the first terminal from a first end that is inserted into the first through hole to a second end is longer than a length of the second terminal from a third end that is inserted into the second through hole to a fourth end, and a cross sectional area of a portion of the first terminal positioned on a side of the second end with respect to a first joined portion is larger than a cross sectional area of a portion of the second terminal positioned on a side of the fourth end with respect to a second joined portion.Type: GrantFiled: February 1, 2019Date of Patent: July 14, 2020Assignee: FUJITSU LIMITEDInventors: Takahide Mukoyama, Tetsuro Yamada, Mitsuhiko Sugane, Yoshiyuki Hiroshima, Kohei Choraku, Kazuki Takahashi, Akiko Matsui, Shigeo Iriguchi
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Patent number: 10492291Abstract: A wiring board manufacturing method includes forming a conductor pattern within a waste board section of a wiring board including a product section and the waste board section, the conductor pattern in which a plurality of polygonal lands made of a conductor are arranged along a first direction and a second direction crossing the first direction, each of the plurality of polygonal lands making contact with an adjacent one of the plurality of polygonal lands at each apex of the plurality of polygonal lands; and selectively removing the conductor at the apex of at least part of the plurality of polygonal lands.Type: GrantFiled: March 22, 2017Date of Patent: November 26, 2019Assignee: FUJITSU LIMITEDInventors: Yoshiyuki Hiroshima, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukoyama, Tetsuro Yamada, Kohei Choraku
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Publication number: 20190245284Abstract: An electronic component includes: a first terminal that is inserted into a first through hole in a substrate; and a second terminal that is inserted into a second through hole in the substrate, wherein a length of the first terminal from a first end that is inserted into the first through hole to a second end is longer than a length of the second terminal from a third end that is inserted into the second through hole to a fourth end, and a cross sectional area of a portion of the first terminal positioned on a side of the second end with respect to a first joined portion is larger than a cross sectional area of a portion of the second terminal positioned on a side of the fourth end with respect to a second joined portion.Type: ApplicationFiled: February 1, 2019Publication date: August 8, 2019Applicant: FUJITSU LIMITEDInventors: Takahide Mukoyama, Tetsuro Yamada, Mitsuhiko Sugane, YOSHIYUKI HIROSHIMA, Kohei Choraku, Kazuki TAKAHASHI, AKIKO MATSUI, Shigeo Iriguchi
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Patent number: 10353158Abstract: A light emitting element bonded board includes an optical waveguide formed within a board, a hollowed portion in the board, a light emitting element installed in the hollowed portion, and a conductive portion formed in an upper layer and/or a lower layer of the optical waveguide, wherein an optical axis of the light emitting element coincides with a center line of the optical waveguide, and a bonding portion of the light emitting element is bonded to the conductive portion.Type: GrantFiled: November 15, 2017Date of Patent: July 16, 2019Assignee: FUJITSU LIMITEDInventors: Yoshiyuki Hiroshima, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukoyama, Tetsuro Yamada, Kohei Choraku
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Patent number: 10212805Abstract: A printed circuit board includes a power feeding layer to which a power supply voltage is applied, a plurality of power feeding terminals that is disposed in an area, in which an electronic component is mounted, and supplies current based on the power supply voltage to the electronic component, and a plurality of vias that electrically interconnects the plurality of power feeding terminals and the power feeding layer, and is formed such that a via coupled to a power feeding terminal disposed closer to an end of the area has a smaller via-diameter.Type: GrantFiled: November 9, 2017Date of Patent: February 19, 2019Assignee: FUJITSU LIMITEDInventors: Tetsuro Yamada, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukoyama, Yoshiyuki Hiroshima, Kohei Choraku
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Patent number: 10164312Abstract: A wiring board includes: a first substrate that includes signal wiring; a second substrate that includes a conductor with an area larger than an area of the signal wiring, and projection formed on a face of the conductor and constituted of an insulator with a pattern corresponding to a pattern of the signal wiring, the second substrate being arranged so that the face of the conductor on which the projection is formed faces the signal wiring; and an intermediate layer that is arranged between the signal wiring and the conductor and includes a fibrous member.Type: GrantFiled: August 10, 2016Date of Patent: December 25, 2018Assignee: FUJITSU LIMITEDInventors: Tetsuro Yamada, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukoyama, Yoshiyuki Hiroshima, Kohei Choraku
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Publication number: 20180184514Abstract: A printed circuit board includes a power feeding layer to which a power supply voltage is applied, a plurality of power feeding terminals that is disposed in an area, in which an electronic component is mounted, and supplies current based on the power supply voltage to the electronic component, and a plurality of vias that electrically interconnects the plurality of power feeding terminals and the power feeding layer, and is formed such that a via coupled to a power feeding terminal disposed closer to an end of the area has a smaller via-diameter.Type: ApplicationFiled: November 9, 2017Publication date: June 28, 2018Applicant: FUJITSU LIMITEDInventors: Tetsuro Yamada, AKIKO MATSUI, Mitsuhiko Sugane, Takahide Mukoyama, YOSHIYUKI HIROSHIMA, Kohei Choraku
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Publication number: 20180156993Abstract: A light emitting element bonded board includes an optical waveguide formed within a board, a hollowed portion in the board, a light emitting element installed in the hollowed portion, and a conductive portion formed in an upper layer and/or a lower layer of the optical waveguide, wherein an optical axis of the light emitting element coincides with a center line of the optical waveguide, and a bonding portion of the light emitting element is bonded to the conductive portion.Type: ApplicationFiled: November 15, 2017Publication date: June 7, 2018Applicant: FUJITSU LIMITEDInventors: YOSHIYUKI HIROSHIMA, AKIKO MATSUI, Mitsuhiko Sugane, Takahide Mukoyama, Tetsuro Yamada, Kohei Choraku
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Patent number: 9992878Abstract: A circuit board disclosed herein includes: two substrates opposed to each other, where a dielectric being interposed between the two substrates; a through hole formed in each of the two substrates and filled with the dielectric; a first conductor film formed on an inner surface of the through hole; and a second conductor film covering the through hole on a main surface of each of the two substrates on an opposite side to the dielectric, the second conductor film being connected to the first conductor film on the main surface side.Type: GrantFiled: November 2, 2015Date of Patent: June 5, 2018Assignee: FUJITSU LIMITEDInventors: Mitsuhiko Sugane, Akiko Matsui, Takahide Mukoyama, Tetsuro Yamada, Yoshiyuki Hiroshima, Kohei Choraku
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Publication number: 20170290144Abstract: A wiring board manufacturing method includes forming a conductor pattern within a waste board section of a wiring board including a product section and the waste board section, the conductor pattern in which a plurality of polygonal lands made of a conductor are arranged along a first direction and a second direction crossing the first direction, each of the plurality of polygonal lands making contact with an adjacent one of the plurality of polygonal lands at each apex of the plurality of polygonal lands; and selectively removing the conductor at the apex of at least part of the plurality of polygonal lands.Type: ApplicationFiled: March 22, 2017Publication date: October 5, 2017Applicant: FUJITSU LIMITEDInventors: YOSHIYUKI HIROSHIMA, AKIKO MATSUI, Mitsuhiko Sugane, Takahide Mukoyama, Tetsuro Yamada, Kohei Choraku
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Patent number: 9763331Abstract: A printed circuit board includes: a first electrode made of a tubular electric conductor formed on an inner wall of a first hole formed in the printed circuit board; a dielectric body disposed inside the first electrode; and a second electrode made of a tubular electric conductor formed on an inner wall of a second hole extending through the dielectric body, the second electrode having a center axis concentric with the first electrode.Type: GrantFiled: March 10, 2016Date of Patent: September 12, 2017Assignee: FUJITSU LIMITEDInventors: Yoshiyuki Hiroshima, Naoki Nakamura, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukoyama, Tetsuro Yamada, Kohei Choraku
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Publication number: 20170055343Abstract: A wiring board includes: a first substrate that includes signal wiring; a second substrate that includes a conductor with an area larger than an area of the signal wiring, and projection formed on a face of the conductor and constituted of an insulator with a pattern corresponding to a pattern of the signal wiring, the second substrate being arranged so that the face of the conductor on which the projection is formed faces the signal wiring; and an intermediate layer that is arranged between the signal wiring and the conductor and includes a fibrous member.Type: ApplicationFiled: August 10, 2016Publication date: February 23, 2017Applicant: FUJITSU LIMITEDInventors: Tetsuro Yamada, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukoyama, Yoshiyuki Hiroshima, Kohei Choraku
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Publication number: 20160309593Abstract: A printed circuit board includes: a first electrode made of a tubular electric conductor formed on an inner wall of a first hole formed in the printed circuit board; a dielectric body disposed inside the first electrode; and a second electrode made of a tubular electric conductor formed on an inner wall of a second hole extending through the dielectric body, the second electrode having a center axis concentric with the first electrode.Type: ApplicationFiled: March 10, 2016Publication date: October 20, 2016Applicant: FUJITSU LIMITEDInventors: Yoshiyuki Hiroshima, Naoki Nakamura, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukoyama, Tetsuro Yamada, Kohei Choraku
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Publication number: 20160192486Abstract: A circuit board disclosed herein includes: two substrates opposed to each other, where a dielectric being interposed between the two substrates; a through hole formed in each of the two substrates and filled with the dielectric; a first conductor film formed on an inner surface of the through hole; and a second conductor film covering the through hole on a main surface of each of the two substrates on an opposite side to the dielectric, the second conductor film being connected to the first conductor film on the main surface side.Type: ApplicationFiled: November 2, 2015Publication date: June 30, 2016Applicant: FUJITSU LIMITEDInventors: Mitsuhiko Sugane, AKIKO MATSUI, Takahide Mukoyama, Tetsuro Yamada, YOSHIYUKI HIROSHIMA, Kohei Choraku
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Patent number: 9148958Abstract: An electronic device includes an electronic component including a plurality of terminals and a circuit board on which the electronic component is mounted. The circuit board includes a board body, a plurality of electrode pads arranged on the board body, each of the electrode pads being connected to each of the terminals by solder, a first solder resist formed on the board body and having a plurality of first openings, each of the first openings accommodating each of the electrode pads, and a second solder resist formed on the first solder resist and having a plurality of second openings, each of the second openings being larger than each of the first openings and communicating with each of the first openings.Type: GrantFiled: December 31, 2014Date of Patent: September 29, 2015Assignee: FUJITSU LIMITEDInventors: Yoshiyuki Hiroshima, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukoyama, Tetsuro Yamada, Takahiro Ooi
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Patent number: 9049794Abstract: A wiring substrate includes an insulation layer including a thermosetting resin and a reinforcement member having plural first fiber bundles and plural second fiber bundles woven together, the second fiber bundles being intersected with the first fiber bundles, and a pair of differential wirings arranged alongside each other on the insulation layer. The first fiber bundles and the second fiber bundles have a curved portion relative to a plan direction of the insulation layer in a region on which the pair of differential wirings is arranged.Type: GrantFiled: March 30, 2011Date of Patent: June 2, 2015Assignee: FUJITSU LIMITEDInventors: Yoshihiro Morita, Takahiro Ooi, Tetsuro Yamada, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukoyama
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Publication number: 20150116962Abstract: An electronic device includes an electronic component including a plurality of terminals and a circuit board on which the electronic component is mounted. The circuit board includes a board body, a plurality of electrode pads arranged on the board body, each of the electrode pads being connected to each of the terminals by solder, a first solder resist formed on the board body and having a plurality of first openings, each of the first openings accommodating each of the electrode pads, and a second solder resist formed on the first solder resist and having a plurality of second openings, each of the second openings being larger than each of the first openings and communicating with each of the first openings.Type: ApplicationFiled: December 31, 2014Publication date: April 30, 2015Inventors: Yoshiyuki HIROSHIMA, Akiko MATSUI, Mitsuhiko SUGANE, Takahide MUKOYAMA, Tetsuro YAMADA, Takahiro OOI
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Patent number: 8958211Abstract: An electronic device includes an electronic component including a plurality of terminals and a circuit board on which the electronic component is mounted. The circuit board includes a board body, a plurality of electrode pads arranged on the board body, each of the electrode pads being connected to each of the terminals by solder, a first solder resist formed on the board body and having a plurality of first openings, each of the first openings accommodating each of the electrode pads, and a second solder resist formed on the first solder resist and having a plurality of second openings, each of the second openings being larger than each of the first openings and communicating with each of the first openings.Type: GrantFiled: November 21, 2011Date of Patent: February 17, 2015Assignee: Fujitsu LimitedInventors: Yoshiyuki Hiroshima, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukoyama, Tetsuro Yamada, Takahiro Ooi