Patents by Inventor Mitsuhiko Sugane
Mitsuhiko Sugane has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8648260Abstract: A wiring substrate includes differential wirings; a first insulating layer adjacent to one side of the differential wirings, including first fiber bundles parallel to the differential wirings; a second insulating layer adjacent to another side of the differential wirings, including second fiber bundles parallel to the differential wirings and disposed by the same pitch as the first fiber bundles; a third insulating layer on the first insulating layer on a side opposite to the differential wirings, including third fiber bundles in parallel to the differential wirings; and a fourth insulating layer on the second insulating layer on a side opposite to the differential wirings, including fourth fiber bundles in parallel to the differential wirings. Intervals of the third and fourth fiber bundles are respectively narrower than intervals of the first and second fiber bundles. The differential wirings are disposed between adjacent first fiber bundles, and between adjacent second fiber bundles.Type: GrantFiled: March 30, 2011Date of Patent: February 11, 2014Assignee: Fujitsu LimitedInventors: Takahiro Ooi, Yoshihiro Morita, Akiko Matsui, Tetsuro Yamada, Mitsuhiko Sugane, Takahide Mukoyama
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Patent number: 8513537Abstract: A printed board includes an insulating body that has a flat surface and includes insulating cloth including first fibers and second fibers that cross the first fibers at right angles on the flat surface, and printed wiring including a plurality of signal lines that run parallel to each other and are laid out on the flat surface of the insulating body so that a direction of the signal lines is tilted to a direction of the first or second fibers at an angle which is determined based on board-cutting efficiency of the insulating body and a predetermined delay-time difference between the signal lines.Type: GrantFiled: August 20, 2010Date of Patent: August 20, 2013Assignee: Fujitsu LimitedInventors: Takahiro Ooi, Tetsuro Yamada, Yoshihiro Morita, Akiko Matsui, Mitsuhiko Sugane, Takahide Mukouyama
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Publication number: 20120234587Abstract: A printed wiring board is disclosed that includes insulating layers, conductive layers stacked with the insulating layers alternately, a through hole penetrating the insulating layers and the conductive layers, a first plate resist part formed on a first portion of an inner wall of the through hole, the first portion being located from one end of the through hole to one of the conductive layers stacked between one pair of the insulating layers, and a plated part formed on a second portion of the inner wall of the through hole other than the first portion.Type: ApplicationFiled: March 8, 2012Publication date: September 20, 2012Applicant: FUJITSU LIMITEDInventors: Naoki NAKAMURA, Mitsuhiko SUGANE, Akiko MATSUI, Tetsuro YAMADA, Takahide MUKOYAMA, Yoshiyuki HIROSHIMA, Takahiro OOI
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Publication number: 20120188735Abstract: An electronic device includes an electronic component including a plurality of terminals and a circuit board on which the electronic component is mounted. The circuit board includes a board body, a plurality of electrode pads arranged on the board body, each of the electrode pads being connected to each of the terminals by solder, a first solder resist formed on the board body and having a plurality of first openings, each of the first openings accommodating each of the electrode pads, and a second solder resist formed on the first solder resist and having a plurality of second openings, each of the second openings being larger than each of the first openings and communicating with each of the first openings.Type: ApplicationFiled: November 21, 2011Publication date: July 26, 2012Applicant: FUJITSU LIMITEDInventors: Yoshiyuki HIROSHIMA, Akiko MATSUI, Mitsuhiko SUGANE, Takahide MUKOYAMA, Tetsuro YAMADA, Takahiro OOI
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Publication number: 20120106105Abstract: A wiring board unit includes a connector having a plurality of terminals; and a wiring board on which the connector is mounted. The wiring board includes a first wiring pattern provided on a first wiring layer, a second wiring pattern provided on a second wiring layer at a position shallower than the first wiring layer, a first via formed in a first recess having a first depth, the first via being in contact with the first wiring pattern, and a second via formed in a second recess having a second depth that is smaller than the first depth, the second via being in contact with the second wiring pattern.Type: ApplicationFiled: October 11, 2011Publication date: May 3, 2012Applicant: FUJITSU LIMITEDInventors: Mitsuhiko SUGANE, Takahide Mukoyama, Tetsuro Yamada, Yoshiyuki Hiroshima, Takahiro Ooi, Midori Kobayashi, Akiko Matsui
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Publication number: 20120032700Abstract: A method for evaluating a multilayer wiring board is provided. The multilayer wiring board includes an inner-layer on which a test pattern is disposed. The method includes arranging a plurality of first patterns and a second pattern of the test pattern such that the first patterns have a comb-like shape opposed to one another, and the second pattern has an unbranched shape extending between the opposed first patterns. A voltage is applied between the first patterns and the second pattern. An impedance of the second pattern is measured.Type: ApplicationFiled: July 18, 2011Publication date: February 9, 2012Applicant: FUJITSU LIMITEDInventor: Mitsuhiko SUGANE
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Patent number: 8102660Abstract: There is provided a multi-layer printed wiring board that can perform impedance control, concurrently maintaining the flexibility of a flexible portion with one or more signal lines. Such a multi-layer printed wiring board includes a plurality of rigid board units; and a flexible board unit, connecting outer layers or inner layers of the plurality of rigid board units and extending over the outer layers or the inner layers of the plurality of rigid board units. The flexible board unit includes a signal layer sending signals between the plurality of rigid board units; ground layers sandwiching the signal layer; and intermediate layers each interposed between the signal layer and one of the ground layers.Type: GrantFiled: December 24, 2008Date of Patent: January 24, 2012Assignee: Fujitsu LimitedInventors: Mitsuhiko Sugane, Kazuya Nishida, Akira Okada
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Publication number: 20110308840Abstract: A wiring substrate includes differential wirings; a first insulating layer adjacent to one side of the differential wirings, including first fiber bundles parallel to the differential wirings; a second insulating layer adjacent to another side of the differential wirings, including second fiber bundles parallel to the differential wirings and disposed by the same pitch as the first fiber bundles; a third insulating layer on the first insulating layer on a side opposite to the differential wirings, including third fiber bundles in parallel to the differential wirings; and a fourth insulating layer on the second insulating layer on a side opposite to the differential wirings, including fourth fiber bundles in parallel to the differential wirings. Intervals of the third and fourth fiber bundles are respectively narrower than intervals of the first and second fiber bundles. The differential wirings are disposed between adjacent first fiber bundles, and between adjacent second fiber bundles.Type: ApplicationFiled: March 30, 2011Publication date: December 22, 2011Applicant: FUJITSU LIMITEDInventors: Takahiro OOI, Yoshihiro MORITA, Akiko MATSUI, Tetsuro YAMADA, Mitsuhiko SUGANE, Takahide MUKOYAMA
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Publication number: 20110308842Abstract: A wiring substrate includes an insulation layer including a thermosetting resin and a reinforcement member having plural first fiber bundles and plural second fiber bundles woven together, the second fiber bundles being intersected with the first fiber bundles, and a pair of differential wirings arranged alongside each other on the insulation layer. The first fiber bundles and the second fiber bundles have a curved portion relative to a plan direction of the insulation layer in a region on which the pair of differential wirings is arranged.Type: ApplicationFiled: March 30, 2011Publication date: December 22, 2011Applicant: FUJITSU LIMITEDInventors: Yoshihiro MORITA, Takahiro OOI, Tetsuro YAMADA, Akiko MATSUI, Mitsuhiko SUGANE, Takahide MUKOYAMA
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Publication number: 20110241233Abstract: A method for manufacturing an optical waveguide in which multiple cores are embedded in a parallel-arranged fashion within a single cladding, the cores having a refractive index of light different from that of the cladding, the method includes forming the multiple cores in a state where the adjacent cores are connected by a rib, forming the cladding around the rib and the multiple cores by curing a cladding material there around, and a cutting to the rib.Type: ApplicationFiled: March 28, 2011Publication date: October 6, 2011Applicant: FUJITSU LIMITEDInventors: Yoshihiro MORITA, Takahiro OOI, Tetsuro YAMADA, Akiko MATSUI, Mitsuhiko SUGANE, Takahide MUKOUYAMA
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Publication number: 20110139492Abstract: A multilayer flexible printed circuit board includes a core material made of an insulating material having bendability. A solid layer is provided on one surface of the core material. The solid layer is made of an electrically conductive material to form a ground plane. A wiring layer is provided on the other surface of the core material. The wiring layer is made of an electrically conductive material having a controlled impedance. The core material, the solid layer and the wiring layer together form one set of lamination. A plurality of sets of the lamination are laminated via an insulation layer.Type: ApplicationFiled: February 24, 2011Publication date: June 16, 2011Applicant: FUJITSU LIMITEDInventor: Mitsuhiko Sugane
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Patent number: 7956292Abstract: A printed circuit board manufacturing method includes: a hole-forming step of forming a through hole in a substrate that will become an element of a printed circuit board after manufacturing; and a jig insertion step of inserting a jig in the through hole formed in the hole-forming step such that the jig adheres to a portion of an inner wall of the through hole, the inner wall having a portion connecting to the outside of the through hole. The method further includes a conductive-film forming step of forming a conductive film only on the portion of the inner wall of the through hole connecting to the outside of the through hole, after the jig is inserted into the through hole in the jig insertion step.Type: GrantFiled: December 13, 2007Date of Patent: June 7, 2011Assignee: Fujitsu LimitedInventor: Mitsuhiko Sugane
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Publication number: 20110073354Abstract: A printed board includes an insulating body that has a flat surface and includes insulating cloth including first fibers and second fibers that cross the first fibers at right angles on the flat surface, and printed wiring including a plurality of signal lines that run parallel to each other and are laid out on the flat surface of the insulating body so that a direction of the signal lines is tilted to a direction of the first or second fibers at an angle which is determined based on board-cutting efficiency of the insulating body and a predetermined delay-time difference between the signal lines.Type: ApplicationFiled: August 20, 2010Publication date: March 31, 2011Applicant: FUJITSU LIMITEDInventors: Takahiro OOI, Tetsuro YAMADA, Yoshihiro MORITA, Akiko MATSUI, Mitsuhiko SUGANE, Takahide MUKOUYAMA
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Publication number: 20090279273Abstract: There is provided a multi-layer printed wiring board that can perform impedance control, concurrently maintaining the flexibility of a flexible portion with one or more signal lines. Such a multi-layer printed wiring board includes a plurality of rigid board units; and a flexible board unit, connecting outer layers or inner layers of the plurality of rigid board units and extending over the outer layers or the inner layers of the plurality of rigid board units. The flexible board unit includes a signal layer sending signals between the plurality of rigid board units; ground layers sandwiching the signal layer; and intermediate layers each interposed between the signal layer and one of the ground layers.Type: ApplicationFiled: December 24, 2008Publication date: November 12, 2009Applicant: FUJITSU LIMITEDInventors: Mitsuhiko SUGANE, Kazuya NISHIDA, Akira OKADA
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Publication number: 20090173532Abstract: A wiring board has a substrate having a first surface and a second surface opposite to the first surface, at least one wiring layer being formed between the first surface and the second surface. A non-through hole is formed in the substrate with a depth from the first surface to reach the wiring layer, an inner surface of the non-through hole being plated. A vent hole is formed in the substrate to extend between an end of the non-through hole and the second surface of the substrate. A plated portion of the non-through hole is connected to the wiring layer. An inner diameter of the vent hole is smaller than an inner diameter of the plated portion of the non-through hole.Type: ApplicationFiled: January 7, 2009Publication date: July 9, 2009Applicant: FUJITSU LIMITEDInventor: Mitsuhiko SUGANE
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Publication number: 20080201945Abstract: A printed circuit board manufacturing method includes: a hole-forming step of forming a through hole in a substrate that will become an element of a printed circuit board after manufacturing; and a jig insertion step of inserting a jig in the through hole formed in the hole-forming step such that the jig adheres to a portion of an inner wall of the through hole, the inner wall having a portion connecting to the outside of the through hole. The method further includes a conductive-film forming step of forming a conductive film only on the portion of the inner wall of the through hole connecting to the outside of the through hole, after the jig is inserted into the through hole in the jig insertion step.Type: ApplicationFiled: December 13, 2007Publication date: August 28, 2008Applicant: FUJITSU LIMITEDInventor: Mitsuhiko Sugane