Patents by Inventor Mitsuhiro Yoshimura

Mitsuhiro Yoshimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11964416
    Abstract: A resin part includes a molded main body that has a plate shape with a longitudinal direction and is constituted of an injection-molded product. The resin part has a gate portion that is a vestige of a resin injection gate. The gate portion is located in an end face part of the molded main body to cross a position corresponding to a center of gravity of the molded main body; the end face part extends in the longitudinal direction of the molded main body.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: April 23, 2024
    Assignee: DENSO CORPORATION
    Inventors: Yohei Yoshimura, Takeshi Kusano, Kentaro Fukuda, Mitsuhiro Suzuki
  • Patent number: 11879461
    Abstract: An oil pump includes: a shaft member; an inner rotor configured to rotate integrally with the shaft member; an outer rotor forming a rotor chamber into which oil is sucked from a suction passage and from which the oil is discharged toward a discharge passage, between the inner rotor and the outer rotor; a body member having a recess-shaped housing chamber in which each rotor is housed so as to be rotatable about an axis; and a cover member attached so as to close the housing chamber. The rotor chamber has first and second suction ports through each of which the oil to be sucked from the suction passage passes. The oil pump includes a straightening member branching the suction passage from a main path to the first suction port side and the second suction port side.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: January 23, 2024
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Shinya Sakai, Mitsuhiro Yoshimura, Jang Myong Hwan, Shoma Suzuki
  • Publication number: 20220381240
    Abstract: An oil pump includes: a shaft member; an inner rotor configured to rotate integrally with the shaft member; an outer rotor forming a rotor chamber into which oil is sucked from a suction passage and from which the oil is discharged toward a discharge passage, between the inner rotor and the outer rotor; a body member having a recess-shaped housing chamber in which each rotor is housed so as to be rotatable about an axis; and a cover member attached so as to close the housing chamber. The rotor chamber has first and second suction ports through each of which the oil to be sucked from the suction passage passes. The oil pump includes a straightening member branching the suction passage from a main path to the first suction port side and the second suction port side.
    Type: Application
    Filed: May 12, 2022
    Publication date: December 1, 2022
    Inventors: Shinya SAKAI, Mitsuhiro YOSHIMURA, JANG MYONG HWAN, Shoma SUZUKI
  • Patent number: 11480172
    Abstract: A gear pump includes: an inner rotor having external teeth; an outer rotor having a tubular inner housing portion in which the inner rotor is rotatably housed in an eccentric state, and internal teeth meshing with the external teeth; a first core having a tubular rotor housing portion in which the inner and outer rotors are housed, and a flange portion projecting radially outward from a tube wall of the rotor housing portion; a board-shaped second core having a contact portion in contact with the flange portion in an axial direction, and closing an opening of the rotor housing portion; and a housing opposing the second core and made of a resin. A gap is formed between opposing surfaces of the second core and the housing in a state where the flange portion is in contact with the contact portion and the housing opposes the second core.
    Type: Grant
    Filed: September 3, 2020
    Date of Patent: October 25, 2022
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Mitsuhiro Yoshimura, Shinya Sakai
  • Patent number: 11460214
    Abstract: In a duct device that includes a duct body 9 having: an air flow path 90 defined thereinside; and a first divisional body 1 and a second divisional body 5 combined in a combining direction in which the first and second divisional bodies 1 and 5 approach each other, at time of positioning when a first duct portion 2 and a second duct portion 6 oppose each other, and an engagement portion 33 and an engagement projection 7 do not engage with each other, an outer wall portion 65 covers, from an outer side, a tip portion 21 that is a front end of the first duct portion 2, and the engagement portion 33 contacts with the engagement projection 7 in the combining direction, and covers a second engagement surface 72 that is a rear end of the engagement projection 7, with an engagement wrap portion 35, from the outer side.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: October 4, 2022
    Assignee: TOYODA GOSEI CO., LTD.
    Inventors: Mitsuhiro Yoshimura, Tomohiro Hirano
  • Patent number: 11222972
    Abstract: A semiconductor device includes a semiconductor substrate, a trench provided in the semiconductor substrate, a trench gate formed in the trench, a vertical transistor having the trench gate, an active region having the vertical transistor, a field region surrounding the active region and having a protection diode, and a field insulating film formed on a surface of the semiconductor substrate, the protection diode being formed on the field insulating film. The trench gate includes a first polysilicon layer and has an embedded part embedded in the trench and an extension part connected to the embedded part and extending onto the surface of the semiconductor substrate, the protection diode includes a second polysilicon layer thicker than the first polysilicon layer, and an overlapping part having the second polysilicon layer is formed on the extension part.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: January 11, 2022
    Assignee: Ablic Inc.
    Inventor: Mitsuhiro Yoshimura
  • Publication number: 20210095663
    Abstract: A gear pump includes: an inner rotor having external teeth; an outer rotor having a tubular inner housing portion in which the inner rotor is rotatably housed in an eccentric state, and internal teeth meshing with the external teeth; a first core having a tubular rotor housing portion in which the inner and outer rotors are housed, and a flange portion projecting radially outward from a tube wall of the rotor housing portion; a board-shaped second core having a contact portion in contact with the flange portion in an axial direction, and closing an opening of the rotor housing portion; and a housing opposing the second core and made of a resin. A gap is formed between opposing surfaces of the second core and the housing in a state where the flange portion is in contact with the contact portion and the housing opposes the second core.
    Type: Application
    Filed: September 3, 2020
    Publication date: April 1, 2021
    Inventors: Mitsuhiro YOSHIMURA, Shinya SAKAI
  • Patent number: 10811523
    Abstract: A semiconductor device having a first surface formed at a first height and a second surface formed at a second height on a semiconductor substrate includes: a base region formed in the semiconductor substrate; a trench formed from the first surface and the second surface into the semiconductor substrate; a gate insulating film covering an inner side of the trench; a gate electrode embedded to a third height; an insulating film formed on the gate electrode; a first region which has the first surface and in which a base contact region is formed; and a second region which has the second surface and in which a source region is formed, the first region and the second region being alternately arranged in the trench extension direction to prevent a reduction in channel formation density.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: October 20, 2020
    Assignee: ABLIC INC.
    Inventors: Mitsuhiro Yoshimura, Masahiro Hatakenaka
  • Patent number: 10797043
    Abstract: Provided is a semiconductor device, including: a drain region of a first conductivity type and a source region of the first conductivity type in a semiconductor substrate; a base region of a second conductivity type between the drain region and the source region; a base contact region of the second conductivity type in the base region; a gate electrode on the base region through a gate insulating film; a bidirectional diode overlapping with the gate electrode in a first direction perpendicular to the semiconductor substrate, and having one end electrically connected to the gate electrode and the other end electrically connected to the source region; a source metal layer electrically connected to the source region, the base contact region, and the other end of the bidirectional diode; and a gate metal layer electrically connected to the gate electrode, and overlapping with the source metal layer in the first direction.
    Type: Grant
    Filed: January 7, 2019
    Date of Patent: October 6, 2020
    Assignee: ABLIC INC.
    Inventor: Mitsuhiro Yoshimura
  • Publication number: 20200312993
    Abstract: A semiconductor device includes a semiconductor substrate, a trench provided in the semiconductor substrate, a trench gate formed in the trench, a vertical transistor having the trench gate, an active region having the vertical transistor, a field region surrounding the active region and having a protection diode, and a field insulating film formed on a surface of the semiconductor substrate, the protection diode being formed on the field insulating film. The trench gate includes a first polysilicon layer and has an embedded part embedded in the trench and an extension part connected to the embedded part and extending onto the surface of the semiconductor substrate, the protection diode includes a second polysilicon layer thicker than the first polysilicon layer, and an overlapping part having the second polysilicon layer is formed on the extension part.
    Type: Application
    Filed: March 20, 2020
    Publication date: October 1, 2020
    Inventor: Mitsuhiro YOSHIMURA
  • Publication number: 20200103136
    Abstract: In a duct device that includes a duct body 9 having: an air flow path 90 defined thereinside; and a first divisional body 1 and a second divisional body 5 combined in a combining direction in which the first and second divisional bodies 1 and 5 approach each other, at time of positioning when a first duct portion 2 and a second duct portion 6 oppose each other, and an engagement portion 33 and an engagement projection 7 do not engage with each other, an outer wall portion 65 covers, from an outer side, a tip portion 21 that is a front end of the first duct portion 2, and the engagement portion 33 contacts with the engagement projection 7 in the combining direction, and covers a second engagement surface 72 that is a rear end of the engagement projection 7, with an engagement wrap portion 35, from the outer side.
    Type: Application
    Filed: July 3, 2019
    Publication date: April 2, 2020
    Inventors: Mitsuhiro YOSHIMURA, Tomohiro HIRANO
  • Patent number: 10475916
    Abstract: A semiconductor device in which a trench in a cell outer peripheral region configured to pull out a gate electrode and a trench in a cell region having a vertical transistor are formed with the same width to enable a reduction in chip area, and a manufacturing method thereof in which a gate contact hole is formed directly on a trench in a cell outer peripheral region on a self-alignment basis, and a gate wiring electrode is connected thereto are provided.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: November 12, 2019
    Assignee: ABLIC INC.
    Inventors: Masahiro Hatakenaka, Mitsuhiro Yoshimura
  • Publication number: 20190252542
    Abstract: Provided is a semiconductor device, including: a drain region of a first conductivity type and a source region of the first conductivity type in a semiconductor substrate; a base region of a second conductivity type between the drain region and the source region; a base contact region of the second conductivity type in the base region; a gate electrode on the base region through a gate insulating film; a bidirectional diode overlapping with the gate electrode in a first direction perpendicular to the semiconductor substrate, and having one end electrically connected to the gate electrode and the other end electrically connected to the source region; a source metal layer electrically connected to the source region, the base contact region, and the other end of the bidirectional diode; and a gate metal layer electrically connected to the gate electrode, and overlapping with the source metal layer in the first direction.
    Type: Application
    Filed: January 7, 2019
    Publication date: August 15, 2019
    Inventor: Mitsuhiro Yoshimura
  • Patent number: 10263076
    Abstract: To obtain a semiconductor device in which a reduction in channel formation density in a trench extending direction is suppressed, provided is a semiconductor device including a first region and a second region alternately arranged in the trench extending direction. The first region includes a first front surface semiconductor electrode layer of a first conductivity type having a portion along an outer side surface of the trench from the front surface of the semiconductor device to the first height to which a gate electrode is embedded into the trench. The second region includes a base contact region having a depth from the front surface of the semiconductor device to the second height higher than the first height and a second front surface semiconductor electrode layer of the first conductivity type from the first height to the second height.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: April 16, 2019
    Assignee: ABLIC INC.
    Inventors: Mitsuhiro Yoshimura, Masahiro Hatakenaka
  • Publication number: 20180286975
    Abstract: A semiconductor device in which a trench in a cell outer peripheral region configured to pull out a gate electrode and a trench in a cell region having a vertical transistor are formed with the same width to enable a reduction in chip area, and a manufacturing method thereof in which a gate contact hole is formed directly on a trench in a cell outer peripheral region on a self-alignment basis, and a gate wiring electrode is connected thereto are provided.
    Type: Application
    Filed: March 28, 2018
    Publication date: October 4, 2018
    Inventors: Masahiro HATAKENAKA, Mitsuhiro YOSHIMURA
  • Publication number: 20180286970
    Abstract: A semiconductor device having a first surface formed at a first height and a second surface formed at a second height on a semiconductor substrate includes: a base region formed in the semiconductor substrate; a trench formed from the first surface and the second surface into the semiconductor substrate; a gate insulating film covering an inner side of the trench; a gate electrode embedded to a third height; an insulating film formed on the gate electrode; a first region which has the first surface and in which a base contact region is formed; and a second region which has the second surface and in which a source region is formed, the first region and the second region being alternately arranged in the trench extension direction to prevent a reduction in channel formation density.
    Type: Application
    Filed: March 27, 2018
    Publication date: October 4, 2018
    Inventors: Mitsuhiro YOSHIMURA, Masahiro HATAKENAKA
  • Publication number: 20180269287
    Abstract: To obtain a semiconductor device in which a reduction in channel formation density in a trench extending direction is suppressed, provided is a semiconductor device including a first region and a second region alternately arranged in the trench extending direction. The first region includes a first front surface semiconductor electrode layer of a first conductivity type having a portion along an outer side surface of the trench from the front surface of the semiconductor device to the first height to which a gate electrode is embedded into the trench. The second region includes a base contact region having a depth from the front surface of the semiconductor device to the second height higher than the first height and a second front surface semiconductor electrode layer of the first conductivity type from the first height to the second height.
    Type: Application
    Filed: January 18, 2018
    Publication date: September 20, 2018
    Inventors: Mitsuhiro YOSHIMURA, Masahiro HATAKENAKA
  • Publication number: 20110138731
    Abstract: Provided is a wind turbine generator having a tower structure that can cope with increases in the size and height thereof while avoiding the restrictions of transportation limits. In a wind turbine generator in which a nacelle is installed at a top portion of a monopole type wind turbine tower, in which tower shells having circular cylindrical shapes are connected together, to generate power, the tower is provided with a double-tube structure at least at the bottom end of the tower.
    Type: Application
    Filed: December 9, 2010
    Publication date: June 16, 2011
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Mitsuhiro YOSHIMURA, Hiroshi HORIE
  • Patent number: 7843003
    Abstract: An insulated gate semiconductor device includes a one conductivity type semiconductor layer, a first operation part in a surface of the semiconductor layer and a second operation part in the surface of the semiconductor layer that is smaller in area than the first operation part. A first channel region and a first transistor of an opposite conductivity type are provided in the first operation part and a second channel region and a second transistor of the opposite conductivity type are provided in the second operation part. The first operation part is disposed around the second operation part. Accordingly, design rules for four corner portions can be made uniform and depletion layer spreading in corner portions at a peripheral edge of a channel region of an operation part in application of a reverse voltage is also made approximately uniform. Thus, stable VDSS breakdown voltage characteristics can be obtained.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: November 30, 2010
    Assignee: Sanyo Electric Co., Ltd
    Inventors: Mitsuhiro Yoshimura, Hiroko Inomata
  • Patent number: 7709890
    Abstract: An isolation region is provided around a sense part. The isolation region is provided to have a depth that suppresses spread of a region with an uneven current distribution, which occurs at a peripheral edge of the sense part. Thus, in the sense part, an influence of the region with the uneven current distribution can be suppressed. Since the current distribution can be set more even throughout the sense part, the on-resistance in the sense part can be set closer to its designed value. Thus, a current ratio corresponding to a cell ratio can be obtained as designed. Consequently, current detection accuracy is improved.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: May 4, 2010
    Assignees: SANYO Electric Co., Ltd., SANYO Semiconductor Co., Ltd
    Inventor: Mitsuhiro Yoshimura