Abstract: An information processing apparatus includes a first display controller, an accepting unit, a grouping unit, and a memory controller. The first display controller controls a display to display plural images representing respective files. The accepting unit accepts an operation for selecting at least two or more images from among the plural images. The grouping unit forms a group by associating plural files represented by the at least two or more images with one another with the at least two or more images kept displayed on the display in a case where the accepting unit has accepted the operation. The memory controller controls a memory to store information indicating display positions of the at least two or more images on a screen in association with the group that has been formed by the grouping unit.

Abstract: A method for manufacturing a sheet heating element includes preparing a sheet member containing a metal or alloy, and performing anodic oxidizing treatment on the sheet member until only a surface layer of the sheet member is oxidized while a center portion thereof is not oxidized.

Abstract: A nonvolatile semiconductor memory device that have a new structure are provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device of the present invention is a nonvolatile semiconductor memory device that has a plurality of the memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.

Abstract: A PCIe switch stores therein a first identifier used by a CPU to identify a device, a second identifier that is a common identifier to identify the device in a network formed among a plurality of switches that connect the CPU to the device, and a destination of an access request to the device in an associated manner. When having received an access request from the CPU, the PCIe switch identifies a second identifier and a destination that are associated with a first identifier included in the access request. After that, the PCIe switch adds the identified second identifier to the access request, and transmits the access request with the second identifier added to the identified destination.

Abstract: An information processing apparatus includes a switch unit configured to connect some of the arithmetic processing devices and some of the storage devices in accordance with connection information, a first control unit being configured to output physical information converted from the logical information of the arithmetic processing device at the transmission destination and the physical information of the corresponding arithmetic processing device via a transfer path in accordance with the correlation information, a second control unit configured to change the connection information in response to occurrence of a failure of some arithmetic processing device in the system, and to control the switch unit such that the failed arithmetic processing device is replaced with another one included in the plural arithmetic processing devices.

Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The second insulating film seals the hole near an interface of the insulating layer and the select gate. The second insulating film is provided on a side wall of the channel body with a space left in the hole above the select gate. The method can include burying a semiconductor film in the space, in addition, forming a conductive film in contact with the channel body.

Abstract: According one embodiment, a nonvolatile semiconductor memory device, includes: a stacked body, and each of a plurality of electrode layers and each of a plurality of insulating layers being stacked alternately in the a stacked body; a first interlayer insulating film on the stacked body; a gate electrode on the first interlayer insulating film; a second interlayer insulating film on the gate electrode; a semiconductor layer extended from an upper end of the second interlayer insulating film to a lower end of the stacked body; a first insulating film between the semiconductor layer and each of the plurality of electrode layers; and a second insulating film between the semiconductor layer and the gate electrode, a thickness of the semiconductor layer provided above an upper end of the gate electrode being thicker than a thickness of the semiconductor layer provided below the upper end of the gate electrode.

Abstract: Provided is a double-decker tube dispenser that is not only compact but also highly portable, can be set easily on a cart, a desk, and the like, is capable of responding immediately in case of emergency such as disaster, and enables blood sampling tubes of different types to be prepared in response to blood sampling instructions from doctors. A blood sampling tube stocker device is arranged in an overlapping manner above a printing-and-pasting device, and hence a horizontal width can be extremely reduced. With this, the double-decker tube dispenser, which is not only significantly compact but also highly portable, and applicable not only to medium and small hospitals and hospital wards for inpatients, but also, for example, to facilities specializing in blood sampling, and enables use beside a sickbed, desktop use, and use on a mobile cart and the like in a state in which the dispenser is simply mounted thereon, is provided.

Abstract: According to one embodiment, a method for manufacturing a semiconductor device includes forming a plurality of insulating isolation sections provided so as to extend in a first direction, isolate the stacked body in a second direction, and have a projection projecting from the stacked body. Each insulating isolation section has a side wall including recessed sections and projected sections repeated along the first direction. The method includes forming a sidewall film on a side wall of the projection of the insulating isolation section, and forming a plurality of first holes surrounded by the sidewall film and isolated by the sidewall film in the first direction, between the plurality of insulating isolation sections. The method includes forming a second hole in the stacked body provided under the first hole by etching with the insulating isolation section and the sidewall film used as a mask.

Abstract: [Problem] To provide an apparatus for measuring a sensory threshold at the time of application of a moving stimulus to a sole simply with high reproducibility and evaluating peripheral neuropathy originating in diabetes. [Solution] Provided are a foot pedestal 2, a probe 4 for applying a moving stimulus to a sole, and a probe driving structure 3, disposed on a base 1, for operating the probe 4 to separately move in directions intersecting at right angles along the sole. Also provided are an input switch 5 to be operated by a subject recognizing a moving stimulus, a drive controller 51 for controlling drive condition of the probe driving structure 3, and a main controller B for evaluating a measured sensory threshold. The main controller B preliminarily stores reference data of known sensory thresholds obtained by applying a moving stimulus to a sole of patients, and age correction factors calculated from standard values of sensory thresholds based on different ages of patients.

Abstract: A nonvolatile semiconductor memory device that has a new structure is provided, in which memory cells are laminated in a three dimensional state so that the chip area may be reduced. The nonvolatile semiconductor memory device has a plurality of memory strings, in which a plurality of electrically programmable memory cells is connected in series. The memory strings comprise a pillar shaped semiconductor; a first insulation film formed around the pillar shaped semiconductor; a charge storage layer formed around the first insulation film; the second insulation film formed around the charge storage layer; and first or nth electrodes formed around the second insulation film (n is natural number more than 1). The first or nth electrodes of the memory strings and the other first or nth electrodes of the memory strings are respectively the first or nth conductor layers that are spread in a two dimensional state.

Abstract: According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The second insulating film seals the hole near an interface of the insulating layer and the select gate. The second insulating film is provided on a side wall of the channel body with a space left in the hole above the select gate. The method can include burying a semiconductor film in the space, in addition, forming a conductive film in contact with the channel body.

Abstract: The semiconductor memory device of the present invention includes a plurality of memory strings having a plurality of electrically reprogrammable memory cells connected in series, the memory strings having a column shaped semiconductor, a first insulation film formed around the column shaped semiconductor, a charge accumulation layer formed around the first insulation film, a second insulation film formed around the charge accumulation film and a plurality of electrodes formed around the second insulation film, a bit line connected to one end of the memory strings via a plurality of selection transistors, and a conducting layer extending in two dimensions and in which the plurality of electrodes of the memory strings and the plurality of electrodes of different memory strings are shared respectively, wherein each end part of the conducting layer is formed in step shapes in a direction parallel with the bit line.

Abstract: An information processing apparatus includes a storage device, an arithmetic processing unit, a first converting device, and a second converting device. The storage device outputs data in accordance with a memory access request. The arithmetic processing unit performs an arithmetic operation on the data. The first converting device converts a memory access request issued by the arithmetic processing unit to a memory access signal and sends to the storage device. The second converting device converts a memory access request issued by the arithmetic processing unit to a memory access signal, acquires the memory access signal sent by the first converting device, and compares the content of a memory access performed by using the converted memory access signal with the content of a memory access performed by using the acquired memory access signal, and determines whether the first converting device has failed.

Abstract: An automatic banding packing machine is provided with a packing machine body having an upper-face table on which the object to be packed passes, a pair of vertical band guide arches arranged separately from each other above the upper-face table in a direction parallel with a passage direction of the object to be packed, and a horizontal band guide arch arranged above the upper-face table in the direction parallel with the passage direction of the object to be packed, and the pair of vertical band guide arches is configured to be movable between a standby position separated from the horizontal band guide arch and a communication position communicating with the horizontal band guide arch in a direction orthogonal to the passage direction of the object to be packed.

Abstract: There is provided a switching control device configured to control switching of an access of a host computer communicating with a first switch connected to a first input/output device and a second switch connected to a second input/output device, the switching control device including: a monitor configured to monitor an access of the host computer to the first computer; a memory controller configured to extract setting information to be set in the first switch from the monitored access, the setting information being used to couple the first input/output devices with the host computer, the extracted setting information being stored; a setting controller configured to set the stored setting information into the second switch; and a switching controller configured to switch an access destination of the host computer from the first switch to the second switch, when a fault occurs in the first switch.

Abstract: An input/output connection device includes a generating section which generates an inspection packet that has a tag that uniquely identifies the packet, a transmitting section which transmits the inspection packet to the input/output device, a receiving section which receives a packet, a first determining section which determines, on the basis of a tag of the packet received by the receiving section, whether or not the received packet is a packet transmitted in response to the inspection packet transmitted by the transmitting section, and a second determining section which analyzes the received packet and determines whether or not the input/output device is normal when the first determining section determines that the received packet is the packet transmitted in response to the inspection packet.

Abstract: A determination unit determines whether there is error allowance information having the same error identification ID and the same error object as error information, and determines whether error related information is also the same when there is the same error allowance information. As a result, when there is error allowance information having the same error identification ID and the same error object as the error information and different error related information from the error information, the disablement unit disables error allowance.

Abstract: According to one embodiment, a nonvolatile semiconductor memory device includes: a stacked body, each of a plurality of electrode layers and each of a plurality of insulating layers being stacked alternately in the stacked body; an interlayer insulating film provided on the stacked body; a gate electrode provided on the interlayer insulating film; a semiconductor layer extending from an upper end of the gate electrode to a lower face of the stacked body; a first insulating film provided between the semiconductor layer and each of the plurality of electrode layers and including at least one layer of a nitride film; and a second insulating film provided between the gate electrode and the semiconductor layer and including at least one layer of a nitride film, a film thickness of at least a part of the second insulating film being thinner than a film thickness of the first insulating film.

Abstract: According one embodiment, a nonvolatile semiconductor memory device, includes: a stacked body, and each of a plurality of electrode layers and each of a plurality of insulating layers being stacked alternately in the a stacked body; a first interlayer insulating film on the stacked body; a gate electrode on the first interlayer insulating film; a second interlayer insulating film on the gate electrode; a semiconductor layer extended from an upper end of the second interlayer insulating film to a lower end of the stacked body; a first insulating film between the semiconductor layer and each of the plurality of electrode layers; and a second insulating film between the semiconductor layer and the gate electrode, a thickness of the semiconductor layer provided above an upper end of the gate electrode being thicker than a thickness of the semiconductor layer provided below the upper end of the gate electrode.