Patents by Inventor Mitsushi Ikeda
Mitsushi Ikeda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6323490Abstract: An X-ray semiconductor detector has a pixel array structure in which a plurality of pixel elements are arrayed in a matrix. Each pixel element includes an X-ray/charge conversion film for generating charges in accordance with an incident X-ray, a storage capacitor for storing the signal charges generated in the X-ray/charge conversion film, a signal read transistor for reading the signal charges from the storage capacitor, and a protective diode arranged to remove excessive charges from the storage capacitor and prevent dielectric breakdown of the signal read transistor. The protective diode is arranged below the storage capacitor. Since the protective diode is arranged below the storage capacitor, it does not decrease the pixel density. Since the protective diode is covered with the storage capacitor, it can be shielded from an X-ray. Therefore, variations in OFF current of the protective diode by an X-ray and dielectric breakdown of the protective diode can be prevented.Type: GrantFiled: March 19, 1999Date of Patent: November 27, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Mitsushi Ikeda, Manabu Tanaka, Masaki Atsuta, Akira Kinno, Kohei Suzuki, Norihiko Kamiura
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Publication number: 20010008271Abstract: A planar X-ray detector has an X-ray charge conversion film converting an incident X-ray into electric charges, pixel electrodes provided on the X-ray charge conversion film corresponding to respective pixels arranged in an array, switching elements connected to the respective pixel electrodes, signal lines, each of which is connected to a column of switching elements, scanning lines, each of which transmits driving signals to a raw of switching elements, and a common electrode provided on the surface of the X-ray charge conversion film opposite to the surface on which the pixel electrodes are provided. The X-ray charge conversion film contains an X-ray sensitive material made of inorganic semiconductor particles, and a carrier transport material made of an organic semiconductor.Type: ApplicationFiled: January 10, 2001Publication date: July 19, 2001Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Mitsushi Ikeda, Masaki Atsuta, Akira Kinno, Manabu Tanaka, Yasuhiro Sugawara
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Patent number: 6200694Abstract: A Mo—W material for the formation of wirings is discloses which, as viewed integrally, comprises 20 to 95% of tungsten and the balance of molybdenum and inevitable impurities by atomic percentage. The Mo—W material for wirings is a product obtained by compounding and integrating a Mo material and a W material as by the powder metallurgy technique or the smelting technique or a product obtained by arranging these materials in amounts calculated to account for the percentage composition mentioned above. The Mo—W material containing W in a proportion in the range of from 20 to 95% manifests low resistance and, at the same time, excels in workability and tolerance for etchants. The wiring thin film which is formed of the Mo—W alloy of this percentage composition is used as address wirings and others for liquid crystal display devices.Type: GrantFiled: December 1, 1998Date of Patent: March 13, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Yasuo Kohsaka, Yoshiharu Fukasawa, Yoshiko Tsuji, Mitsushi Ikeda, Michio Sato, Toshihiro Maki
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Patent number: 6185274Abstract: An image detecting device has a large dynamic range that deals with a plurality of image detecting modes. The image detecting device is composed of pixels e (i, j) arranged in a matrix array. Each pixel has a photoelectric element. In each pixel, a capacitor 102 and a protecting diode 103 are disposed. The capacitor 102 stores electric charge corresponding to the intensity of penetrated light to the relevant pixel. The protecting diode limits the capacitance. A bias voltage is supplied to the protecting diode 103 through a bias line Bias. The bias voltage is adjusted by a bias voltage controlling system 133 corresponding to the frame rate. Thus, the influence of a leak current in the off-state of the protecting diode 103 can be alleviated against electric charge stored in the capacitor 102. Consequently, an image with a high S/N ratio can be obtained regardless of the frame rate.Type: GrantFiled: March 10, 1999Date of Patent: February 6, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Akira Kinno, Masaki Atsuta, Takuya Sakaguchi, Manabu Tanaka, Mitsushi Ikeda, Kouhei Suzuki
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Patent number: 6078365Abstract: An active matrix liquid crystal panel includes a plurality of thin film transistors respectively arranged adjacent to pixel electrodes, and a plurality of auxiliary capacitances. Each transistor has a semiconductor active layer, a pair of source and drain electrodes, and a gate electrode opposing the active layer via a gate insulating film. Each auxiliary capacitance has upper and lower electrodes, and a dielectric layer sandwiched between the upper and lower electrodes. The gate electrode, the lower electrode, and an address line respectively have portions formed of a common refractory metal film arranged on the insulating surface of a support substrate. The source and drain electrodes, the upper electrode, and a signal line respectively have portions formed of a common Mo film. Each pixel electrode has a portion formed of an ITO film. Each auxiliary capacitance further has an intervening layer between the dielectric layer and the upper electrode.Type: GrantFiled: January 17, 1997Date of Patent: June 20, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Tomomasa Ueda, Yutaka Onozuka, Yujiro Hara, Shuichi Saito, Mitsushi Ikeda
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Patent number: 6044128Abstract: An X-ray imaging apparatus utilized in an imaging analysis apparatus that includes plural charge conversion devices for converting irradiated X-rays into electric charge and corresponding plural charge storage devices for storing the converted electric charge. Each charge conversion device and charge storage device represent a pixel in an image and are read by a thin film transistor. A thin film diode is connected to each charge storage device to discharge excessive stored voltage. The thin film diode has a Metal-Insulator-Metal (MIM structure), a Metal Semi-Insulator (MSI structure), or a Back-to-Back (BTB structure).Type: GrantFiled: February 4, 1998Date of Patent: March 28, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Manabu Tanaka, Mitsushi Ikeda, Kouhei Suzuki
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Patent number: 5913100Abstract: A Mo-W material for the formation of wirings is discloses which, as viewed integrally, comprises 20 to 95% of tungsten and the balance of molybdenum and inevitable impurities by atomic percentage. The Mo-W material for wirings is a product obtained by compounding and integrating a Mo material and a W material as by the powder metallurgy technique or the smelting technique or a product obtained by arranging these materials in amounts calculated to account for the percentage composition mentioned above. The Mo-W material containing W in a proportion in the range of from 20 to 95% manifests low resistance and, at the same time, excels in workability and tolerance for etchants. The wiring thin film which is formed of the Mo-W alloy of this percentage composition is used as address wirings and others for liquid crystal display devices.Type: GrantFiled: September 6, 1996Date of Patent: June 15, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Yasuo Kohsaka, Yoshiharu Fukasawa, Yoshiko Tsuji, Mitsushi Ikeda, Michio Sato, Toshihiro Maki
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Patent number: 5821622Abstract: The present invention provides a liquid crystal display device including a plurality of address wiring lines formed of an Mo--W alloy, a plurality of data wiring lines intersecting the address wiring lines, with insulating films interposed at intersection portions of the data wiring lines and the address wiring lines, display regions having pixel electrodes arranged respectively for the intersection portions, and a plurality of switching elements provided adjacent to the intersection portions and having control electrodes connected electrically to the address wiring lines, first main electrodes connected electrically to the data wiring liens, and second main electrodes connected electrically to the pixel electrodes.Type: GrantFiled: April 17, 1996Date of Patent: October 13, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Yoshiko Tsuji, Mitsushi Ikeda, Hisao Toeda, Yoshifumi Ogawa, Toshiyuki Oka
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Patent number: 5738948Abstract: The present invention discloses an electrode wiring material including at least one main element selected from the group consisting of Mo and W and an additional element selected from the group consisting of Kr and Xe in an amount of 0.0003 atomic % to 3 atomic %. The present invention further discloses an electrode wiring substrate including an electrode wiring formed on a glass substrate, wherein the electrode wiring is formed of at least one metal selected from the group consisting of Mo and W and the lattice constant of the electrode wiring material is almost equal to the lattice constant of the electrode wiring material in a bulk state.Type: GrantFiled: September 29, 1995Date of Patent: April 14, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Mitsushi Ikeda, Yoshiko Tsuji, Yujiro Hara, Masaki Atsuta, Yoshifumi Ogawa, Toshiyuki Oka, Momoko Takemura
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Patent number: 5706064Abstract: The present invention includes a substrate for a display device and a liquid crystal display device using the same having a functional layer at least partially made of an organic-inorganic hybrid glass. The present invention includes a method of manufacturing a substrate for a display device having the steps of forming a switching element on a substrate, forming a polysilane layer on the substrate, irradiating ultraviolet light to the polysilane layer, to form a latent image for a pattern, dipping the substrate into a dipping solution so that a material of the dipping solution soaks into the exposed portion, vitrificating the exposed portion by heating. According to the method, a pattern having different regions in characteristics (insulating, conductive, and coloring) can be formed easily by changing in composition of the dipping solution.Type: GrantFiled: March 29, 1996Date of Patent: January 6, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Yoko Fukunaga, Yoshiko Tsuji, Mitsushi Ikeda, Masaru Nikaido, Shoichi Kurauchi
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Patent number: 5600461Abstract: An active matrix type liquid crystal display device having an array substrate for allowing parasitic capacitances formed between a pixel electrode and scan and signal lines disposed in the vicinity thereof to be remarkably decreased.Type: GrantFiled: June 14, 1995Date of Patent: February 4, 1997Assignee: Kabushiki Kaisha ToshibaInventors: Tomomasa Ueda, Masahiko Akiyama, Atsushi Sugahara, Makoto Shibusawa, Mitsushi Ikeda, Yoshiko Tsuji, Hisao Toeda
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Patent number: 5566007Abstract: The present invention provides a liquid crystal display device, having light-converging member provided for each pixel or each pixel row consisting of a plurality of pixels for converging the light incident from the outside, first light path converting member for converting the converged light into a parallel light, light separating member for separating the parallel light into its red-, green- and blue-light components, a liquid crystal cell for controlling the transmitting amount of each light component, and control member for controlling the light transmittance of the liquid crystal cell for a plurality of pixels by applying a voltage to the liquid crystal cell.Type: GrantFiled: September 2, 1994Date of Patent: October 15, 1996Assignee: Kabushiki Kaisha ToshibaInventors: Mitsushi Ikeda, Kouhei Suzuki, Fumio Sugiyama
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Patent number: 5459596Abstract: An active matrix type liquid crystal display device having a plurality of scan lines, a plurality of signal lines intersected with the plurality of scan lines, the plurality of scan lines being insulated from the plurality of signal lines, a thin film transistor element having a gate portion and a drain portion and disposed at each intersection of the plurality of scan lines and the plurality of signal lines, the gate portion being connected to a scan line at the intersection, the drain portion being connected to a signal line at the intersection, an array substrate formed in the intersection and having a pixel electrode, the pixel electrode being electrically connected to the source portion of the thin film transistor element, an opposite substrate having an opposite electrode opposed to the array substrate, a liquid crystal layer disposed between the array substrate and the opposite substrate, and a shield electrode disposed on the array substrate, the shield electrode being overlaid through an insulation lType: GrantFiled: March 29, 1993Date of Patent: October 17, 1995Assignee: Kabushiki Kaisha ToshibaInventors: Tomomasa Ueda, Masahiko Akiyama, Atsushi Sugahara, Makoto Shibusawa, Mitsushi Ikeda, Yoshiko Tsuji, Hisao Toeda
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Patent number: 5431773Abstract: A method of manufacturing a semiconductor device, which comprises steps of providing a substrate, forming an oxide layer of a metal material, which includes a tantalum or an alloy mainly containing a tantalum on the substrate, placing the substrate into a first chamber, activating an etching gas which includes a fluorine containing gas and an oxygen containing gas, in a second chamber, introducing the activated etching gas into the second chamber, and etching the oxide layer by the introduced gas selectively against the substrate.Type: GrantFiled: December 17, 1992Date of Patent: July 11, 1995Assignee: Kabushiki Kaisha ToshibaInventors: Mitsushi Ikeda, Michio Murooka
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Patent number: 5428250Abstract: The line material is of a laminated structure consisting of: a Ta containing N alloy layer (lower layer) which is a first metal layer made of at least an alloy selected from the group consisting of a TaN alloy, a Ta--Mo--N alloy, a Ta--Nb--N alloy and a Ta--W--N alloy; a second metal layer (upper layer) formed integrally with the first metal layer and made of at least an alloy selected from the group consisting of Ta, a Ta--Mo alloy, a Ta--Nb alloy, a Ta--W alloy, a TaN alloy, a Ta--Mo--N alloy, a Ta--Nb--N alloy and a Ta--W--N alloy; and/or a pin hole-free oxide film. The line material of the laminated structure is to be applied to the formation of signal lines and electrodes of, e.g., a liquid crystal display. The line material has a low resistance and the insulating film formed by anodization and the like exhibits excellent insulation and thermal stability. Therefore, when the line material is applied to signal lines of various devices, it exhibits excellent characteristics.Type: GrantFiled: July 22, 1993Date of Patent: June 27, 1995Assignee: Kabushiki Kaisha ToshibaInventors: Mitsushi Ikeda, Michio Murooka
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Patent number: 5296653Abstract: A multi-layered conductor structure device has a substrate, a first conductor layer formed on the substrate, which provides an electrode or wiring, and an insulating film covering the first conductor layer and the substrate. On the insulating film, a second conductor layer is formed which comprises an indium tin oxide, and which provides an electrode or wiring. The first conductor layer is formed of an alloy of aluminum with copper, gold, boron, bismuth, cobalt, chromium, germanium, iron, molybdenum, niobium, nickel, palladium, platinum, tantalum, titanium, tungsten, and/or silver.Type: GrantFiled: December 9, 1992Date of Patent: March 22, 1994Assignee: Kabushiki Kaisha ToshibaInventors: Toshiya Kiyota, Mitsushi Ikeda, Meiko Ogawa, Yoshifumi Ogawa, Michio Murooka
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Patent number: 5264728Abstract: The line material is of a laminated structure consisting of: a Ta containing N alloy layer (lower layer) which is a first metal layer made of at least an alloy selected from the group consisting of a TaN alloy, a Ta-Mo-N alloy, a Ta-Nb-N alloy and a Ta-W-N alloy; a second metal layer (upper layer) formed integrally with the first metal layer and made of at least an alloy selected from the group consisting of Ta, a Ta-Mo alloy, a Ta-Nb alloy, a Ta-W alloy, a TaN alloy, a Ta-Mo-N alloy, a Ta-Nb-N alloy and a Ta-W-N alloy; and/or a pin hole-free oxide film. The line material of the laminated structure is to be applied to the formation of signal lines and electrodes of, e.g., a liquid crystal display. The line material has a low resistance and the insulating film formed by anodization and the like exhibits excellent insulation and thermal stability. Therefore, when the line material is applied to signal lines of various devices, it exhibits excellent characteristics.Type: GrantFiled: November 30, 1990Date of Patent: November 23, 1993Assignee: Kabushiki Kaisha ToshibaInventors: Mitsushi Ikeda, Michio Murooka
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Patent number: 5187602Abstract: An object is to provide an active matrix type liquid crystal display apparatus with a substrate for a liquid crystal driving semiconductor device which is free from point defects, rise of production costs, and shortcircuit in a storage capacitance portion. The liquid crystal display apparatus has a substrate for a liquid crystal driving semiconductor device with a display picture element group consisting of driving semiconductor devices 15 and storage capacitances, the display picture element group being disposed on one major surface of a transparent substrate 13, wherein the storage capacitance is formed by disposing an anodic oxide film 18 between a display electrode 16 and a storage capacitance metallic line 1b made of TaN, for example, and disposed on the one major surface of the transparent substrate 13.Type: GrantFiled: July 10, 1991Date of Patent: February 16, 1993Assignee: Kabushiki Kaisha ToshibaInventors: Mitsushi Ikeda, Michio Murooka
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Patent number: 5170244Abstract: There is provided a semiconductor device using a molybdenum-tantalum alloy having a tantalum composition ratio of 30 to 84 atomic percent. Using this Mo-Ta alloy, there is provided an electrode interconnection material comprising a multi-layered structure having an underlying metal film having a crystalline form of a body-centered cubic system and overlying a molybdenum-tantalum alloy film having a tantalum composition ratio of above 84 atomic percent.Type: GrantFiled: April 8, 1991Date of Patent: December 8, 1992Assignee: Kabushiki Kaisha ToshibaInventors: Masayuki Dohjo, Yasuhisa Oana, Mitsushi Ikeda
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Patent number: 5028551Abstract: There is provided a semiconductor device using a molybdenum-tantalum alloy having a tantalum composition ratio of 30 to 84 atomic percent. Using this Mo-Ta alloy, there is provided an electrode interconnection material comprising a multi-layered structure having an underlying metal film having a crystalline form of a body-centered cubic system and overlying a molybdenum-tantalum alloy film having a tantalum composition ratio of above 84 atomic percent.Type: GrantFiled: May 9, 1990Date of Patent: July 2, 1991Assignee: Kabushiki Kaisha ToshibaInventors: Masayuki Dohjo, Yasuhisa Oana, Mitsushi Ikeda