Abstract: An active set control method for handover operation in a CDMA communications system in which propagation conditions of an uplink channel and a downlink channel for an access link of cell are different, provides that when a cell is deleted from the active set based on a request of a base station which has detected a degraded signal of the uplink channel, a predetermined period of time is to be counted for inhibiting addition of the same cell in the active set based on a request of a mobile terminal which has detected a satisfied signal of the downlink channel, thereby preventing the deletion and addition of the cell in the active set from successive operations in a short time.

Abstract: The present invention includes path delay difference comparator 14 for receiving path delay amounts ?1 to ?K detected from a reception signal and extracting each pair of paths satisfying first condition (|?1??j|??th), de-spreaders 111 to 11K for performing de-spreading according to the path delay amounts, estimator 121 to 12K for estimating an SIR value every path, estimators 131 to 13K for estimating the carrier phase every path, phase difference comparator 15 for comparing the carrier phases ?1 to ?k of the paths of each pair satisfying the first condition and extracting each pair of paths satisfying second condition (|?1??j|??th), and comparator 16 for selecting one path having larger SIR from the paths of each pair extracted and using the SIR value of the selected path for SIR combining.

Abstract: A digital filter circuit includes a decoder, ROM tables, multipliers, and an adder. The decoder decomposes an input multilevel signal into a plurality of 1-bit signals. The ROM tables output filter waveforms stored in advance, on the basis of the 1-bit signals output from the decoder. The multipliers and adder execute a plurality of weighting operations for the respective bits of outputs from the ROM tables and then add the outputs.

Abstract: To achieve the optimal power control of a system in an MIMO communication method. When decoding in accordance with a receiving algorithm of the MIMO communication method in plural receivers, each receiver acquires the reception power level of a received signal from a transmitter paired with the receiver, and generates a transmitter power control signal based on a comparison result of comparing the reception power with a predetermined value. For example, if the reception power level is lower than the predetermined value, a transmitter power control signal of instructing to increase the transmitter power is generated, or otherwise, a transmitter power control signal of instructing to decrease the transmitter power is generated. The generated control signal is transmitted from the receiver to the transmitter paired with the receiver. Each transmitter controls the transmitter power in accordance with the received control signal.

Abstract: Each base station measures the reception states of an uplink high-speed signal from mobile terminals and periodically reports the measurement results to a radio network controller (RNC). The RNC determines cells that are to be deleted from an active set based on the reception states (for example, the reception SIR) that are reported from each base station. The RNC transmits to one base station and mobile terminal a radio line release request for releasing the radio line of the uplink high-speed signal that has been set to a cell that has been determined as a cell to be deleted from the active set. The base station and mobile terminal that have received the radio line release request from the RNC each release the radio line, whereby the cells of other base stations are eliminated from the active set.

Abstract: A radio base station which receives a first and a second communication channel from a radio communications device comprises a control circuit for detecting the reception quality of the first communication channel, conducting an inner-loop power control for controlling transmission power of the first communication channel from the radio communications device based on the reception quality and an inner-loop power control target value, and adding a power control offset to the inner-loop power control target value before starting a communication through the second communication channel.

Abstract: A nonlinear compensating circuit, a base-station apparatus and a transmission power clipping method for executing a clipping operation in a high output amplifier at the transmitting end during multicarrier amplification. A plurality of power converting circuits calculate power values of respective input signals. An adder adds up the calculated power values to obtain a synthetic power value P. A divider divides a predetermined threshold value T by the synthetic power value P. When the divided value T/P is equal to or more than 1, a determining circuit outputs a clip control signal for turning off the clipping operation to a plurality of clipping circuits. When the divided value T/P is less than 1, the clip control signal turn on the clipping operation.

Abstract: A HSDPA type mobile communication system includes a base station and a mobile station. The base station sets the uplink control channel with the mobile station to transmit a pilot signal. The mobile station measures a reception quality of the pilot signal to transmit the quality information to the base station using the uplink quality control channel. The base station performs transmission control of data for the mobile station using the quality information. The mobile station is set to perform control of starting and stopping transmission of the quality information so that the quality information is transmitted only as required. Therefore, power consumption in the mobile station can be reduced, interference wave power in the uplink can be reduced, and capacity of the uplink can be increased.

Abstract: A correlator which detects correlation for data having a certain length includes a plurality of sub-correlators, each of the sub-correlators having a length equal to a divisor of the certain length and each of the sub-correlators having such a length that a product of all lengths of the sub-correlators is equal to the certain length. A correlation value output from one of the sub-correlators is input into a sub-correlator located immediately downstream of one of the sub-correlators.

Abstract: A control method comprises, transmitting wireless signals to an overall area assigned to said base station area; receiving wireless signals from the overall area; communicating via a first wireless channel with a terminal station located within the overall area; transmitting wireless signals to a limited area which lies within the overall area; receiving wireless signals from the limited area; and communicating via a second channel with the terminal station when the terminal station is located within the limited area.

Abstract: A wireless communication apparatus comprises: a plurality of antenna means for receiving a wireless reception signal from a secondary communication apparatus; and a combining means for combining signals from the plurality of antennas to from a combined signal or for selecting one of the signals from the plurality of antennas. A wireless communication apparatus comprises: a plurality of antenna means for transmitting a wireless transmission signal to a secondary communication apparatus; and a dividing means for dividing a transmission signal into plurality of transmission signals to be transmitted by the plurality antennas means or for selecting one of the plurality of antenna means to transmit the transmission signal.

Abstract: A receiver for use in a CDMA communication system, which is designed for a small size, has a plurality of delay units for adding delays over transmission paths to a complex conjugate value of a spreading code, a plurality of multipliers for multiplying the delayed signals outputted from the delay units by complex conjugate values of coefficients representing respective phase/amplitude ratios of the transmission paths, and an adder for adding the product signals outputted from the multiplier, and a despreader for despreading a reception signal using the sum signal outputted from the adder.

Abstract: An apparatus includes an amplitude converter, receiving a complex baseband signal to output an amplitude thereof, a memory, receiving an amplitude from the amplitude converter as an address to output an inverse gain associated with the amplitude, a reciprocal converter receiving an output of the memory as input and outputting a reciprocal of the memory output, a FIR filter for filtering an output signal of the reciprocal converter, a reciprocal converter receiving an output of the FIR filter as input to output a reciprocal of the output of the FIR filter, and a complex multiplier for executing complex multiplication of the complex baseband signal and an output of the reciprocal converter.

Abstract: This invention relates to a nonlinear distortion compensating circuit in which a digital value expressing the amplitude of an input signal is divided into upper and lower bits, only the upper bits are input to an address in a first memory, a value obtained by adding 1 to the upper bits is input to an address in a second memory, or, an interpolation circuit to which the upper bits are input inputs the upper bits to a first memory storing data corresponding to an even-numbered address and a second memory storing data corresponding to an odd-numbered address, and performs interpolation by adding outputs from the first and second memories by weighting these outputs in accordance with a value expressed by the lower bits, and the input signal is multiplied by the obtained value.

Abstract: An amplitude limiting circuit for limiting the amplitude of a signal input to a power amplifier includes an amplitude converter, determination unit, peak detector, window filter, delay circuit, and multiplier. The amplitude converter calculates the amplitude value of an input signal. The determination unit detects, as a detection interval, an interval in which the amplitude value exceeds a threshold, on the basis of a preset threshold and the amplitude value of the input signal. The peak detector detects, in the detection interval, the peak time when the maximum amplitude value appears and an amplitude value at the peak time as a peak value. The window filter generates a window function for limiting the amplitude value to a value not more than the threshold by using the peak value output from the peak detector.

Abstract: A nonlinear compensating circuit, a base-station apparatus and a transmission power clipping method for executing a clipping operation beneficial against nonlinear characteristics of a high output amplifier at the transmitting end even in the case of multicarrier amplification. A plurality of power converting circuits calculate power values of respective input signals. An adder adds up the calculated power values to obtain a synthetic power value P. A divider divides a predetermined threshold value T by the synthetic power value P. When the divided value T/P is equal to or more than 1, a determining circuit outputs a clip control signal for turning off the clipping operation to a plurality of clipping circuits. On the other hand, when the divided value T/P is less than 1, the determining circuit outputs a clip control signal for turning on the clipping operation, which includes a square root of the divided value T/P obtained by the divider, (T/P)1/2, to the clipping circuits.

Abstract: A HSDPA type mobile communication system includes a base station and a mobile station. The base station sets the uplink control channel with the mobile station to transmit a pilot signal. The mobile station measures a reception quality of the pilot signal to transmit the quality information to the base station using the uplink quality control channel. The base station performs transmission control of data for the mobile station using the quality information. The mobile station is set to perform control of starting and stopping transmission of the quality information so that the quality information is transmitted only as required. Therefore, power consumption in the mobile station can be reduced, interference wave power in the uplink can be reduced, and capacity of the uplink can be increased.

Abstract: A digital filter circuit includes a decoder, ROM tables, multipliers, and an adder. The decoder decomposes an input multilevel signal into a plurality of 1-bit signals. The ROM tables output filter waveforms stored in advance, on the basis of the 1-bit signals output from the decoder. The multipliers and adder execute a plurality of weighting operations for the respective bits of outputs from the ROM tables and then add the outputs.

Abstract: The present invention includes path delay difference comparator 14 for receiving path delay amounts &tgr;1 to &tgr;K detected from a reception signal and extracting each pair of paths satisfying first condition (|&tgr;1−&tgr;j|≦&tgr;th), de-spreaders 111 to 11K for performing de-spreading according to the path delay amounts, estimator 121 to 12K for estimating an SIR value every path, estimators 131 to 13K for estimating the carrier phase every path, phase difference comparator 15 for comparing the carrier phases &thgr;1 to &thgr;k of the paths of each pair satisfying the first condition and extracting each pair of paths satisfying second condition (|&thgr;1−&thgr;j|≦&thgr;th), and comparator 16 for selecting one path having larger SIR from the paths of each pair extracted and using the SIR value of the selected path for SIR combining.

Abstract: The invention provides a sampling frequency conversion apparatus which converts a sampling frequency to another frequency using another oscillator employed in the system as the source oscillator. A fractional frequency divider divides an output of the source oscillator by a non-integer. By using outputs of the source oscillator and the divider individually as sampling clocks, an input signal is first sampled by a first sampling circuit and then an output of the first sampling circuit is sampled again by a second sampling circuit to convert the sampling frequency. The fractional frequency divider divides the clock signal of a higher one of the frequencies to produce the clock signal of a lower one of the frequencies, and the dividing ratio of the fractional frequency divider for the production of the clock signal is varied periodically to effect division of a frequency ratio having a fractional value when averaged over a time period.