Abstract: An inverse modulator 21, a Fourier transform circuit 22 and a power converter 23 are provided for obtaining a power-frequency spectrum of the carrier wave of a received signal, which is subjected to the influence of fading in the transmission line. A peak detector obtains a peak power level from the power-frequency spectrum and also obtains a peak power level frequency corresponding to the peak power level. A first and a second lower power level frequency detector 25 and 26 receive the power-frequency spectrum, the peak power level and the peak power level frequency. The first lower power level frequency detector detects a frequency which is higher than the peak power level frequency and corresponds to a power level lower than the peak power level by 120 dB, as a first lower power level frequency.

Abstract: The invention provides a sampling frequency conversion apparatus which converts a sampling frequency to another frequency using another oscillator employed in the system as the source oscillator. A fractional frequency divider divides an output of the source oscillator by a non-integer. By using outputs of the source oscillator and the divider individually as sampling clocks, an input signal is first sampled by a first sampling circuit and then an output of the first sampling circuit is sampled again by a second sampling circuit to convert the sampling frequency. The fractional frequency divider divides the clock signal of a higher one of the frequencies to produce the clock signal of a lower one of the frequencies, and the dividing ratio of the fractional frequency divider for the production of the clock signal is varied periodically to effect division of a frequency ratio having a fractional value when averaged over a time period.

Abstract: An input phase signal having a presentation range from 0 radian to a value smaller than 2.pi. radian is input to a least significant side shift register 1-1 and to a discontinuity detector 3. The discontinuity detector 3 compares the input phase signal with the same signal delayed by a time corresponding to 1 sample clock in the shift register 1-1, detects a phase discontinuity and outputs 2.pi. radian when the phase transition is 0.fwdarw.2.pi., -2.pi. radian when the phase transition is 2.pi..fwdarw.0 and 0 radian when there is no discontinuity detected. The output of the discontinuity detector 3 is added to outputs of the respective most significant side shift registers 4-1 to 4-n by adders 5-1 to 5-n, respectively. An interpolation circuit 2 performs an interpolation by adding the outputs of the least significant side shift registers 1-1 to 1-n to outputs of the adders 5-1 to 5-n.

Abstract: A unique word (UW) differential detection system to provide a system that can expand a measurement range for the carrier frequency offset of the quasi-synchronized detection signal while maintaining detection of unique word position at a high accuracy, and maintaining a resolution for the carrier frequency at a low level. In an initial acquisition mode, the detection system uses a first UW differential detection circuit with a symbol delay N (0.5<N.ltoreq.1) and a second differential detection circuit with a symbol delay N/2 to generate a first UW detection signal of a first quasi-synchronized detection signal and first frequency offset information. The first frequency offset information reduces frequency offset of a second quasi-synchronized detection signal for demodulating a data signal.

Abstract: A method and apparatus for demodulating includes differential-detecting an input signal into which a unique word is inserted, correlating an output of the differential-detection and a data table obtained by differential-detecting the unique word, detecting a time when an electric power of a correlation output which exceeds a threshold value becomes the local maximum, reading the input signal stored in a buffer from the leading end of the unique word, estimating a frequency error of the input signal based on a phase of the correlation output, obtaining a signal by removing the frequency error from the read signal and inverse-modulating a unique word portion in the signal in which the frequency error has been removed, according to a data of a unique word table, and then reproducing a carrier signal.

Abstract: The invention provides a PSK signal demodulation device of small circuit scale that is capable of both rapid synchronization pull-in and stable demodulation operation following demodulation synchronization pull-in. To achieve these capabilities, the phase shift keying signal demodulation device of this invention is provided with an adaptive line enhancer demodulation circuit, a PLL demodulation circuit, and a switching circuit that switches the demodulation circuits from the adaptive line enhancer demodulation circuit to the PLL demodulation circuit. The switching circuit switches between the demodulation circuits such that, upon start of input of an N-phase PSK signal, demodulation is effected by the adaptive line enhancer demodulation circuit until phase synchronization is established between the input N-phase PSK signal and the recovered carrier, and demodulation is effected by the PLL demodulation circuit after establishment of phase synchronization.

Abstract: At the transmit end of a secure communication system, an input data symbol is mapped to a corresponding vector in a two-dimensional phase plane. The vector is pseudorandomly phase-rotated in a first direction according to a unique pseudorandom number and quadrature-modulated on a carrier for transmission. At the receive end, a quadrature detector quasi-synchronously quadrature-detects the transmitted carrier with a local carrier to recover a vector, which is pseudorandomly phase-rotated according to a pseudorandom number identical to the unique pseudorandom number in a second direction opposite to the first direction. A quadrature demodulator detects a phase error of the local carrier with respect to the received carrier and provides quadrature-demodulation on the oppositely phase-rotated vector using the detected phase error.

Abstract: In a combining circuit comprising first and second frequency converting sections (20a, 20b) for frequency converting first and second received signals from two independent antennas (10a, 10b) under the control of a control circuit (30) into first and second frequency-converted signals, first and second preliminary amplifying sections (60a, 60b) preliminarily amplify the first and the second frequency-converted signals under the control of the control circuit (30) to produce first and second preliminary amplified signals having first and second output levels, respectively. The first and the second preliminary amplified signals have first and second noise power levels, respectively, which are equal to each other. First and second main amplifying sections (40a, 40b) mainly amplify the first and the second preliminary amplified signals by first and second amplification degrees in proportional to the first and the second output levels, respectively.

Abstract: An automatic frequency control apparatus includes a local oscillator, a quadrature detector, a frequency offset value estimation circuit, a demodulation circuit, a synchronization determination circuit, a memory, and an AFC circuit. The synchronization determination circuit determines reception synchronization on the basis of demodulated signals from the demodulation circuit to output a synchronization determination signal to the AFC circuit when reception synchronization is established and outputs the value to the AFC circuit. The apparatus also includes a power-on state detection circuit for outputting a detection signal to the AFC circuit. The AFC circuit determines the oscillation frequency of the local oscillator on the basis of the outputs from the above components. An automatic frequency control method is also disclosed.

Abstract: In order to initially point a directional antenna mounted on a mobile unit to a stationary satellite, the antenna is rotated one revolution in azimuth. While the antenna rotates, the maximum receive signal strength is detected together with the angular position of the antenna at which the maximum strength has been ascertained. Subsequently, the antenna is rotated to the angular position which has been determined in the preceding operation. If the angular position is determined correct (viz., the mobile unit is detected to be synchronized with the satellite), then the initial antenna beam orientation is terminated.

Abstract: In a demodulator, a delay detection means receives a .pi./4-shift QPSK signal and performs delay detection of a signal at an interval of symbols. An averaging circuit respectively averages two channel quadrature signal components of a signal. A preamble detection means detects a preamble having a specific pattern in which a phase shift of .pi./4 of the phase of a received symbol from the immediately preceding symbol and a phase shift of -3.pi./4 of a phase of a next symbol from the immediately preceding symbol are alternately repeated on a phase plane of the two channel quadrature signal components. A phase angle calculating means calculates the phase angle of an output signal from the averaging circuit. A frequency offset estimating circuit calculates a carrier frequency offset. A voltage-controlled oscillator has an output oscillation frequency variably controlled by an output signal from the frequency offset estimating circuit.

Abstract: In a clock recovery circuit, an asynchronous oscillator generates a first clock pulse at a frequency n times the frequency of a baseband signal. A sampler samples the baseband signal in response to the first clock pulses. A flip-flop holds and delivers the sampled signal in response to a second clock pulse supplied from a voltage-controlled oscillator. The time difference between the first clock pulse and the second clock pulse is detected and a set of tap-gain values is selected according to the time difference. The sample delivered from the flip-flop is successively delayed by a tapped delay line to produce tap signals which are respectively weighted with the selected tap-gain values. The weighted samples are summed to estimate an intermediate sample. A clock phase error of the estimated sample with respect to the clock timing of the transmitted signal is determined for controlling the VCO.

Abstract: Supplied with an input signal into which a carrier signal is modulated at a frame period by a data signal and unique words periodically interspersed throughout the data signal, a demodulating circuit (14) demodulates the input signal into a demodulated signal. A frame synchronizing circuit (23) produces an aperture signal which defines an aperture interval determined by the frame period when the demodulated signal has a level which is lower than a predetermined threshold level. Responsive to the aperture signal, a cross-correlating circuit (24) calculates a cross-correlation coefficient between the demodulated signal and a locally known unique word. By the use of the cross-correlation coefficient, a phase error calculating circuit (25) calculates a phase error between a reproduced carrier signal reproduced from the demodulated signal and a regenerated carrier signal which is a correct regeneration of the carrier signal.

Abstract: On detecting a carrier frequency error in a received signal, a correlation unit (12) detects a correlated signal in signals which a transmission unique word signal in the received signal and a local unique word signal are differentially detected. A frequency fine detection unit (17) detects a fine frequency error by using the correlated signal and a frame timing signal. A frequency coarse detection unit (21) detects a coarse frequency error by using the buffered signal from a data buffer (20) and the frame timing signal. A first adder (25) adds the fine frequency error to the coarse frequency error to a first added signal. A second adder (31) adds the first added signal to a maximum power frequency detected by a maximum power frequency detection unit (27) to produce the carrier frequency error.

Abstract: A method of preventing divergent behavior of a recursively adjusted adaptive filter and an adaptive filter to which the method is applied are disclosed. The adaptive filter is adjusted by alternately carrying out two kinds of corrections during respective correction terms. In the first correction term, each tap gain in the adaptive filter is corrected through a recursive correction algorithm. In the second correction term, a new tap gain is produced by multiplying the current tap gain by a constant which is predetermined so as to suppress divergent tendency in recursively corrected values of each tap gain. Therefore, operations to make recursively corrected values of each tap gain converge and operations to suppress divergent tendencies in the recursively corrected values of each tap gain are executed alternately.

Abstract: A satellite packet communication system comprising a central station and VSAT stations. The central station generates chip-rate clock pulses and transmits a series of data on timeslots of a frame to a satellite transponder, and a plurality of terminal stations. Each VSAT station receives the frame from the transponder and recovers the chip-rate clock pulses from the received frame. A pseudorandom number (PN) sequence generator, provided in the terminal station is synchronized with the recovered chip-rate clock pulses for generating bits of a PN sequence with which packetized data bits are pseudorandomly modulated and transmitted in burst form to the transponder. The central station includes a correlator which is synchronized with the central station's chip-rate clock pulses to detect correlations between the pseudorandomly modulated data bits a sequence of pseudorandom numbers corresponding to the PN sequence bits of the terminal stations.

Abstract: In a coherent M-ary PSK demodulator, an M-ary PSK detector demodulates a received M-ary PSK modulated convolutional code with a carrier recovered by a voltage-controlled oscillator to produce first and second channels of demodulated convolutional codes. A convolutional decoder decodes the signals of the first and second channels while correcting bit errors. An error rate detector is provided for detecting when the number of such errors occurring during a specified period of time is smaller than a predetermined value and generates a signal indicating that the convolutional decoder is synchronized with the demodulated signals. The power levels of signal and noise components of the demodulated channels are detected by a power detector.

Abstract: Supplied with an input signal into which a carrier signal is modulated at a frame period by a data signal and unique words periodically interspersed throughout the data signal, a demodulating circuit (16) quadrature demodulates the input signal into an output signal. A cross-correlating circuit (23) calculates a cross-correlation coefficient between the output signal and a locally known unique word. A frame synchronizing circuit (24) compares the cross-correlation coefficient with a predetermined threshold value and delivers an aperture when the cross-correlation coefficient is below the predetermined threshold value. A phase calculating circuit (25) calculates phase errors between a recovered carrier signal recovered from the output signal and a regenerated carrier signal which is a correct reproduction of the carrier signal. The phase errors are set in a carrier regenerating circuit (17) to render the recovered carrier signal identical with the regenerated carrier signal at the aperture interval.

Abstract: An arrangement for coherently demodulating PSK (phase-shift keying) signals, includes a quasi-coherent demodulator which implements coarse coherent demodulation on an incoming PSK-modulated IF signal using a variable frequency which is applied from a controllable local oscillator. The output of the quasi-coherent demodulator is applied to a coherent demodulator which also receives the output of a VCO (Voltage Controlled Oscillator). A phase detector receives the output of the coherent demodulator and applies the output thereof to the VCO via a loop filter. The output of the loop filter is applied to a local oscillator controller having an output which is used to control the controllable local oscillator.

Abstract: In a burst mode digital communication system, a preamble containing a predetermined bit pattern and a digital signal are modulated upon orthogonal carriers and transmitted in a series of burst signals. At a distant end of the system, the preamble and the digital signal are noncoherently detected with locally generated orthogonal carriers having the same frequency as the transmitted orthogonal carries to produce in-phase and quadrature signals. First and second correlators are provided to perform a correlation calculation between a locally generated bit pattern and the in-phase signal and to perform a correlation calculation between the local bit pattern and the quadrature signal. A phase error of the local carriers with respect to the transmitted carriers is detected from the outputs of the first and second correlators. A clock phase error of a locally generated clock pulse with respect to symbols contained in the transmitted burst signals is detected from one of the outputs of the correlators.