Patents by Inventor Muhammad Chaudhry

Muhammad Chaudhry has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11074900
    Abstract: The present invention is a thermal and acoustic insulating sphere that has an evacuated hollow interior. The spheres are constructed of insulating materials, and the inner and outer surfaces of each sphere have highly reflective coatings evenly applied to them. The coatings applied to the inner and outer surfaces reduce the transmission of heat by conduction, convection, and radiation. Additionally, the spheres provide superior acoustic insulation due to the inability of sound to travel through the interior vacuum. The spheres can be used to produce insulating materials, for example, by embedding or positioning them within or between other materials, to provide thermal and acoustic insulation.
    Type: Grant
    Filed: July 1, 2018
    Date of Patent: July 27, 2021
    Inventor: Afzal Muhammad Chaudhry
  • Publication number: 20180308463
    Abstract: The present invention is a thermal and acoustic insulating sphere that has an evacuated hollow interior. The spheres are constructed of insulating materials, and the inner and outer surfaces of each sphere have highly reflective coatings evenly applied to them. The coatings applied to the inner and outer surfaces reduce the transmission of heat by conduction, convection, and radiation. Additionally, the spheres provide superior acoustic insulation due to the inability of sound to travel through the interior vacuum. The spheres can be used to produce insulating materials, for example, by embedding or positioning them within or between other materials, to provide thermal and acoustic insulation.
    Type: Application
    Filed: July 1, 2018
    Publication date: October 25, 2018
    Inventor: Afzal Muhammad Chaudhry
  • Publication number: 20150225945
    Abstract: Heat and Sound Insulation Ball (HASIB) is a hollow ball which has vacuum inside and is made of insulating materials like fiber-reinforced-plastic and glass. The inner and the outer surfaces of HASIB have non-conducting highly reflective coatings. HASIB is a much better heat insulator and its use can reduce the transmission of heat by conduction, convection and radiation. The use of HASIB for heat insulation can save energy and bring down the cost of heating in winter and cooling in summer. HASIB is also a better sound insulator since sound cannot travel through the vacuum inside it. HASIB can be used in the form of HASIB-wrap which can be made by gluing them between two sheets of plastic. HASIBs can also be embedded in the drywall used for the construction of houses to make the drywall a much better heat and sound insulator.
    Type: Application
    Filed: February 9, 2014
    Publication date: August 13, 2015
    Inventor: Afzal Muhammad Chaudhry
  • Publication number: 20130013983
    Abstract: Example methods are disclosed for encoding variable sized data using a low-density parity-check (LDPC) code, and transporting the encoded variable sized data in modulated symbols. Example methods involve calculating a minimum number of modulated symbols capable of transmitting a data packet; selecting a codeword size suitable for transmitting the data packet; calculating a number of shortening Nshortened bits; and calculating a number of puncturing Npunctured bits, to thereby produce a shortened and punctured expanded parity check matrix for transmitting the data packet.
    Type: Application
    Filed: September 14, 2012
    Publication date: January 10, 2013
    Inventors: Michael Livshitz, Aleksandar Purkovic, Nina Burns, Sergey Sukhobok, Muhammad Chaudhry
  • Patent number: 8301975
    Abstract: A method for constructing a low-density parity-check (LDPC) code using a structured base parity check matrix with permutation matrix, pseudo-permutation matrix, or zero matrix as constituent sub-matrices; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for constructing a LDPC code using a structured base parity check matrix H=[Hd|Hp], Hd is the data portion, and Hp is the parity portion of the parity check matrix; the parity portion of the structured base parity check matrix is such so that when expanded, an inverse of the parity portion of the expanded parity check matrix is sparse; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for encoding variable sized data by using the expanded LDPC code; and applying shortening, puncturing.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: October 30, 2012
    Assignee: Research In Motion Limited
    Inventors: Michael Livshitz, Aleksandar Purkovic, Nina Burns, Sergey Sukhobok, Muhammad Chaudhry
  • Publication number: 20110307755
    Abstract: A method for constructing a low-density parity-check (LDPC) code using a structured base parity check matrix with permutation matrix, pseudo-permutation matrix, or zero matrix as constituent sub-matrices; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for constructing a LDPC code using a structured base parity check matrix H=[Hd|Hp], Hd is the data portion, and Hp is the parity portion of the parity check matrix; the parity portion of the structured base parity check matrix is such so that when expanded, an inverse of the parity portion of the expanded parity check matrix is sparse; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for encoding variable sized data by using the expanded LDPC code; and applying shortening, puncturing.
    Type: Application
    Filed: June 9, 2011
    Publication date: December 15, 2011
    Applicants: NORTEL NETWORKS INC., NORTEL NETWORKS LIMITED
    Inventors: Michael LIVSHITZ, Aleksandar PURKOVIC, Nina BURNS, Sergey SUKHOBOK, Muhammad CHAUDHRY
  • Patent number: 8024641
    Abstract: A method for constructing a low-density parity-check (LDPC) code using a structured base parity check matrix with permutation matrix, pseudo-permutation matrix, or zero matrix as constituent sub-matrices; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for constructing a LDPC code using a structured base parity check matrix H=[Hd|Hp], Hd is the data portion, and Hp is the parity portion of the parity check matrix; the parity portion of the structured base parity check matrix is such so that when expanded, an inverse of the parity portion of the expanded parity check matrix is sparse; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for encoding variable sized data by using the expanded LDPC code; and applying shortening, puncturing.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: September 20, 2011
    Assignees: Nortel Networks Limited, Nortel Networks Inc.
    Inventors: Michael Livshitz, Aleksandar Purkovic, Nina Burns, Sergey Sukhobok, Muhammad Chaudhry
  • Patent number: 7996746
    Abstract: A method for constructing a low-density parity-check (LDPC) code using a structured base parity check matrix with permutation matrix, pseudo-permutation matrix, or zero matrix as constituent sub-matrices; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for constructing a LDPC code using a structured base parity check matrix H=[Hd|Hp], Hd is the data portion, and Hp is the parity portion of the parity check matrix; the parity portion of the structured base parity check matrix is such so that when expanded, an inverse of the parity portion of the expanded parity check matrix is sparse; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for encoding variable sized data by using the expanded LDPC code; and applying shortening, puncturing.
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: August 9, 2011
    Assignees: Nortel Networks Limited, Nortel Networks Inc.
    Inventors: Michael Livshitz, Aleksandar Purkovic, Nina Burns, Sergey Sukhobok, Muhammad Chaudhry
  • Publication number: 20100211847
    Abstract: A method for constructing a low-density parity-check (LDPC) code using a structured base parity check matrix with permutation matrix, pseudo-permutation matrix, or zero matrix as constituent sub-matrices; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for constructing a LDPC code using a structured base parity check matrix H=[Hd|Hp], Hd is the data portion, and Hp is the parity portion of the parity check matrix; the parity portion of the structured base parity check matrix is such so that when expanded, an inverse of the parity portion of the expanded parity check matrix is sparse; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for encoding variable sized data by using the expanded LDPC code; and applying shortening, puncturing.
    Type: Application
    Filed: February 12, 2010
    Publication date: August 19, 2010
    Applicant: NORTEL NETWORKS LIMITED
    Inventors: MICHAEL LIVSHITZ, ALEKSANDAR PURKOVIC, NINA BURNS, SERGEY SUKHOBOK, MUHAMMAD CHAUDHRY
  • Publication number: 20090259915
    Abstract: The invention introduces an apparatus, method and system that allow coding matrices to be expanded to accommodate various information packet sizes and support for various code rates; additionally the invention defines a number of coding matrices particularly suited to the methodology. The invention enables high throughput implementations, allows achieving low latency, and offers other numerous implementation benefits. At the same time, the new parity part of the matrix preserves the simple (recursive) encoding feature.
    Type: Application
    Filed: October 12, 2005
    Publication date: October 15, 2009
    Inventors: Michael Livshitz, Aleksandar Purkovic, Nina Burns, Sergey Sukhobok, Muhammad Chaudhry
  • Publication number: 20070133301
    Abstract: The present invention is an electronic memory cell and a method for the cell's fabrication comprising a first transistor configured to be coupled to a bit line. The first transistor has an essentially zero voltage drop when activated and is configured to control an operation of the memory cell. A second transistor is configured to operate as a memory transistor and is coupled to the first transistor. The second transistor is further configured to be programmable with a voltage about equal to a voltage on the bit line.
    Type: Application
    Filed: October 11, 2006
    Publication date: June 14, 2007
    Applicant: ATMEL CORPORATION
    Inventors: Muhammad Chaudhry, Damian Carver
  • Publication number: 20070087550
    Abstract: The present invention is an electronic memory cell and a method for the cell's fabrication comprising a The first transistor configured to be coupled to a bit line. The first transistor has an essentially zero voltage drop when activated and is configured to control an operation of the memory cell. A second transistor is configured to operate as a memory transistor and is coupled to the first transistor. The second transistor is further configured to be programmable with a voltage about equal to a voltage on the bit line.
    Type: Application
    Filed: October 11, 2006
    Publication date: April 19, 2007
    Applicant: ATMEL CORPORATION
    Inventors: Muhammad Chaudhry, Damian Carver
  • Publication number: 20060267071
    Abstract: An EEPROM memory transistor having a floating gate. The floating gate is formed using a BiCMOS process and has a first sinker dopant region proximate to a tunnel diode window, and a second sinker dopant region proximate to a coupling capacitor region. An optional third sinker region may be formed proximate to a source junction of the EEPROM memory transistor. Also, a shallow trench isolation (STI) region may be formed between the first and second sinker dopant regions.
    Type: Application
    Filed: May 24, 2005
    Publication date: November 30, 2006
    Inventors: Damian Carver, Muhammad Chaudhry
  • Publication number: 20060244073
    Abstract: An EEPROM memory cell uses silicon-germanium/silicon and emitter polysilicon film for fabricating shallow source/drain regions to increase a breakdown voltage with respect to a well. The source/drain regions are fabricated to be approximately 100 nm (0.1 micrometers (?m)) in depth with a breakdown voltage of approximately 14 volts or more. A typical breakdown voltage of a well in a bipolar process is approximately 10 volts. Due to the increased breakdown voltage achieved, EEPROM memory cells can be produced along with bipolar devices on a single integrated circuit chip and fabricated on a common semiconductor fabrication line.
    Type: Application
    Filed: June 26, 2006
    Publication date: November 2, 2006
    Applicant: ATMEL CORPORATION
    Inventor: Muhammad Chaudhry
  • Publication number: 20060008960
    Abstract: An EEPROM memory cell uses silicon-germanium/silicon and emitter polysilicon film for fabricating shallow source/drain regions to increase a breakdown voltage with respect to a well. The source/drain regions are fabricated to be approximately 100 nm (0.1 micrometers (?m)) in depth with a breakdown voltage of approximately 14 volts or more. A typical breakdown voltage of a well in a bipolar process is approximately 10 volts. Due to the increased breakdown voltage achieved, EEPROM memory cells can be produced along with bipolar devices on a single integrated circuit chip and fabricated on a common semiconductor fabrication line.
    Type: Application
    Filed: July 9, 2004
    Publication date: January 12, 2006
    Inventor: Muhammad Chaudhry
  • Publication number: 20060006475
    Abstract: An EEPROM memory cell uses an emitter polysilicon film for fabricating shallow source/drain regions to increase a breakdown voltage of the wells. The wells are fabricated to be approximately 100 nm (0.1 micrometers (?m)) in depth with a breakdown voltage of approximately 14 volts or more. A typical breakdown voltage of a well in a bipolar process is approximately 10 volts. Due to the increased breakdown voltage achieved, EEPROM memory cells can be produced along with bipolar devices on a single integrated circuit chip and fabricated on a common semiconductor fabrication line.
    Type: Application
    Filed: February 10, 2005
    Publication date: January 12, 2006
    Inventor: Muhammad Chaudhry
  • Publication number: 20050258492
    Abstract: The present invention is an electronic memory cell and a method for the cell's fabrication comprising a first transistor configured to be coupled to a bit line. The first transistor has an essentially zero voltage drop when activated and is configured to control an operation of the memory cell. A second transistor is configured to operate as a memory transistor and is coupled to the first transistor. The second transistor is further configured to be programmable with a voltage about equal to a voltage on the bit line.
    Type: Application
    Filed: May 18, 2004
    Publication date: November 24, 2005
    Inventors: Muhammad Chaudhry, Damian Carver
  • Patent number: RE46692
    Abstract: A method for constructing a low-density parity-check (LDPC) code using a structured base parity check matrix with permutation matrix, pseudo-permutation matrix, or zero matrix as constituent sub-matrices; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for constructing a LDPC code using a structured base parity check matrix H=[Hd|Hp], Hd is the data portion, and Hp is the parity portion of the parity check matrix; the parity portion of the structured base parity check matrix is such so that when expanded, an inverse of the parity portion of the expanded parity check matrix is sparse; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for encoding variable sized data by using the expanded LDPC code; and applying shortening, puncturing.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: January 30, 2018
    Assignee: BlackBerry Limited
    Inventors: Michael Livshitz, Aleksandar Purkovic, Nina Burns, Sergey Sukhobok, Muhammad Chaudhry
  • Patent number: RE48212
    Abstract: A method for constructing a low-density parity-check (LDPC) code using a structured base parity check matrix with permutation matrix, pseudo-permutation matrix, or zero matrix as constituent sub-matrices; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for constructing a LDPC code using a structured base parity check matrix H=[Hd|Hp], Hd is the data portion, and Hp is the parity portion of the parity check matrix; the parity portion of the structured base parity check matrix is such so that when expanded, an inverse of the parity portion of the expanded parity check matrix is sparse; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for encoding variable sized data by using the expanded LDPC code; and applying shortening, puncturing.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: September 15, 2020
    Assignee: BlackBerry Limited
    Inventors: Michael Livshitz, Aleksandar Purkovic, Nina Burns, Sergey Sukhobok, Muhammad Chaudhry
  • Patent number: RE49225
    Abstract: A method for constructing a low-density parity-check (LDPC) code using a structured base parity check matrix with permutation matrix, pseudo-permutation matrix, or zero matrix as constituent sub-matrices; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for constructing a LDPC code using a structured base parity check matrix H=[Hd|Hp], Hd is the data portion, and Hp is the parity portion of the parity check matrix; the parity portion of the structured base parity check matrix is such so that when expanded, an inverse of the parity portion of the expanded parity check matrix is sparse; and expanding the structured base parity check matrix into an expanded parity check matrix. A method for encoding variable sized data by using the expanded LDPC code; and applying shortening, puncturing. System and method for operating a wireless device to encode data using low-density parity-check (LDPC) encoding is discussed.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: September 27, 2022
    Assignee: BlackBerry Limited
    Inventors: Michael Livshitz, Aleksandar Purkovic, Nina K. Burns, Sergey Sukhobok, Muhammad Chaudhry