Patents by Inventor Mutsumi Hosoya
Mutsumi Hosoya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8340087Abstract: Deadlock is avoided in a grid storage system having superior scalability. Provided is a storage subsystem connected to a host computer for receiving a write or read access from the host computer. This storage subsystem includes a plurality of modules respectively having a storage resource, a switch for connecting the plurality of modules, a controller for controlling the transfer of a packet based on the write or read access from the host computer to a target module among the plurality of modules via the switch, and a memory storing a transfer rule of the packet. The controller controls the transfer of the packet based on the transfer rule.Type: GrantFiled: September 22, 2010Date of Patent: December 25, 2012Assignee: Hitachi, Ltd.Inventors: Shuji Nakamura, Akira Fujibayashi, Mutsumi Hosoya, Hideaki Fukuda
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Patent number: 8327032Abstract: In order to efficiently utilize processor resources, a storage system according to this invention includes: a protocol processor; a processor; a local router; a first memory; and a disk drive. In the storage system, the protocol processor transmits, upon transmitting a frame to the host computer, information on a transmission state of the frame to the local router, and the local router determines, upon the protocol processor receiving a frame, which of the processors processes the received frame, based on which a subject the received frame requests for an access to, transfers the received frame to the determined processor, determines, upon the protocol processor transmitting a frame, which of the processors processes information on a transmission state of the frame, based on an exchange of the transmitted frame, and transfers the information on the transmission state of the frame to the determined processor.Type: GrantFiled: April 4, 2006Date of Patent: December 4, 2012Assignee: Hitachi, Ltd.Inventors: Shuji Nakamura, Akira Fujibayashi, Mutsumi Hosoya
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Patent number: 8286031Abstract: The disk controller has a plurality of channel control units, a plurality of cache memories, a plurality of disk control units, and a plurality of internal switch units. Each channel control unit or disk control unit sends to one of the cache memory units a request packet requesting execution of processing. The cache memory unit sends a response packet in response to the received request packet. Each internal switch unit monitors the request packet sent from the channel control unit or disk control unit, and judges whether or not the response packet to the request packet has passed through the internal switch unit within a first given time period since the passage of the request packet. In the case where the response packet has not passed through the internal switch unit within the first given time period, the internal switch unit sends a failure notification.Type: GrantFiled: December 31, 2010Date of Patent: October 9, 2012Assignee: Hitachi, Ltd.Inventors: Shuji Nakamura, Akira Fujibayashi, Mutsumi Hosoya
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Patent number: 8250318Abstract: Provided are a storage controller and storage control method capable of improving the transaction performance. This storage controller includes a disk controller for receiving a read command and a write command from a host computer, and an external disk controller and an internal disk device for sending and receiving data to and from the disk controller. A storage device of the external disk controller or the internal disk controller processes the access from the disk controller in physical sub-block units. When the disk controller is to access the storage device of the external disk controller or the internal disk device in logical sub-block units in which an additional code containing a guarantee code is added to user data, it makes such access in minimum common multiple units of logical sub-blocks and physical sub-blocks, and changes the guarantee code length.Type: GrantFiled: March 31, 2011Date of Patent: August 21, 2012Assignee: Hitachi, Ltd.Inventors: Mutsumi Hosoya, Akira Fujibayashi
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Patent number: 8127077Abstract: Provided is a storage system. The storage system includes: a hard disk drive, and a storage controller for reading/writing data from/to the hard disk drive, the storage controller including: at least one interface connected to a host computer through a network; and a plurality of processors connected to the interface through an internal network. The storage system is characterized in that: the processor provides at least one logical access port to the host computer; and the interface stores routing information including a processor which processes an access request addressed to the logical access port, extracts an address from the received access request upon reception of the access request from the host computer, specifies the processor which processes the received access request based on the routing information and the extracted address, and transfers the received access request to the specified processor.Type: GrantFiled: January 28, 2011Date of Patent: February 28, 2012Assignee: Hitachi, Ltd.Inventors: Akira Fujibayashi, Shuji Nakamura, Mutsumi Hosoya
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Patent number: 8069272Abstract: Provided is a unit for protecting data with respect to data transfer between memories of a disk controller. The disk controller for controlling data transfer between a host computer and a disk drive includes: a channel unit having a channel memory; a cache unit having a cache memory, and a control unit for controlling the data transfer. The data transferred to/from the host computer is transferred in a packet between the channel memory and the cache memory, and The control unit for verifying consistency of information included in a header of the packet to be transferred to decide whether transfer can be permitted when the packet is transferred.Type: GrantFiled: December 4, 2009Date of Patent: November 29, 2011Assignee: Hitachi, Ltd.Inventor: Mutsumi Hosoya
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Publication number: 20110197096Abstract: The disk controller has a plurality of channel control units, a plurality of cache memories, a plurality of disk control units, and a plurality of internal switch units. Each channel control unit or disk control unit sends to one of the cache memory units a request packet requesting execution of processing. The cache memory unit sends a response packet in response to the received request packet. Each internal switch unit monitors the request packet sent from the channel control unit or disk control unit, and judges whether or not the response packet to the request packet has passed through the internal switch unit within a first given time period since the passage of the request packet. In the case where the response packet has not passed through the internal switch unit within the first given time period, the internal switch unit sends a failure notification.Type: ApplicationFiled: December 31, 2010Publication date: August 11, 2011Applicant: Hitachi, Ltd.Inventors: Shuji Nakamura, Akira Fujibayashi, Mutsumi Hosoya
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Publication number: 20110179238Abstract: Provided are a storage controller and storage control method capable of improving the transaction performance. This storage controller includes a disk controller for receiving a read command and a write command from a host computer, and an external disk controller and an internal disk device for sending and receiving data to and from the disk controller. A storage device of the external disk controller or the internal disk controller processes the access from the disk controller in physical sub-block units. When the disk controller is to access the storage device of the external disk controller or the internal disk device in logical sub-block units in which an additional code containing a guarantee code is added to user data, it makes such access in minimum common multiple units of logical sub-blocks and physical sub-blocks, and changes the guarantee code length.Type: ApplicationFiled: March 31, 2011Publication date: July 21, 2011Applicant: HITACHI, LTD.Inventors: Mutsumi Hosoya, Akira Fujibayashi
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Publication number: 20110125964Abstract: Provided is a storage system having improved access performance. The storage system includes: a hard disk drive, and a storage controller for reading/writing data from/to the hard disk drive, the storage controller including: at least one interface connected to a host computer through a network; and a plurality of processors connected to the interface through an internal network. The storage system is characterized in that: the processor provides at least one logical access port to the host computer; and the interface stores routing information including a processor which processes an access request addressed to the logical access port, extracts an address from the received access request upon reception of the access request from the host computer, specifies the processor which processes the received access request based on the routing information and the extracted address, and transfers the received access request to the specified processor.Type: ApplicationFiled: January 28, 2011Publication date: May 26, 2011Inventors: Akira FUJIBAYASHI, Shuji Nakamura, Mutsumi Hosoya
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Patent number: 7937542Abstract: Provided are a storage controller and a storage control method capable of improving the transaction performance. This storage controller includes a disk controller for receiving a read command and a write command from a host computer, and an external disk controller and an internal disk device for sending and receiving data to and from the disk controller. A storage device of the external disk controller or the internal disk controller processes the access from the disk controller in physical sub-block units. When the disk controller is to access the storage device of the external disk controller or the internal disk device in logical sub-block units in which an additional code containing a guarantee code is added to user data, it makes such access in minimum common multiple units of logical sub-blocks and physical sub-blocks, and changes the guarantee code length.Type: GrantFiled: January 11, 2008Date of Patent: May 3, 2011Assignee: Hitachi, Ltd.Inventors: Mutsumi Hosoya, Akira Fujibayashi
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Patent number: 7917668Abstract: A disk controller has a channel adapter having a connection interface to a host computer or a disk drive; a memory adapter for temporarily storing data to be transferred between the host computer and disk drive; a processor adapter for controlling operations of the channel adapter and memory adapter; and a switch adapter for configuring an inner network by interconnecting the channel adapter, memory adapter and processor adapter, wherein the channel adapter, memory adapter, processor adapter and switch adapter each include a DMA controller for performing a communication protocol control of the inner network; and packet multiplex communication is performed among the DMA controllers provided in the adapters. The disk controller can realize a high transfer efficiency and a low cost while retaining a high reliability. A storage system includes an interface unit having an interface with a server or hard drives, a memory unit, a processor unit, and an interconnection.Type: GrantFiled: November 12, 2008Date of Patent: March 29, 2011Assignee: Hitachi, Ltd.Inventors: Mutsumi Hosoya, Naoki Watanabe, Shuji Nakamura, Yasuo Inoue, Kazuhisa Fujimoto, Kentaro Shimada
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Patent number: 7895396Abstract: Provided is a storage system having improved access performance. The storage system includes: a hard disk drive, and a storage controller for reading/writing data from/to the hard disk drive, the storage controller including: at least one interface connected to a host computer through a network; and a plurality of processors connected to the interface through an internal network. The storage system is characterized in that: the processor provides at least one logical access port to the host computer; and the interface stores routing information including a processor which processes an access request addressed to the logical access port, extracts an address from the received access request upon reception of the access request from the host computer, specifies the processor which processes the received access request based on the routing information and the extracted address, and transfers the received access request to the specified processor.Type: GrantFiled: August 3, 2009Date of Patent: February 22, 2011Assignee: Hitachi, Ltd.Inventors: Akira Fujibayashi, Shuji Nakamura, Mutsumi Hosoya
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Patent number: 7877633Abstract: The disk controller has a plurality of channel control units, a plurality of cache memories, a plurality of disk control units, and a plurality of internal switch units. Each channel control unit or disk control unit sends to one of the cache memory units a request packet requesting execution of processing. The cache memory unit sends a response packet in response to the received request packet. Each internal switch unit monitors the request packet sent from the channel control unit or disk control unit, and judges whether or not the response packet to the request packet has passed through the internal switch unit within a first given time period since the passage of the request packet. In the case where the response packet has not passed through the internal switch unit within the first given time period, the internal switch unit sends a failure notification.Type: GrantFiled: May 12, 2010Date of Patent: January 25, 2011Assignee: Hitachi, Ltd.Inventors: Shuji Nakamura, Akira Fujibayashi, Mutsumi Hosoya
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Publication number: 20110013625Abstract: Deadlock is avoided in a grid storage system having superior scalability. Provided is a storage subsystem connected to a host computer for receiving a write or read access from the host computer. This storage subsystem includes a plurality of modules respectively having a storage resource, a switch for connecting the plurality of modules, a controller for controlling the transfer of a packet based on the write or read access from the host computer to a target module among the plurality of modules via the switch, and a memory storing a transfer rule of the packet. The controller controls the transfer of the packet based on the transfer rule.Type: ApplicationFiled: September 22, 2010Publication date: January 20, 2011Applicant: HITACHI, LTD.Inventors: Shuji NAKAMURA, Akira FUJIBAYASHI, Mutsumi HOSOYA, Hideaki FUKUDA
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Patent number: 7817626Abstract: Deadlock is avoided in a grid storage system having superior scalability. Provided is a storage subsystem connected to a host computer for receiving a write or read access from the host computer. This storage subsystem includes a plurality of modules respectively having a storage resource, a switch for connecting the plurality of modules, a controller for controlling the transfer of a packet based on the write or read access from the host computer to a target module among the plurality of modules via the switch, and a memory storing a transfer rule of the packet. The controller controls the transfer of the packet based on the transfer rule.Type: GrantFiled: January 25, 2008Date of Patent: October 19, 2010Assignee: Hitachi, Ltd.Inventors: Shuji Nakamura, Akira Fujibayashi, Mutsumi Hosoya, Hideaki Fukuda
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Publication number: 20100223496Abstract: The disk controller has a plurality of channel control units, a plurality of cache memories, a plurality of disk control units, and a plurality of internal switch units. Each channel control unit or disk control unit sends to one of the cache memory units a request packet requesting execution of processing. The cache memory unit sends a response packet in response to the received request packet. Each internal switch unit monitors the request packet sent from the channel control unit or disk control unit, and judges whether or not the response packet to the request packet has passed through the internal switch unit within a first given time period since the passage of the request packet. In the case where the response packet has not passed through the internal switch unit within the first given time period, the internal switch unit sends a failure notification.Type: ApplicationFiled: May 12, 2010Publication date: September 2, 2010Applicant: Hitachi, Ltd.Inventors: Shuji Nakamura, Akira Fujibayashi, Mutsumi Hosoya
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Patent number: 7743211Abstract: A storage system 1 includes: plural protocol transformation units 10 that transform, to a protocol within the system, a read/write protocol of data exchanged with servers 3 or hard disk groups 2; plural cache control units 21 that include cache memory units 111 storing data read/written with the servers 3 or the hard disk groups 2 and which include the function of controlling the cache memory units 111; and an interconnection network 31 that connects the protocol transformation units 10 and the cache control units 21. In this storage system 1, the plural cache control units 21 are divided into plural control clusters 70, control of the cache memory units 111 is independent inside the control clusters, and a system management unit 60 that manages, as a single system, the plural protocol transformation units 10 and the plural control clusters 70 is connected to the interconnection network 30.Type: GrantFiled: June 20, 2008Date of Patent: June 22, 2010Inventors: Kazuhisa Fujimoto, Mutsumi Hosoya, Kentaro Shimada, Akira Yamamoto, Naoko Iwami, Yasutomo Yamamoto
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Publication number: 20100153961Abstract: A storage system is comprised of an interface unit 10 which has an interface with a server 3 or hard drives 2, a memory unit 21 which has a cache memory module 126 for storing data to be read from/written to the server 3 or the hard drives 2 and a control information memory module 127 for storing control information of the system, a processor unit 81 which has a microprocessor for controlling the read/write of data between the server 3 and the hard drives 2, and an interconnection 31, wherein the interface unit 10, memory unit 21 and processor unit 81 are interconnected with the interconnection 31.Type: ApplicationFiled: March 1, 2010Publication date: June 17, 2010Applicant: HITACHI, LTD.Inventors: Kazuhisa Fujimoto, Yasuo Inoue, Mutsumi Hosoya, Kentaro Shimada, Naoki Watanabe
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Patent number: 7734957Abstract: The disk controller has a plurality of channel control units, a plurality of cache memories, a plurality of disk control units, and a plurality of internal switch units. Each channel control unit or disk control unit sends to one of the cache memory units a request packet requesting execution of processing. The cache memory unit sends a response packet in response to the received request packet. Each internal switch unit monitors the request packet sent from the channel control unit or disk control unit, and judges whether or not the response packet to the request packet has passed through the internal switch unit within a first given time period since the passage of the request packet. In the case where the response packet has not passed through the internal switch unit within the first given time period, the internal switch unit sends a failure notification.Type: GrantFiled: December 12, 2006Date of Patent: June 8, 2010Assignee: Hitachi, Ltd.Inventors: Shuji Nakamura, Akira Fujibayashi, Mutsumi Hosoya
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Patent number: 7702823Abstract: This invention enables a disk subsystem that employs the FC-AL connection to grasp the operation status of each disk drive, quickly locate a disk drive that has failed, and promptly carry out blocking processing. In a disk subsystem including plural drive enclosures which store disk drives, and a disk controller which controls transfer of data stored in the disk drives between the drive enclosures and a host computer. The drive enclosures each comprise a backend switch which is connected to the disk drives and to the disk controller, the backend switch comprises a status monitoring port through which operation status of switch ports of the backend switch is outputted, and the disk controller monitors a fault of the switch ports through the status monitoring port.Type: GrantFiled: November 4, 2004Date of Patent: April 20, 2010Assignee: Hitachi, Ltd.Inventors: Mutsumi Hosoya, Akira Fujibayashi, Shuji Nakamura, Yasuo Inoue