Abstract: A nonvolatile memory device includes an array of nonvolatile memory cells and a plurality of page buffers configured to receive a plurality of pages of data read from the same page in the array using different read voltage conditions. A control circuit is provided, which is electrically coupled to the plurality of page buffers. The control circuit is configured to perform a test operation by driving the plurality of page buffers with control signals that cause generation within the nonvolatile memory device of a string of XOR data bits, which are derived from a comparison of at least two of the multiple pages of data read from the same page of nonvolatile memory cells using the different read voltage conditions. An input/output device is provided, which is configured to output test data derived from the string of XOR data bits to another device located external to the nonvolatile memory device.

Abstract: A nonvolatile memory device includes an array of nonvolatile memory cells and a plurality of page buffers configured to receive a plurality of pages of data read from the same page in the array using different read voltage conditions. A control circuit is provided, which is electrically coupled to the plurality of page buffers. The control circuit is configured to perform a test operation by driving the plurality of page buffers with control signals that cause generation within the nonvolatile memory device of a string of XOR data bits, which are derived from a comparison of at least two of the multiple pages of data read from the same page of nonvolatile memory cells using the different read voltage conditions. An input/output device is provided, which is configured to output test data derived from the string of XOR data bits to another device located external to the nonvolatile memory device.

Abstract: The present invention provides a medicinal and/or a food usage of eupatilin for treating, improving, and/or preventing at least one condition selected from bone disease, menopausal disorder, cardiovascular disease, neurodegenerative disease, or obesity. Advantages of the present invention includes little or no possibility of side effects such as cancer, and effective treatment, improvement, and/or prevention of the at least one condition selected from bone disease, menopausal disorder, cardiovascular disease, neurodegenerative disease, and obesity.

Abstract: A memory system, comprising a flash memory comprising multiple memory blocks, and a controller configured to erase each of the memory blocks using multiple steps. The controller stores, for each of the memory blocks, metadata indicating which of the multiple steps have been completed, and erases each of the memory blocks based on the stored metadata.

Abstract: A memory system includes a flash memory including a block having first sub-blocks and second sub-blocks different from each other, the second sub-blocks including free pages only; and a controller configured to erase the flash memory in units of the sub-blocks, and in a garbage collection operation, the controller is configured to copy data of a valid page of the first sub-blocks to at least one of the second sub-blocks.

Abstract: A method for programming a non-volatile memory device includes: providing a non-volatile memory device including data cells capable of storing N-bit data (N is a natural number) and a monitoring cell capable of monitoring whether the N-bit data has been programmed into the data cells; performing a first programming operation for the data cells while inhibiting programming of the monitoring cell; and performing a second programming operation for the monitoring cell while inhibiting programming of the data cells, wherein the second programming operation is performed differently from the first programming.

Abstract: A nonvolatile memory device comprises a memory cell array comprising a selected page comprising multiple error correction code (ECC) units, and a voltage generation unit configured to generate a read voltage to read data from the selected page. Read voltage levels are set individually for the respective ECC units according to data detection results for each of the ECC units. During a read retry section performed with respect to selected ECC units of the selected page for which read errors have been detected, a re-read operation of the selected ECC units is performed according to the respective read voltage levels set for the selected ECC units.

Abstract: Disclosed is a storage device which includes a nonvolatile memory device including a memory block a program order of which is adjusted regardless of an arrangement of memory cells, and a memory controller that performs address mapping to replace a bad page of the memory block with a normal page of the memory block.

Abstract: Disclosed is a method of writing data in a storage device including a nonvolatile memory device. The method includes receiving write data with a write request, detecting a number of free blocks, if the detected number of free blocks is less than a threshold value, allocating a log block only in accordance with a sub-block unit, but if the detected number of free blocks is not less than the threshold value, allocating the log block in accordance with one of the sub-block unit and a physical block unit, wherein the sub-block unit is smaller than the physical block unit.

Abstract: A semiconductor memory device including a flash memory that includes a page, wherein the page includes a plurality of memory cells connected to even bitlines and odd bitlines of the flash memory, and the memory cells are disposed in a plurality of sectors. The semiconductor memory device also includes a memory controller configured to provide the flash memory with a read address that identifies sectors to be read. The flash memory is configured to determine a sequence of even sensing and odd sensing based on the read address and perform the even sensing and the odd sensing according to the determined sequence. In addition, the flash memory is configured to sense data of at least one identified sector that includes memory cells connected to the even bitlines during the even sensing and sense data of at least one identified sector that includes memory cells connected to the odd bitlines during the odd sensing.

Abstract: Disclosed is a novel use of rice, rice bran or rice hull extract as a histamine receptor antagonist. The rice, rice bran or rice hull extract may be used as a natural antihistamine to prevent or treat allergic rhinitis, inflammatory bowel disease, asthma, bronchitis, nausea, gastric and duodenal ulcer, gastroesophageal reflux disease, sleep disorder, anxiety and depression. It provides comparable or better effect of decreasing sleep latency, increasing sleep duration and increasing non-REM sleep as compared to diazepam, which is currently used as sleeping drug. Derived from the natural product rice, rice bran or rice hull, it has no side effect such as cognitive impairment, resistance or dependency even after long-term use.

Abstract: A nonvolatile memory device includes an array of nonvolatile memory cells and a plurality of page buffers configured to receive a plurality of pages of data read from the same page in the array using different read voltage conditions. A control circuit is provided, which is electrically coupled to the plurality of page buffers. The control circuit is configured to perform a test operation by driving the plurality of page buffers with control signals that cause generation within the nonvolatile memory device of a string of XOR data bits, which are derived from a comparison of at least two of the multiple pages of data read from the same page of nonvolatile memory cells using the different read voltage conditions. An input/output device is provided, which is configured to output test data derived from the string of XOR data bits to another device located external to the nonvolatile memory device.

Abstract: A method for programming a non-volatile memory device includes: providing a non-volatile memory device including data cells capable of storing N-bit data (N is a natural number) and a monitoring cell capable of monitoring whether the N-bit data has been programmed into the data cells; performing a first programming operation for the data cells while inhibiting programming of the monitoring cell; and performing a second programming operation for the monitoring cell while inhibiting programming of the data cells, wherein the second programming operation is performed differently from the first programming.

Abstract: Methods of performing a read retry, including reading a non-volatile memory with new read parameters, and devices for performing such methods are disclosed. The read retry operation and/or subsequent read retry operation may be initiated and/or completed before it is determined that such read retry operation is warranted. For example, a page of a NAND flash memory may be read in a read retry operation with new read voltage levels applied to a word line of the page. For example, a read retry operation may be performed on a target page prior to determining errors of a previous read page of data of the target page are uncorrectable via an ECC operation.

Abstract: A method for operating a memory controller capable of controlling a maximum count of a read retry operation is disclosed. The method includes programming a first real time clock (RTC) value indicating a time-of-day when a program operation is performed when the program operation for programming a data to a storage region of a non-volatile memory, obtaining information for the storage region by using the first RTC value read from the non-volatile memory and a second RTC value indicating a time-of-day when a read operation is performed, when the read operation for the data programmed to the storage region is performed, and decreasing a maximum count of a read retry operation by using the information, when the read retry operation is performed for the storage region.

Abstract: The non-volatile memory device includes a plurality of memory cells. Each of the memory cells is configured to achieve one of a plurality of states, and each of the states represents different multi-bit data. In one embodiment, the method of programming includes simultaneously programming (1) a first memory cell from a first selected state to a second selected state and (2) a second memory cell from a third selected state to a refined third selected state. The refined third selected state has a higher verify voltage than the third selected state.

Abstract: A semiconductor memory device including a flash memory that includes a page, wherein the page includes a plurality of memory cells connected to even bitlines and odd bitlines of the flash memory, and the memory cells are disposed in a plurality of sectors. The semiconductor memory device also includes a memory controller configured to provide the flash memory with a read address that identifies sectors to be read. The flash memory is configured to determine a sequence of even sensing and odd sensing based on the read address and perform the even sensing and the odd sensing according to the determined sequence. In addition, the flash memory is configured to sense data of at least one identified sector that includes memory cells connected to the even bitlines during the even sensing and sense data of at least one identified sector that includes memory cells connected to the odd bitlines during the odd sensing.

Abstract: A non-volatile memory device includes a cell array including a plurality of memory cells, a page buffer block controlling bitlines of the plurality of memory cells to program the memory cells to a first target state or a second target state, and a control logic configured to skip a verify operation for the memory cells programmed to the first target state and perform a verify operation for the memory cells programmed to the second target state during a second program loop when the memory cells programmed to the first target state are determined to be in a pass condition during a first program loop.

Abstract: A method of operating a nonvolatile memory device includes; performing a verification operation on memory cells while controlling a verification voltage until the memory cells are verification-passed, controlling a level of a bias voltage to be applied to the memory cells according to a level of the verification voltage when the memory cells are verification-passed, and applying the bias voltage to the memory cells.

Abstract: A method of operating a nonvolatile memory device includes; performing a verification operation on memory cells while controlling a verification voltage until the memory cells are verification-passed, controlling a level of a bias voltage to be applied to the memory cells according to a level of the verification voltage when the memory cells are verification-passed, and applying the bias voltage to the memory cells.