Abstract: A silicon oxide film with a film thickness of 5 to 7 nm is formed on a first region, a silicon oxynitride film with a film thickness of 2 to 3 nm, and a nitrogen concentration of 1 to 3 atom % is formed on a second region, and a silicon oxynitride film with a film thickness of 1 to 2 nm, and a nitrogen concentration of 3 to 5 atom % is formed on a third region on a silicon substrate. Then, radical nitriding is applied to the silicon oxide film, and the silicon oxynitride films.

Abstract: A silicon oxide film with a film thickness of 5 to 7 nm is formed on a first region, a silicon oxynitride film with a film thickness of 2 to 3 nm, and a nitrogen concentration of 1 to 3 atom % is formed on a second region, and a silicon oxynitride film with a film thickness of 1 to 2 nm, and a nitrogen concentration of 3 to 5 atom % is formed on a third region on a silicon substrate. Then, radical nitriding is applied to the silicon oxide film, and the silicon oxynitride films.

Abstract: In an integrated circuit device, third transistors having the thickest gate insulation film are driven at high voltage and thus operate at high speed with minimal gate leak current. First transistors having the thinnest gate insulation film and second transistors which do not have the thinnest gate insulation film are driven at low voltage, the second transistors being driven at all times and the first transistors being halted as appropriate. The second transistors operate constantly at low speed and with minimal gate leak current, and the first transistors, which have significant gate leak current, operate at high speed while halting as appropriate.

Abstract: In an integrated circuit device, third transistors having the thickest gate insulation film are driven at high voltage and thus operate at high speed with minimal gate leak current. First transistors having the thinnest gate insulation film and second transistors which do not have the thinnest gate insulation film are driven at low voltage, the second transistors being driven at all times and the first transistors being halted as appropriate. The second transistors operate constantly at low speed and with minimal gate leak current, and the first transistors, which have significant gate leak current, operate at high speed while halting as appropriate.

Abstract: First and second circuit blocks are provided in a semiconductor device. The first circuit block is provided with a first complementary MOS transistor including a first P-channel MOS transistor and a first N-channel MOS transistor. The second circuit block is provided with a second complementary MOS transistor including a second P-channel MOS transistor and a second N-channel MOS transistor. The threshold voltages of the first P-channel MOS transistor and the first N-channel MOS transistor are set to be higher than those of the second P-channel MOS transistor and the second N-channel MOS transistor. A gate leakage current of the first N-channel MOS transistor in a stand-by state is set to be substantially equal to that of the first P-channel MOS transistor.

Abstract: A semiconductor device comprises a relatively lower threshold level MOSFET and relatively higher threshold level MOSFETs of n- and p-types. The higher threshold level MOSFETs have gate oxide films which is thicker than that of the lower threshold level MOSFET and, in addition, the gate oxide film of the higher threshold level MOSFET of n-type is thicker than that of the higher threshold level MOSFET of p-type. To fabricate the semiconductor device, implantation treatments of fluorine ions are carried out before the gate oxide treatment. Specifically, as for the higher threshold level MOSFETs of n- and p- types, implantation treatments of fluorine ions are independently carried out with unique implantation conditions.

Abstract: A method of manufacturing a semiconductor device having a high Vth MOS FET and a low Vth MOS FET which have respective gate insulating films different in thickness from each other without covering the gate insulating film with a resist film. A silicon oxide film on a low Vth region is etched away, and in the nitriding process a nitride film is formed on the low Vth region. The silicon oxide film on a high Vth region is etched away without forming a resist film on the nitride film. A semiconductor substrate is thermally oxidized to form relatively a thick gate insulating film on the high Vth region and also to form a thin gate insulating film on the low Vth region. Gate electrodes are formed and then impurity diffusion layers forming a source and drain region are formed.

Abstract: The method for manufacturing semiconductor devices, according to the present invention, that include transistors for peripheral circuits to which input and output signal lines are connected and transistors for internal circuits that have lower operation voltage than that of the transistors for peripheral circuits consists of the steps of exposing a surface of a first region forming the transistors for peripheral circuits of a semiconductor substrate, forming a first gate oxide layer by oxidizing the exposed surface of the first region in an oxidizing atmospheric gas including hydrogen atoms, exposing a surface of a second region forming the transistors for internal circuits of the semiconductor substrate, and forming a second gate oxide layer by oxidizing the exposed surface of the second region in an oxidizing atmospheric gas without hydrogen atoms and subsequently by oxidizing the exposed surface in a nitrogen monoxide atmosphere.

Abstract: To prevent channelling of gate impurities into channel region or gate insulation film without restricting sidewall material of the gate electrodes, a fabrication method of the invention of semiconductor devices comprises a first ion injection step for making amorphous a surface region (11) of a poly-silicon layer (7) for a gate electrode configured on a semiconductor substrate (1) by injecting ions selectively into the surface region, and a second ion injection step, performed after the first ion injection step without inserting any process needing a high temperature of the semiconductor substrate, for injecting impurities into the gate electrode.

Abstract: A method of recovering crystal defects in an impurity doped diffusion silicon layer in contact with a C54 crystal phase titanium silicide layer includes the step of causing a cohesion reaction of the C54 crystal phase titanium silicide layer by heat treating the C54 crystal phase titanium silicide layer so as to cause a vacancy-diffusion of lattice-vacancy of silicon atoms from the C54 crystal phase titanium silicide layer into the impurity doped diffusion silicon layer including the crystal defects while maintaining the continuity of the C54 crystal phase titanium silicide layer.

Abstract: In a method of manufacturing a semiconductor device, a conductive film is formed for a plurality of wiring patterns on a first insulating film and a second insulating film is formed on the conductive film. The second insulating film is patterned to be adaptive for the plurality of wiring patterns and then anisotropically etching is performed to the conductive film using the patterned second insulating film a mask such that a part of the conductive film is remained in a thickness direction of the conductive film. Subsequently, side wall insulating films are formed on side walls of the etched conductive film and then the conductive film is completely patterned for the plurality of wiring patterns using the side wall insulating films and the patterned second insulating film as a mask. In this case, the step of anisotropically etching the conductive film includes stopping the etching when the etching is performed by a predetermined depth with respect to a film thickness of the conductive film.